Patents by Inventor Yvan Kalenine

Yvan Kalenine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8160829
    Abstract: The current measuring device comprises a first measuring resistor to receive a measurement current, and a first signal amplifier having an input connected to said first measuring resistor and an output to provide a first measurement signal. A second measuring resistor is connected in series with said first measuring resistor, and first voltage limiting means are connected in parallel on the first measuring resistor to branch a first shunt current off when a first limiting voltage is reached on said first measuring resistor. The value of the first measuring resistor is greater than the value of the second measuring resistor A processing unit comprises one such current measuring device.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: April 17, 2012
    Assignee: Schneider Electric Industries SAS
    Inventor: Yvan Kalenine
  • Publication number: 20090312970
    Abstract: The current measuring device comprises a first measuring resistor to receive a measurement current, and a first signal amplifier having an input connected to said first measuring resistor and an output to provide a first measurement signal. A second measuring resistor is connected in series with said first measuring resistor, and first voltage limiting means are connected in parallel on the first measuring resistor to branch a first shunt current off when a first limiting voltage is reached on said first measuring resistor. The value of the first measuring resistor is greater than the value of the second measuring resistor A processing unit comprises one such current measuring device.
    Type: Application
    Filed: May 20, 2009
    Publication date: December 17, 2009
    Applicant: Schneider Electric Industries SAS
    Inventor: Yvan Kalenine
  • Patent number: 5315599
    Abstract: A certain number of high bits of each sample (12 bits) supplied by an analog-to-digital converter is used as the address of a comparison zone of a RAM associated with the microprocessor of the device. In this comparison zone the result of comparison of this sample with a predetermined number of thresholds has previously been recorded. The sample (12 bits) and associated comparison result (4 bits) are stored in a storage zone of the RAM for subsequent processing by the microprocessor. This simultaneous acquisition of a sample and of the prerecorded result of comparison of this sample with the thresholds minimizes the time devoted by the microprocessor to data acquisition.
    Type: Grant
    Filed: October 8, 1991
    Date of Patent: May 24, 1994
    Assignee: Merlin Gerin
    Inventors: Gilbert Chaboud, Yvan Kalenine