Patents by Inventor Yves Durand

Yves Durand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088066
    Abstract: A semiconductor wafer (1a, 1b) including a plurality of chips (2) and a separation zone (3) spacing the semiconductor chips (2) from each other in this wafer (1a, 1b), such a separation zone (3) extending from a front face (4a) to an opposite backside face (4b) of this wafer (1a, 1b), this separation zone (3) includes a scribe line (6) configured to be diced using plasma etching and an inlet area (13) of this scribe line (6), the inlet (13) being delimitated by free ends of plasma etch-resistant material layers (9) extending each from a peripheral wall (20) of a functional part (18) of a chip (2) into the scribe line (6) by overlapping a top of a seal ring (7) of this chip (2).
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Christophe ENTRINGER, Yves Dupraz, Pierre Muller, Zeng Wang, Alexis Durand, Arthur Hugh MacDougall
  • Patent number: 11623770
    Abstract: An assembly includes at least one first collection of a plurality of spacecraft intended to be fastened to a launcher during a launch phase, wherein the spacecraft are arranged about a central axis (Z) in a given transverse plane perpendicular to the central axis, the spacecraft having edges along a longitudinal axis and being moreover arranged in such a way that a spacecraft is linked to a neighboring spacecraft of the collection by one edge by means of at least one fastener (B) positioned on the edge, so as to mechanically hold the spacecraft to one another, and a satellites-launcher adaptor to which the spacecraft are fastened in a transverse plane.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: April 11, 2023
    Assignee: THALES
    Inventors: Emmanuel Texier, Yves Durand, Jérôme Andy, Pascal Ribeyron, Julien Labarthe
  • Patent number: 11461095
    Abstract: The present disclosure relates to a method of storing, by a load and store circuit or other processing means, a variable precision floating point value to a memory address of a memory, the method comprising: reducing the bit length of the variable precision floating point value to no more than a size limit, and storing the variable precision floating point value to one of a plurality of storage zones in the memory, each of the plurality of storage zones having a storage space equal to or greater than the size limit (MBB).
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: October 4, 2022
    Assignees: Commissariat à l'Energie Atomique et aux Energies Alternatives, Institut National des Sciences Appliquées de Lyon
    Inventors: Andrea Bocco, Florent Dupont De Dinechin, Yves Durand
  • Publication number: 20210229839
    Abstract: An assembly includes at least one first collection of a plurality of spacecraft intended to be fastened to a launcher during a launch phase, wherein the spacecraft are arranged about a central axis (Z) in a given transverse plane perpendicular to the central axis, the spacecraft having edges along a longitudinal axis and being moreover arranged in such a way that a spacecraft is linked to a neighboring spacecraft of the collection by one edge by means of at least one fastener (B) positioned on the edge, so as to mechanically hold the spacecraft to one another, and a satellites-launcher adaptor to which the spacecraft are fastened in a transverse plane.
    Type: Application
    Filed: June 12, 2019
    Publication date: July 29, 2021
    Inventors: Emmanuel TEXIER, Yves DURAND, Jérôme ANDY, Pascal RIBEYRON, Julien LABARTHE
  • Patent number: 10909043
    Abstract: A direct memory access controller, configured to be used in a computing node of a system on chip (SoC), includes: (1) an input buffer for receiving packets of data coming from an input/output interface of the computing node; (2) a write control module for controlling writing of data extracted from each packet to a local memory of the computing node shared by at least one processor other than the direct memory access controller; and (3) an arithmetic logic unit for executing microprograms. The write control module is configured to control the execution by the arithmetic logic unit of at least one microprogram including instruction lines for arithmetic and/or logical calculation concerning only storage addresses for storing the data received by the input buffer for a reorganization of the data in the shared local memory. Optionally, at least one microprogram may be stored in a register, and at least two operating modes (e.g.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: February 2, 2021
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Yves Durand, Christian Bernard
  • Publication number: 20200285468
    Abstract: The present disclosure relates to a method of storing, by a load and store circuit or other processing means, a variable precision floating point value to a memory address of a memory, the method comprising: reducing the bit length of the variable precision floating point value to no more than a size limit, and storing the variable precision floating point value to one of a plurality of storage zones in the memory, each of the plurality of storage zones having a storage space equal to or greater than the size limit (MBB).
    Type: Application
    Filed: March 6, 2020
    Publication date: September 10, 2020
    Inventors: Andrea BOCCO, Florent DUPONT DE DINECHIN, Yves DURAND
  • Publication number: 20190065402
    Abstract: A direct memory access controller intended to be placed in a computing node of a system on chip, comprising: an input buffer for receiving packets of data to be processed coming from an input/output interface of the computing node; a write control module for controlling the writing of the data extracted from each packet to a local address space of the computing node shared by at least one processor for processing said data other than the direct memory access controller; an arithmetic logic unit for executing microprograms. The write control module is designed to control the execution by the arithmetic logic unit of at least one microprogram consisting of instruction lines for arithmetic and/or logical calculation concerning only storage addresses for storing the data received by the input buffer for a reorganization of same in the shared local address space.
    Type: Application
    Filed: August 29, 2018
    Publication date: February 28, 2019
    Applicant: Commissariat a I'energie atomique et aux energies alternatives
    Inventors: Yves Durand, Christian Bernard
  • Patent number: 10193553
    Abstract: The invention concerns a circuit comprising: a processing circuit (102) comprising a plurality of circuit domains (103), each circuit domain (103) comprising a plurality of transistors and being configured to apply one or more corresponding transistor biasing voltages to said transistors; and a control circuit (104) configured to determine, based on at least a selected accuracy setting of the processing circuit, the level of said one or more transistor biasing voltages to be applied in each of said circuit domains, the control circuit (104) being further configured to cause said transistor biasing voltages to be applied to the circuit domains.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: January 29, 2019
    Assignee: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Daniele Jahier Pagliari, Edith Beigne, Yves Durand, Massimo Poncino
  • Patent number: 10186848
    Abstract: A method for installing a wiring harness in an aircraft. The method comprises using cables having first ends secured to the harness and winding means onto each of which is wound one of said cables so as to lift up said harness by exerting a tensile force. The first ends of the cables are distributed along at least a section of the harness so as to distribute the tensile forces over the section.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: January 22, 2019
    Assignee: AIRBUS OPERATIONS SAS
    Inventors: Yves Durand, Bernard Guering
  • Publication number: 20180278250
    Abstract: The invention concerns a circuit comprising: a processing circuit (102) comprising a plurality of circuit domains (103), each circuit domain (103) comprising a plurality of transistors and being configured to apply one or more corresponding transistor biasing voltages to said transistors; and a control circuit (104) configured to determine, based on at least a selected accuracy setting of the processing circuit, the level of said one or more transistor biasing voltages to be applied in each of said circuit domains, the control circuit (104) being further configured to cause said transistor biasing voltages to be applied to the circuit domains.
    Type: Application
    Filed: March 20, 2018
    Publication date: September 27, 2018
    Inventors: Daniele JAHIER PAGLIARI, Edith BEIGNE, Yves DURAND, Massimo PONCINO
  • Patent number: 10063480
    Abstract: A method for dynamically controlling throughput set points from sources to targets in a network on a chip including a plurality of nodes and a plurality of links between these nodes for transmission of data packets, including for each link of the network solicited by the transmission of data packets, estimation of an available throughput margin that includes the estimation of a first margin calculated based on a maximum throughput capacity of the link; and for each emitting source of at least one data packet, the calculation and the application of an update of its throughput set point according to the estimated available throughput margins. Estimation of available throughput margin for each link includes estimation of a second margin calculated based on a maximum local absorption capacity of possible sporadic overflows of the throughput set points and its value is determined according to the first and second calculated margins.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: August 28, 2018
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Yves Durand, Christian Bernard
  • Patent number: 9944395
    Abstract: An aircraft hold including a device for automated processing of luggage is provided. The device includes at least one automated arm for handling the luggage. The automated arm, which is mounted so as to be able to move in translation along the longitudinal axis of the hold of the aircraft includes a head for grasping an item of luggage. A wrapper for packaging an item of luggage for the automated processing of the item of luggage is also provided. The wrapper is in the form of a protective film and includes a grasping surface separate from but secured to the protective film. A method for automated processing of luggage in an aircraft is provided.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: April 17, 2018
    Assignee: Airbus Operations SAS
    Inventors: Yves Durand, Bernard Guering
  • Patent number: 9813348
    Abstract: A system for transmitting concurrent data flows on a network, includes a memory containing data of data flows; a plurality of queues assigned respectively to the data flows, organized to receive the data as atomic transmission units; a flow regulator to poll the queues in sequence and, if the polled queue contains a full transmission unit, transmitting the unit on the network at a nominal flow-rate of the network; a sequencer to poll the queues in a round-robin manner and enable a data request signal when the filling level of the polled queue is below a threshold common to all queues, which threshold is greater than the size of the largest transmission unit; and a direct memory access configured to receive the data request signal and respond thereto by transferring data from the memory to the corresponding queue at a nominal speed of the system, up to the common threshold.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: November 7, 2017
    Assignee: KALRAY
    Inventors: Yves Durand, Alexandre Blampey
  • Patent number: 9745067
    Abstract: An integrated avionics bay in a floor area can be provided with adequate ventilation. The structure of an aircraft cockpit floor is able to integrate at least one bay, with a walking floor in the cockpit, a structural volume and a bay integrated in a space of the liberated structural volume. The bay as integrated in a horizontal position in this space includes a peripheral frame with at least one protective cover with a direct access to the bay at the floor level and a lower wall with a rear face access. Side openings formed in the frame can couple with vertical walls to allow fresh air blowing from the rear wall of the bay via a flow from rearwards to upwards to reach the top cover and an air extraction by an upper surface extractor.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: August 29, 2017
    Assignee: Airbus Operations (S.A.S.)
    Inventors: Bernard Guering, Yves Durand
  • Patent number: 9714096
    Abstract: An air extraction unit taking the form of a body, the geometric shape of which makes it easier to incorporate into an avionics bay of an aircraft. The air extraction unit derives from a multipurpose approach to the operational components of the avionics bay of an aircraft aimed at achieving weight and cost savings. All of the elements of the air extraction circuit are arranged in a compact housing of the body and are protected by the structure thereof. The air extraction unit can be used as a floor of an avionics bay that can be walked on, with a lateral organization.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: July 25, 2017
    Assignee: Airbus Operations (SAS)
    Inventors: Yves Durand, Bernard Guering
  • Patent number: 9693474
    Abstract: An electrical core of an aircraft is provided. The electrical core includes at least one shelf on which is disposed at least one module containing components and comprising at least one input able to be linked to at least one power supply cable and at least one output able to be linked to at least one output cable. In the module, the output cable or cables travel under or in the shelf disposed under the module.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: June 27, 2017
    Assignee: AIRBUS OPERATIONS SAS
    Inventors: Bernard Guering, Yves Durand
  • Patent number: 9656618
    Abstract: An electrical cabinet of an aircraft is provided. The electrical cabinet includes at least one motherboard including on a first face sockets into which are plugged PCB boards ensuring one or more electrical functions, the said electrical cabinet being linked to the electrical circuit of the aircraft organized as various electrical harnesses by way of an electrical connection system, characterized in that the electrical connection system comprises at the level of the second face of the motherboard at least one additional layer, the free face of the last additional layer comprising sockets each ensuring electrical connection with an electrical harness of the aircraft, the additional layer or layers comprising tracks which make it possible to reorganize the electrical circuits emanating from the sockets intended for the PCB boards so as to render them compliant with the sockets intended for the harnesses of the aircraft.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: May 23, 2017
    Assignee: AIRBUS OPERATIONS S.A.S
    Inventors: Bernard Guering, Yves Durand
  • Patent number: 9565122
    Abstract: A credit-based data flow control method between a consumer device and a producer device. The method includes the steps of decrementing a credit counter for each transmission of a sequence of data by the producer device, arresting data transmission when the credit counter reaches zero, sending a credit each time the consumer device has consumed a data sequence and incrementing the credit counter upon receipt of each credit.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: February 7, 2017
    Assignee: KALRAY
    Inventors: Michel Harrand, Yves Durand, Patrice Couvert, Thomas Champseix, Benoît Dupont De Dinechin
  • Patent number: 9505483
    Abstract: A forward part of an aircraft comprising a fuselage and a landing gear well housing a forward landing gear comprising a breaker strut designed to adopt an extended configuration when the landing gear is extended, configuration in which said breaker strut lies in a strut plane parallel to the transverse direction of the forward part. The forward part comprises a transverse beam resisting strut reactions located above the landing gear well and mounted on the fuselage at its two ends, the beam having a globally rectangular cross-section, in which the median plane parallel to the length of the rectangle is coincident with said strut plane.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: November 29, 2016
    Assignee: AIRBUS OPERATIONS (SAS)
    Inventors: Bernard Guering, Yves Durand
  • Patent number: 9469401
    Abstract: A toilet area for an aircraft cabin comprising an access door and housing a toilet bowl. The toilet area also comprises an evacuation exit, the access door occupying a closed position in the toilet area in a toilet configuration and a folded position in the toilet area in an evacuation configuration. Usage in particular in a flying wing aircraft is provided.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: October 18, 2016
    Assignee: AIRBUS OPERATIONS (SAS)
    Inventors: Yves Durand, Bernard Guering