Patents by Inventor Yves Mathieu

Yves Mathieu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9495793
    Abstract: There is described a method for generating an image view from at least one input image for a 3D display using a backward processing enabling post processing for handling holes in the image view.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: November 15, 2016
    Assignee: ST-ERICSSON SA
    Inventors: Laurent Pasquier, Yves Mathieu, Jean Gobert
  • Publication number: 20140293018
    Abstract: There is described a method for generating an image view from at least one input image for a 3D display using a backward processing enabling post processing for handling holes in the image view.
    Type: Application
    Filed: December 21, 2011
    Publication date: October 2, 2014
    Applicant: ST-Ericsson SA
    Inventors: Laurent Pasquier, Yves Mathieu, Jean Gobert
  • Patent number: 8789620
    Abstract: The invention provides a method of receiving and/or transmitting information in a well drilled in a geological formation between a first location and a second location, the well comprising a casing communicating with the geological formation. The method comprises placing a first transducer at a first location, placing a second transducer at a second location. Transmitting an electric signal between the first and second transducers.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: July 29, 2014
    Assignee: Schlumberger Technology Corporation
    Inventors: Erwan Lemenager, Martin Luling, Yves Mathieu, Christian Chouzenoux
  • Patent number: 8711045
    Abstract: An EM antenna for location on a pipe (10) surrounded by a casing (12). The antenna has a power source (21) for injecting a current across a first insulated section (25) of the pipe (10) and an electrode (22) for conducting the current from the pipe (10) to the casing (12). There is also a second insulated section (23) of the pipe arranged to operate together with the electrode (22) and first insulated section (25) for directing a path flow of the current. Such antennas are described both in relation to repeater arrangements as well as land and sea applications.
    Type: Grant
    Filed: January 21, 2008
    Date of Patent: April 29, 2014
    Assignee: Schlumberger Technology Corporation
    Inventors: Matthe Contant, Erwann Lemenager, Yves Mathieu, Sylvain Chambon
  • Publication number: 20110168446
    Abstract: The invention provides a method of receiving and/or transmitting information in a well drilled in a geological formation between a first location and a second location, the well comprising a casing communicating with the geological formation. The method comprises placing a first transducer at a first location, placing a second transducer at a second location. Transmitting an electric signal between the first and second transducers.
    Type: Application
    Filed: July 28, 2006
    Publication date: July 14, 2011
    Applicant: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Erwan Lemenager, Martin Luling, Yves Mathieu, Christian Chouzenoux
  • Publication number: 20110032117
    Abstract: A downhole electromagnetic telemetry unit for use with a tubing string (5) includes an insulated electrically conductive member (31) and a processing unit (15). The insulated electrically conductive member (31) is electrically coupled to the tubing string (5) at an upper measuring point (23) and a lower measuring point (25). The processing unit (15) is configured to process a voltage difference measured between the upper measuring point (23) and the lower measuring point (25) across the insulated electrically conductive member (31) and to derive therefrom a signal transmitted from a surface location (13).
    Type: Application
    Filed: December 18, 2008
    Publication date: February 10, 2011
    Inventors: Matthe Contant, Erwann Lemenager, Yves Mathieu, Juergen Zach
  • Publication number: 20100149056
    Abstract: An EM antenna for location on a pipe (10) surrounded by a casing (12). The antenna has a power source (21) for injecting a current across a first insulated section (25) of the pipe (10) and an electrode (22) for conducting the current from the pipe (10) to the casing (12). There is also a second insulated section (23) of the pipe arranged to operate together with the electrode (22) and first insulated section (25) for directing a path flow of the current. Such antennas are described both in relation to repeater arrangements as well as land and sea applications.
    Type: Application
    Filed: January 21, 2008
    Publication date: June 17, 2010
    Inventors: Matthe Contant, Erwann Lemenager, Yves Mathieu, Sylvain Chambon
  • Patent number: 7645684
    Abstract: A method of producing a substrate that has a transfer crystalline layer transferred from a donor wafer onto a support. The transfer layer can include one or more foreign species to modify its properties. In the preferred embodiment an atomic species is implanted into a zone of the donor wafer that is substantially free of foreign species to form an embrittlement or weakened zone below a bonding face thereof, with the weakened zone and the bonding face delimiting a transfer layer to be transferred. The donor wafer is preferably then bonded at the level of its bonding face to a support. Stresses are then preferably applied to produce a cleavage in the region of the weakened zone to obtain a substrate that includes the support and the transfer layer. Foreign species are preferably diffused into the thickness of the transfer layer prior to implantation or after cleavage to modify the properties of the transfer layer, preferably its electrical or optical properties.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: January 12, 2010
    Assignees: S.O.I.Tec Silicon on Insulator Technologies, Commissariat a l'Energie Atomique
    Inventors: Fabrice Letertre, Yves Mathieu Le Vaillant, Eric Jalaguier
  • Patent number: 7535115
    Abstract: A method of producing a substrate that has a transfer crystalline layer transferred from a donor wafer onto a support. The transfer layer can include one or more foreign species to modify its properties. In the preferred embodiment an atomic species is implanted into a zone of the donor wafer that is substantially free of foreign species to form an embrittlement or weakened zone below a bonding face thereof, with the weakened zone and the bonding face delimiting a transfer layer to be transferred. The donor wafer is preferably then bonded at the level of its bonding face to a support. Stresses are then preferably applied to produce a cleavage in the region of the weakened zone to obtain a substrate that includes the support and the transfer layer. Foreign species are preferably diffused into the thickness of the transfer layer prior to implanbumtation or after cleavage to modify the properties of the transfer layer, preferably its electrical or optical properties.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: May 19, 2009
    Assignees: S.O.I.Tec Silicon on Insulator Technologies, Commissariat a l'Energie Atomique (CEA)
    Inventors: Fabrice Letertre, Yves Mathieu Le Vaillant, Eric Jalaguier
  • Patent number: 7520321
    Abstract: A well instrumentation system, comprising: a power and data supply; and a plurality of functional units attached to the power and data supply and distributed throughout the well, characterised in that the power and data supply comprises first and second substantially identical cables, and in that each unit comprises a first power supply channel and a first data channel connected to the first cable, a second power supply channel and a second data channel connected to the second cable, and a functional module which draws power from the first power supply channel or the second power channel module, and data from the first data channel or the second data channel. The power and data supply can comprise a surface unit that can be selectably connected to either the first or second cable. The selection of connection of the surface unit to one or other cable is effective to select the corresponding power and data channels in the functional units.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: April 21, 2009
    Assignee: Schlumberger Technology Corporation
    Inventors: Stéphane Hiron, Yves Mathieu, Christian Chouzenoux, Patrick Gourdonneau, Nicolas Renoux
  • Publication number: 20080248631
    Abstract: A method of producing a substrate that has a transfer crystalline layer transferred from a donor wafer onto a support. The transfer layer can include one or more foreign species to modify its properties. In the preferred embodiment an atomic species is implanted into a zone of the donor wafer that is substantially free of foreign species to form an embrittlement or weakened zone below a bonding face thereof, with the weakened zone and the bonding face delimiting a transfer layer to be transferred. The donor wafer is preferably then bonded at the level of its bonding face to a support. Stresses are then preferably applied to produce a cleavage in the region of the weakened zone to obtain a substrate that includes the support and the transfer layer. Foreign species are preferably diffused into the thickness of the transfer layer prior to implantation or after cleavage to modify the properties of the transfer layer, preferably its electrical or optical properties.
    Type: Application
    Filed: June 16, 2008
    Publication date: October 9, 2008
    Inventors: Fabrice Letertre, Yves Mathieu Le Vaillant, Eric Jalaguier
  • Patent number: 7378729
    Abstract: A donor wafer resulting from a method of recycling the wafer after detaching at least one useful layer. The donor wafer includes a substrate; a buffer structure on the substrate; a protective layer associated with the buffer structure; and a post detachment layer located above the buffer structure and presenting projections or rough portions on its surface. The protective layer prevents removal of the entire buffer structure when the post detachment layer is removed.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: May 27, 2008
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud, Yves-Mathieu Le Vaillant, Takeshi Akatsu
  • Publication number: 20070198783
    Abstract: The present invention relates to a memory management unit (MMU) for storing data values, said memory management unit comprising a memory unit (IM) which is adapted to store temporarily at least two sets of data values; and a controller (CTRL) which is configured such that it is able to store a first set of data values in a first area of the memory unit, and to store a second set of data values spatially adjacent to the first set of data values in a horizontal and/or in a vertical direction in such a way that a first part of the second set of data values is stored in a second area of the memory unit adjacent to the first area in a horizontal and/or in a vertical direction, respectively, and that the other part of the second set of data values to be stored which exceeds the memory unit size in a horizontal and/or in a vertical direction, respectively, is stored in at least one other area of the memory unit according to a torus principle.
    Type: Application
    Filed: April 21, 2005
    Publication date: August 23, 2007
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
    Inventors: Christophe Cunat, Jean Gobert, Yves Mathieu
  • Patent number: 7256075
    Abstract: The invention relates to a method of transferring useful layers from a donor wafer which includes a multi-layer structure on the surface of the donor wafer that has a thickness sufficient to form multiple useful layers for subsequent detachment. The layers may be formed of materials having sufficiently different properties such that they may be selectively removed. The layers of material may also include sub-layers that can be selectively removed from each other.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: August 14, 2007
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud, Takeshi Akatsu, Yves Mathieu Le Vaillant
  • Publication number: 20070080963
    Abstract: A method of mapping an input image split into input triangles including texels onto an output image also split into corresponding output triangles including pixels. Said method comprising the steps of: determining an inverse affine transform (BT) for transforming an intermediate rectangle triangle (T0) into an input triangle (T1); determining a direct affine transform (FT) for transforming the intermediate rectangle triangle (T0) into an output triangle (T2); applying the inverse affine transform to intermediate points of the intermediate rectangle triangle (T0) so as to determine intermediate intensity values corresponding to said intermediate points on the basis of input intensity values of texels; and applying the direct affine transform to the intermediate points so as to determine output intensity values of pixels on the basis of the intermediate intensity values.
    Type: Application
    Filed: December 29, 2004
    Publication date: April 12, 2007
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Cunat Christophe, Yves Mathieu
  • Patent number: 7187162
    Abstract: A tool for disuniting two wafers, at least one of which is for use in fabricating substrates for microelectronics, optoelectronics, or optics, the tool comprising two gripper members suitable for being fixed temporarily to respective opposite faces of the two wafers that are united with each other, and a disuniting control device suitable for moving said members relative to each other. The tool is remarkable in that the disuniting control device comprises an actuator for positively displacing said gripper members and for inducing controlled flexing in at least one of said members. This makes it easier to disunite the wafers while reducing the risk of damaging them. The invention is applicable to disuniting wafers that have been weakened by implantation, that have been temporarily bonded together, etc.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: March 6, 2007
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Sebastien Kerdiles, Yves-Mathieu Le Vaillant
  • Publication number: 20070007001
    Abstract: A well instrumentation system, comprising: a power and data supply; and a plurality of functional units attached to the power and data supply and distributed throughout the well, characterised in that the power and data supply comprises first and second substantially identical cables, and in that each unit comprises a first power supply channel and a first data channel connected to the first cable, a second power supply channel and a second data channel connected to the second cable, and a functional module which draws power from the first power supply channel or the second power channel module, and data from the first data channel or the second data channel. The power and data supply can comprise a surface unit that can be selectably connected to either the first or second cable. The selection of connection of the surface unit to one or other cable is effective to select the corresponding power and data channels in the functional units.
    Type: Application
    Filed: April 9, 2004
    Publication date: January 11, 2007
    Inventors: Stephane Hiron, Yves Mathieu, Christian Chouzenoux, Patrick Gourdonneau, Nicolas Renoux
  • Publication number: 20060270244
    Abstract: The present invention provides a method of forming a structure produced from semiconductor materials with the structure having a substrate layer and an insulating layer, and the method including the steps of creating the insulating layer involving constituting an oxidizable layer on the substrate layer and oxidizing the oxidizable layer. The method includes the steps of providing a thin elemental insulating layer at a mean thickness of 20 nm or less upon a substrate layer; providing an oxidizable layer upon the insulating layer; thermally oxidizing the oxidizable layer so that the combination of the oxidized oxidizable layer and the thin elemental insulating layer provides a desired thickness of the insulating layer of the structure.
    Type: Application
    Filed: August 17, 2005
    Publication date: November 30, 2006
    Inventors: Nicolas Daval, Yves-Mathieu Le Vaillant
  • Publication number: 20060197096
    Abstract: This invention provides a composite substrate that has a transparent mechanical support, for example of glass or quartz, a film or thin layer of monocrystalline semi-conductive material and an intermediate antireflective layer located between the thin layer or the semi-conductive film and the support. The composition of the intermediate antireflective layer varies between the support and the semi-conductive film, so that the refractive index similarly varies.
    Type: Application
    Filed: April 25, 2006
    Publication date: September 7, 2006
    Inventors: Sebastien Kerdiles, Yves-Mathieu Le Vaillant
  • Patent number: 7033905
    Abstract: A method of recycling a donor wafer after detaching at least one useful layer is provided, the donor wafer comprising successively a substrate, a buffer structure and, before detachment, a useful layer. The method comprises employing mechanical means to remove part of the donor wafer on the side where the detachment took place, such that, after removal of substance, there remains at least part of the buffer structure capable of being reused as at least part of a buffer structure during a subsequent detachment of a useful layer. The present document also relates to methods of detaching a thin layer from a donor wafer which can be recycled according to the invention, as well as donor wafers which can be recycled in accordance with the invention.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: April 25, 2006
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud, Yves-Mathieu Vaillant, Takeshi Akatsu