Abstract: A system and method to automatically determine power plane shape in a printed circuit board (PCB) involve obtaining inputs. The inputs include a size and shape of the PCB, a set of sources, and a set of sinks associated with a power plane. The method also includes determining a center of charge (CoC) as a center of largest current density for the set of sources and the set of sinks, and creating a sub-shape corresponding with a path from each source of the set of sources and from each sink of the set of sinks to the CoC. The creating the sub-shape includes determining a width of a conductor in the path corresponding with each of the sub-shapes. The sub-shapes created for the set of sources and the set of sinks are combined as the power plane shape.

Abstract: Methods of fabricating tamper-respondent assemblies with bond protection are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly.

Abstract: A system and method to automatically determine power plane shape in a printed circuit board (PCB) involve obtaining inputs. The inputs include a size and shape of the PCB, a set of sources, and a set of sinks associated with a power plane. The method also includes determining a center of charge (CoC) as a center of largest current density for the set of sources and the set of sinks, and creating a sub-shape corresponding with a path from each source of the set of sources and from each sink of the set of sinks to the CoC. The creating the sub-shape includes determining a width of a conductor in the path corresponding with each of the sub-shapes. The sub-shapes created for the set of sources and the set of sinks are combined as the power plane shape.

Abstract: Fabrication of a circuit board is facilitated by automatically determining an optimized power plane shape for a power plane of the circuit board, including ascertaining for the power plane a source location(s) and a sink location(s), where the source supplies power to the sink across the power plane. A center of current density is determined for the power plane shape, and a respective power plane sub-shape is incrementally generated between the center of current density and each source and sink location to, in part, supply a desired operational voltage from the source location(s) to the sink location(s) across the power plane. The respective power plane sub-shapes are combined into the optimized power plane shape. Further, the process includes initiating fabricating of the circuit board using, at least in part, the optimized power plane shape to provide the power plane shape within the circuit board.

Abstract: Fabrication of a circuit board is facilitated by automatically determining an optimized power plane shape for a power plane of the circuit board, including ascertaining for the power plane a source location(s) and a sink location(s), where the source supplies power to the sink across the power plane. A center of current density is determined for the power plane shape, and a respective power plane sub-shape is incrementally generated between the center of current density and each source and sink location to, in part, supply a desired operational voltage from the source location(s) to the sink location(s) across the power plane. The respective power plane sub-shapes are combined into the optimized power plane shape. Further, the process includes initiating fabricating of the circuit board using, at least in part, the optimized power plane shape to provide the power plane shape within the circuit board.

Abstract: A pin assembly is provided for a plated via of a circuit board. The pin assembly includes a pin sized for insertion into the plated via, and a plurality of expandable elements affixed to the pin. A conductive coating is disposed over the pin and over the plurality of expandable elements. With the pin assembly inserted into the plated via, one or more expandable elements of the plurality of expandable elements can be expanded within the plated via to enhance contact of the pin assembly to a wall of the plated via.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly. In enhanced embodiments, the conductive trace(s) is a chemically compromisable conductor susceptible to damage during a chemical attack on the adhesive within the external bond region(s).

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly. In enhanced embodiments, the conductive trace(s) is a chemically compromisable conductor susceptible to damage during a chemical attack on the adhesive within the external bond region(s).

Abstract: Methods of fabricating tamper-respondent assemblies with bond protection are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly.

Abstract: Methods of fabricating tamper-respondent assemblies with bond protection are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly. In enhanced embodiments, the conductive trace(s) is a chemically compromisable conductor susceptible to damage during a chemical attack on the adhesive within the external bond region(s).

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an electronic enclosure and a tamper-respondent electronic circuit structure. The electronic enclosure encloses, at least in part, at least one electronic component to be protected, and includes an inner main surface, and an inner sidewall surface which has at least one inner-sidewall corner. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor covering, at least in part, the inner sidewall surface of the electronic enclosure. The tamper-respondent sensor includes a flexible layer(s) with tamper-detect circuit lines and multiple slots provided therein. The multiple slots facilitate disposing the tamper-respondent sensor to cover the at least one inner-sidewall corner of the inner sidewall surface by allowing for one or more regions of overlap of the flexible layer(s) of the tamper-respondent sensor at the at least one inner-sidewall corner of the electronic enclosure.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an electronic enclosure and a tamper-respondent electronic circuit structure. The electronic enclosure encloses, at least in part, at least one electronic component to be protected, and includes an inner main surface, and an inner sidewall surface which has at least one inner-sidewall corner. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor covering, at least in part, the inner sidewall surface of the electronic enclosure. The tamper-respondent sensor includes a flexible layer(s) with tamper-detect circuit lines and multiple slots provided therein. The multiple slots facilitate disposing the tamper-respondent sensor to cover the at least one inner-sidewall corner of the inner sidewall surface by allowing for one or more regions of overlap of the flexible layer(s) of the tamper-respondent sensor at the at least one inner-sidewall corner of the electronic enclosure.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an electronic enclosure and a tamper-respondent electronic circuit structure. The electronic enclosure encloses, at least in part, at least one electronic component to be protected, and includes an inner main surface, and an inner sidewall surface which has at least one inner-sidewall corner. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor covering, at least in part, the inner sidewall surface of the electronic enclosure. The tamper-respondent sensor includes multiple slots provided therein. The multiple slots facilitate disposing the tamper-respondent sensor to cover the at least one inner-sidewall corner of the inner sidewall surface by allowing for one or more regions of overlap of the tamper-respondent sensor at the at least one inner-sidewall corner of the electronic enclosure.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly. In enhanced embodiments, the conductive trace(s) is a chemically compromisable conductor susceptible to damage during a chemical attack on the adhesive within the external bond region(s).

Abstract: Methods of fabricating tamper-respondent assemblies with bond protection are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly.

Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an electronic enclosure and a tamper-respondent electronic circuit structure. The electronic enclosure encloses, at least in part, at least one electronic component to be protected, and includes an inner main surface, and an inner sidewall surface which has at least one inner-sidewall corner. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor covering, at least in part, the inner sidewall surface of the electronic enclosure. The tamper-respondent sensor includes multiple slots provided therein. The multiple slots facilitate disposing the tamper-respondent sensor to cover the at least one inner-sidewall corner of the inner sidewall surface by allowing for one or more regions of overlap of the tamper-respondent sensor at the at least one inner-sidewall corner of the electronic enclosure.