Abstract: The present application relates to a wafer transfer module in a semiconductor manufacturing machine, relating to semiconductor integrated circuit manufacturing machines, wherein two sets of transmitter/receivers are provide on sidewalls of the wafer transfer module to monitor the travel position of an elevator, two sets of transmitter/receivers are provide on the sidewalls of the wafer transfer module to monitor the position of a transfer arm, a signal received by the receiver is transmitted to a control system such that the control system determines, according to the travel position of the elevator and the transfer arm position, whether the transfer arm can obtain a to-be-transferred wafer, thereby preventing the problem of a wafer scratch caused by an elevator position deviation or a transfer arm position deviation.

Abstract: The present application discloses a preventive maintenance method for a chamber of a metal etching machine. An optimized burning cleaning recipe is added before the chamber is opened, and metal substances remaining on the surface of an electrostatic chuck are removed by adopting a cleaning/pumping down multi-step alternate method. Before the chamber is opened for preventive maintenance, the phenomenon of metal particles remaining on the surface of the electrostatic chuck can be significantly improved, thus solving the downtime problem caused by abnormal backside helium and ensuring the stability of mass production.

Abstract: The present application discloses a preventive maintenance method for a chamber of a metal etching machine. An optimized burning cleaning recipe is added before the chamber is opened, and metal substances remaining on the surface of an electrostatic chuck are removed by adopting a cleaning/pumping down multi-step alternate method. Before the chamber is opened for preventive maintenance, the phenomenon of metal particles remaining on the surface of the electrostatic chuck can be significantly improved, thus solving the downtime problem caused by abnormal backside helium and ensuring the stability of mass production.

Abstract: The present application discloses a method for manufacturing shallow trench isolation, comprising: step 1: performing first time etching on a semiconductor substrate by means of a dry etching process to form the shallow trench, wherein in the first time etching, metal ions are released from a dry etching process chamber and deposited on the inner surface of the shallow trench, and the metal ions diffuse and form a contamination layer; and step 2: performing second time etching on the semiconductor substrate exposed on the inner surface of the shallow trench by means of a wet etching process to remove the contamination layer on the inner surface of the shallow trench. In the present application, the metal ions released from the dry etching process chamber and deposited on the inner surface of the shallow trench during the dry etching of the shallow trench can be removed.

Abstract: The present application discloses a vacuum pumping valve for semiconductor equipment and a vacuum control system, wherein the vacuum pumping valve includes a driving device, a base, a rotary disk, and a set of blades, wherein the blades are mounted between the base and the rotary disk, the rotary disk driven by the driving device drives the blades to move synchronously on the base, the moving blades together form a pumping orifice, the shape of the pumping orifice is a regular polygon coaxial with the rotary disk, and the opening of the pumping orifice is adjustable by means of synchronous movement of the blades. In the present application, the effective passage area of the gas flow and vacuum pressure of the reaction chamber can be controlled, and the problem of an asymmetric gas plasma distribution can be effectively resolved.

Abstract: The present application relates to a wafer transfer module in a semiconductor manufacturing machine, relating to semiconductor integrated circuit manufacturing machines, wherein two sets of transmitter/receivers are provide on sidewalls of the wafer transfer module to monitor the travel position of an elevator, two sets of transmitter/receivers are provide on the sidewalls of the wafer transfer module to monitor the position of a transfer arm, a signal received by the receiver is transmitted to a control system such that the control system determines, according to the travel position of the elevator and the transfer arm position, whether the transfer arm can obtain a to-be-transferred wafer, thereby preventing the problem of a wafer scratch caused by an elevator position deviation or a transfer arm position deviation.

Abstract: A method of etching a shallow trench is disclosed in the present invention. By removing the photoresist layer immediately at the end point of the hard mask layer etching and further using the improved process conditions etch the top of the substrate at the same time of the hard mask layer over-etching, such as a lower bias power, a higher pressure and a bigger polymer gases flow rate, the present invention has formed a smooth morphology on the top of the shallow trench. Therefore, the sharp corner appeared in the prior art is avoided by changing the start point of the silicon substrate etching, so as to fundamentally eliminate the leakage current caused by the sharp corner.

Abstract: A method for etching a polysilicon gate is disclosed, wherein the polysilicon gate includes an undoped polysilicon portion and a doped polysilicon portion that is situated on the undoped polysilicon portion. The method includes: obtaining a thickness of the undoped polysilicon portion and a thickness of the doped polysilicon portion by using an optical linewidth measurement device; and etching the undoped polysilicon portion and the doped polysilicon portion by using two respective steps with different parameters, respective etching time for the undoped polysilicon portion and the doped polysilicon portion of every wafer being adjusted in real time by using an advanced process control system. This method enables the doped and undoped polysilicon portions of each polysilicon gate on every wafer to have substantially consistent profiles between each other.

Abstract: The present invention discloses a method for reducing the morphological difference between N-doped and undoped poly-silicon gates after etching, comprising the following sequential steps: depositing a hard mask layer on a substrate template having N-doped poly-silicon and undoped poly-silicon to form an N-doped poly-silicon hard mask layer and an undoped poly-silicon hard mask layer respectively, and etching the undoped poly-silicon hard mask layer to make a thickness difference between the N-doped poly-silicon hard mask layer and the undoped poly-silicon hard mask layer; depositing an anti-reflection layer, and etching according to a predetermined pattern until exposing the N-doped poly-silicon, wherein when the N-doped poly-silicon is exposed, the undoped poly-silicon is etched to a certain degree; and removing residuals on the surface of the above formed structure, and etching to form an N-doped poly-silicon gate and an undoped poly-silicon gate, respectively.

Abstract: The present invention discloses a method for reducing the morphological difference between N-doped and undoped poly-silicon gates after etching, comprising the following sequential steps: depositing a hard mask layer on a substrate template having N-doped poly-silicon and undoped poly-silicon to form an N-doped poly-silicon hard mask layer and an undoped poly-silicon hard mask layer respectively, and etching the undoped poly-silicon hard mask layer to make a thickness difference between the N-doped poly-silicon hard mask layer and the undoped poly-silicon hard mask layer; depositing an anti-reflection layer, and etching according to a predetermined pattern until exposing the N-doped poly-silicon, wherein when the N-doped poly-silicon is exposed, the undoped poly-silicon is etched to a certain degree; and removing residuals on the surface of the above formed structure, and etching to form an N-doped poly-silicon gate and an undoped poly-silicon gate, respectively.