Abstract: A circuit arrangement includes an array of switches that represent a Boolean satisfiability expression that has a plurality of clauses each defined by a combination of Boolean variables Xi or ¬Xi, a first plane, and a constraints network operatively arranged with the first plane. The constraints network enforces each of the clauses such that values of different ones of the variables continue to randomly or pseudo randomly flip until the values of the variables Xi and ¬Xi stop changing or a predetermined condition occurs.

Abstract: A high-efficiency power semiconductor rectifier device (10) comprising a ?P++ layer (12), a P-body (14), an N-drift region (16), an N+ substrate (18), an anode (20), and a cathode (22). The method of fabricating the device (10) comprises the steps of depositing the N-drift region (16) on the N+ substrate (18), implanting boron into the N-drift region (16) to create a P-body region (14), forming a layer of titanium silicide (56) on the P-body region (14), and concentrating a portion of the implanted boron at the interface region between the layer of titanium silicide (56) and the P-body region (14) to create the ?P++ layer (12) of supersaturated P-doped silicon.

Abstract: A high-efficiency power semiconductor rectifier device (10) comprising a ?P++ layer (12), a P-body (14), an N-drift region (16), an N+ substrate (18), an anode (20), and a cathode (22). The method of fabricating the device (10) comprises the steps of depositing the N-drift region (16) on the N+ substrate (18), implanting boron into the N-drift region (16) to create a P-body region (14), forming a layer of titanium silicide (56) on the P-body region (14), and concentrating a portion of the implanted boron at the interface region between the layer of titanium silicide (56) and the P-body region (14) to create the ?P++ layer (12) of supersaturated P-doped silicon.