Patents by Inventor Zeng Xu

Zeng Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10929332
    Abstract: The present application relates to the field of integrated circuit design and manufacturing, and discloses a USB transmission device and a transmission method, which may greatly improve the transmission rate when transmitting a large number of small files. The device includes: a configuration module, configured to configure a first transfer ring corresponding to a first transfer thread and a second transfer ring corresponding to a second transfer thread for one endpoint in a memory; a USB host controller, configured to directly perform a transmission of the second transfer thread according to the configured second transfer ring when a transmission of the first transfer thread ends.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: February 23, 2021
    Assignee: MONTAGE LZ TECHNOLOGIES (Chengdu) Co., Ltd.
    Inventor: Zeng Xu
  • Publication number: 20200183875
    Abstract: The present application relates to the field of integrated circuit design and manufacturing, and discloses a USB transmission device and a transmission method, which may greatly improve the transmission rate when transmitting a large number of small files. The device includes: a configuration module, configured to configure a first transfer ring corresponding to a first transfer thread and a second transfer ring corresponding to a second transfer thread for one endpoint in a memory; a USB host controller, configured to directly perform a transmission of the second transfer thread according to the configured second transfer ring when a transmission of the first transfer thread ends.
    Type: Application
    Filed: October 15, 2019
    Publication date: June 11, 2020
    Applicant: MONTAGE LZ TECHNOLOGIES (CHENGDU) CO., LTD.
    Inventor: Zeng XU
  • Publication number: 20080127797
    Abstract: A hole punch comprising a movable punch pin arranged to punch a hole in a material. The hole punch comprises a first lever pivotally attached to a base, and in communication with the punch pin. The hole punch also includes a second lever pivotally attached to the first lever, and a third lever pivotally attached to the base, and pivotally attached to the second lever. Rotation of the third lever is arranged to drive movement of the second lever and first lever to cause movement of the punch pin.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 5, 2008
    Applicant: Helix Limited
    Inventor: Zeng Xu HUI
  • Patent number: 6724214
    Abstract: A first on-chip test structure monitors hot carrier degradation. A degrading ring oscillator is subjected to hot carrier effects while a non-degrading ring oscillator is not. As the device ages, hot carrier effects degrade the degrading ring counter. The second test structure monitors TDDB degradation. A plurality of N parallel connected capacitors have a stress voltage applied to them such that the time to failure of the first capacitor is the same that experienced by percentage of gates under normal usage. A drop in the resistance indicates breakdown of a capacitor. The third test structure monitors electromigration degradation. M minimum width metal lines are connected in parallel. A current is applied such that the time to failure of all metal lines is the same as that experienced by a percentage of minimum width metal lines under normal usage. An increase in resistance indicates breakdown of a metal line.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: April 20, 2004
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Indrajit Manna, Lo Keng Foo, Guo Qiang, Zeng Xu
  • Publication number: 20040051553
    Abstract: Described is a system with three on chip monitoring test structures. If any of the three test structures indicates an end of life failure, a bit will be set indicating that the IC is near failure and should be replaced. This is done prior to actual device failure and will eliminate down time of the system where this IC is used. The first test structure monitors hot carrier degradation and is comprised of two ring oscillators. One is subjected to hot carrier effects (degrading ring oscillator) and the other is not subjected to hot carrier effects (non-degrading ring oscillator). Initially, both ring oscillators will each have fixed frequencies, but as the device ages, hot carrier effects degrade the degrading ring counter. Using the non-degrading ring oscillator, the degradation can be quantified and flag a failure. The second test structure monitors TDDB degradation.
    Type: Application
    Filed: September 13, 2002
    Publication date: March 18, 2004
    Applicant: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Indrajit Manna, Lo Keng Foo, Guo Qiang, Zeng Xu