Patents by Inventor Zhang Jin

Zhang Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171432
    Abstract: Mechanisms may be used for aggregating acknowledgement (ACK), block ACK (BA) and/or short packets transmissions for multi-user (MU) wireless communication systems. Aggregation mechanisms may be used for uplink (UL) and/or downlink (DL) orthogonal frequency division multiple access (OFDMA), and/or UL/DL multiple-user multiple input multiple output (MU-MIMO) transmissions, for example. Multi-user short packets may be aggregated and/or simultaneously transmitted for DL, UL, or peer-to-peer (P2P) transmissions.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Fengjun Xi, Hanqing Lou, Oghenekome Oteri, Nirav B. Shah, Robert L. Olesen, Yuan Sheng Jin, Pengfei Xia, Frank La Sita, Guodong Zhang
  • Publication number: 20240116853
    Abstract: 2-hydroxy-5-[2-(4-(trifluoromethylphenyl)ethylamino)]benzoic acid crystal forms and a preparation method therefor are proposed. Crystal form I is a monoclinic crystal system, which has a Pc space group and can be obtained by slow cooling, evaporating the solvent at a constant temperature, evaporating the solvent at an increased temperature, or adding an anti-solvent. Crystal form II is a triclinic crystal system, which has a P1 space group and can be obtained by rapid cooling or freeze-drying. According to the method, the process is simple, costs are low, and the yield exceeds 90%; and the crystal forms of the crystal forms I and II have high purity, the crystal shapes thereof are intact, and have excellent fluidity, facilitating preparation, particularly the preparation of a pharmaceutical preparation for preventing and/or treating degenerative diseases of the central nervous system. Furthermore, the two crystal forms have a better apparent solubility than that of raw materials.
    Type: Application
    Filed: December 6, 2021
    Publication date: April 11, 2024
    Inventors: Xinliang XU, Guoqing ZHANG, Chenghan ZHUANG, Lei WANG, Byoung Joo GWAG, Chun San AHN, Jing Yu JIN
  • Publication number: 20240116934
    Abstract: A class of pyrimidoheterocyclic compounds, and specifically disclosed is a compound represented by formula (III) or a pharmaceutically acceptable salt thereof.
    Type: Application
    Filed: September 22, 2023
    Publication date: April 11, 2024
    Inventors: Yang ZHANG, Wentao WU, Jing ZHANG, Jikui SUN, Yangyang XU, Zhijian CHEN, John Fenyu JIN, Shuhui CHEN
  • Patent number: 11943115
    Abstract: A computer-implemented method for local arrangement of remote deployment is provided according to embodiments of the present disclosure. In this method, a starting request to connect with a remote virtualization entity proxy can be received. A network tunnel can be initiated between a local system and the remote virtualization entity proxy. Then, at least one component in the remote virtualization entity proxy can be arranged into a local virtualization entity in the local system via the network tunnel.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: March 26, 2024
    Assignee: International Business Machines Corporation
    Inventors: Guanqin Zhang, Lei Ren, Gui Ying Jin, Xiao Guang Luo, Yue Chen
  • Patent number: 10886608
    Abstract: In an aspect, an apparatus may be an apparatus for wireless communication. The apparatus for wireless communication may include a transceiver, a memory, and at least one processor coupled to the memory and configured to execute instructions stored in the memory to control the transceiver. In another aspect, an apparatus may be an apparatus for wireless communication. The apparatus for wireless communication may include a patch antenna coupled to the transceiver. The patch antenna includes a patch, a ground plane substantially located with respect to the patch, a probe feed coupled to the patch, and a slot-coupled feed configured to couple to the patch.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: January 5, 2021
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jeong II Kim, Jorge Fabrega Sanchez, Mohammad Ali Tassoudji, Abbas Abbaspour-Tamijani, Yu-Chin Ou, Zhang Jin, Thomas Myers
  • Patent number: 10643985
    Abstract: An integrated circuit (IC) includes a capacitor array in at least one first back-end-of-line (BEOL) interconnect level. The capacitor array includes a pair of capacitor manifolds coupled to parallel capacitor routing traces and capacitors coupled between each pair of parallel capacitor routing traces. The IC also includes an inductor trace having at least one turn in at least one second BEOL interconnect level. The inductor trace defines a perimeter to overlap at least a portion of the capacitor array.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: May 5, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Haitao Cheng, Zhang Jin
  • Patent number: 10600731
    Abstract: An integrated circuit includes a capacitor (e.g., a folded metal-oxide-metal (MOM) capacitor) formed in the lower BEOL interconnect levels, without degrading an inductor's Q-factor. The integrated circuit includes the capacitor in one or more back-end-of-line (BEOL) interconnect levels. The capacitor includes multiple folded capacitor fingers having multiple sides and a pair of manifolds on a same side of the folded capacitor fingers. Each of the pair of manifolds is coupled to one or more of the folded capacitor fingers. The integrated circuit also includes an inductive trace having one or more turns in one or more different BEOL interconnect levels. The inductive trace overlaps one or more portions of the capacitor.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: March 24, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Haitao Cheng, Zhang Jin
  • Patent number: 10573950
    Abstract: Certain aspects of the present disclosure provide a directional coupler. In certain aspects, the directional coupler generally includes a first inductor and a second inductor wirelessly coupled to the first inductor. In certain aspects, the directional coupler generally includes an input port at a first terminal of the first inductor and a transmitted port at a second terminal of the first inductor. In certain aspects, the directional coupler generally includes a coupled port at a first terminal of the second inductor and an isolated port at a second terminal of the second inductor. In certain aspects, the directional coupler generally includes a first complex impedance component directly coupled to the isolated port and a second complex impedance component directly coupled to the coupled port.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: February 25, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Haitao Cheng, Zhang Jin, Abbas Abbaspour-Tamijani
  • Patent number: 10511278
    Abstract: Certain aspects of the present disclosure are generally directed to a structure for a balanced-unbalanced (balun) transformer. For example, certain aspects of the present disclosure provide a transformer that generally includes a first winding having a first terminal coupled to an input node and a second terminal coupled to a reference potential node. The transformer may also include a first impedance coupled between a center tap of the first winding and the reference potential node, and a second winding magnetically coupled to the first winding and having a first terminal coupled to a first differential node of a differential output pair, a second terminal coupled to a second differential node of the differential output pair, and a center tap coupled to the reference potential node.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: December 17, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Haitao Cheng, Zhang Jin
  • Publication number: 20190378793
    Abstract: Aspects generally relate to forming components in an area inside a guard ring structure in an integrated circuit.
    Type: Application
    Filed: June 7, 2018
    Publication date: December 12, 2019
    Inventors: Haitao CHENG, Zhang JIN, Xinmin YU
  • Publication number: 20190371725
    Abstract: An integrated circuit with differential metal-oxide-metal (MOM)/metal-insulator-metal (MIM) capacitors to improve circuit isolation includes a first multi-layer capacitor in a first path of a differential circuit and a second multi-layer capacitor in a second path of the differential circuit. The first multi-layer capacitor resides in a first interconnect layer and a second interconnect layer and includes a first pair of ports. The second multi-layer capacitor overlaps one or more portions of the first multi-layer capacitor. The second multi-layer capacitor includes a second pair of ports and resides in a third interconnect layer and a fourth interconnect layer.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 5, 2019
    Inventors: Haitao CHENG, Zhang JIN
  • Patent number: 10469122
    Abstract: Various aspects described herein relate to low-loss multi-band multiplexing schemes for a wireless communications system, for example, a 5th Generation (5G) New Radio (NR) system. In an aspect, a multiplexer for multi-band wireless communications comprises at least one tuning component configured to transmit or receive at least one signal within a frequency band that is selected from a plurality of frequency bands. The multiplexer further comprises at least one combining component, communicatively coupled with the at least one tuning component, configured to transmit or receive the at least one signal within the selected frequency band. In an aspect, the at least one tuning component is integrated on a chip and the at least one combining component is not integrated on the chip.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: November 5, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Chirag Dipak Patel, Lai Kan Leung, Zhang Jin, Chinmaya Mishra, Ravi Sridhara, Youngchang Yoon
  • Publication number: 20190326872
    Abstract: Certain aspects of the present disclosure are generally directed to a structure for a balanced-unbalanced (balun) transformer. For example, certain aspects of the present disclosure provide a transformer that generally includes a first winding having a first terminal coupled to an input node and a second terminal coupled to a reference potential node. The transformer may also include a first impedance coupled between a center tap of the first winding and the reference potential node, and a second winding magnetically coupled to the first winding and having a first terminal coupled to a first differential node of a differential output pair, a second terminal coupled to a second differential node of the differential output pair, and a center tap coupled to the reference potential node.
    Type: Application
    Filed: April 23, 2018
    Publication date: October 24, 2019
    Inventors: Haitao CHENG, Zhang JIN
  • Patent number: 10446898
    Abstract: A coplanar waveguide may include a first transmission line extending between a first ground plane and a second ground plane at a first interconnect level. The coplanar waveguide may further include a shielding layer at a second interconnect level. The shielding layer may include a first set of conductive fingers coupled to the first ground plane. The first set of conductive fingers may be interdigitated with a second set of conductive fingers that are coupled to the second ground plane. Only a dielectric layer may be between the first set of conductive interdigitated fingers and the second set of conductive interdigitated fingers. The first ground plane, the second ground plane, the dielectric layer, and the shielding layer may form a capacitor.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: October 15, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Haitao Cheng, Zhang Jin
  • Patent number: 10439739
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus employing an isolation ring having a center strip of conductive material used to isolate magnetic fields generated by common-mode and differential-mode current flow through one or more inductors disposed in the ring. The apparatus generally includes an electrical component having an inductive element and a ring of electrically conductive material encircling the inductive element, wherein the ring has a strip of electrically conductive material disposed in the ring and connecting a first point on the ring to a second point on the ring.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: October 8, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Zhang Jin, Yung-Chung Lo, Youngchang Yoon, Ning Yuan, Apsara Ravish Suvarna
  • Publication number: 20190259701
    Abstract: An integrated circuit includes a capacitor (e.g., a folded metal-oxide-metal (MOM) capacitor) formed in the lower BEOL interconnect levels, without degrading an inductor's Q-factor. The integrated circuit includes the capacitor in one or more back-end-of-line (BEOL) interconnect levels. The capacitor includes multiple folded capacitor fingers having multiple sides and a pair of manifolds on a same side of the folded capacitor fingers. Each of the pair of manifolds is coupled to one or more of the folded capacitor fingers. The integrated circuit also includes an inductive trace having one or more turns in one or more different BEOL interconnect levels. The inductive trace overlaps one or more portions of the capacitor.
    Type: Application
    Filed: June 12, 2018
    Publication date: August 22, 2019
    Inventors: Haitao CHENG, Zhang JIN
  • Publication number: 20190189608
    Abstract: An integrated circuit (IC) includes a capacitor array in at least one first back-end-of-line (BEOL) interconnect level. The capacitor array includes a pair of capacitor manifolds coupled to parallel capacitor routing traces and capacitors coupled between each pair of parallel capacitor routing traces. The IC also includes an inductor trace having at least one turn in at least one second BEOL interconnect level. The inductor trace defines a perimeter to overlap at least a portion of the capacitor array.
    Type: Application
    Filed: June 11, 2018
    Publication date: June 20, 2019
    Inventors: Haitao CHENG, Zhang JIN
  • Patent number: 10236573
    Abstract: A capacitor radio frequency (RF) shielding structure may include a ground plane partially surrounding a coupling capacitor in an RF signal path. The ground plane may include a first ground plane portion extending between a positive terminal of the RF signal path and a negative terminal of the RF signal path. The ground plane may include a second ground plane portion extending between the positive terminal and the negative terminal of the RF signal path. The second ground plane portion may be opposed the first ground plane portion. The capacitor RF shielding structure may also include a patterned shielding layer electrically contacting the first ground plane portion and/or the second ground plane portion. The patterned shielding layer may electrically disconnecting a return current path over the patterned shielding layer to confine a return current to flowing over the first ground plane portion or the second ground plane portion.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: March 19, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Haitao Cheng, Zhang Jin
  • Publication number: 20190006728
    Abstract: A coplanar waveguide may include a first transmission line extending between a first ground plane and a second ground plane at a first interconnect level. The coplanar waveguide may further include a shielding layer at a second interconnect level. The shielding layer may include a first set of conductive fingers coupled to the first ground plane. The first set of conductive fingers may be interdigitated with a second set of conductive fingers that are coupled to the second ground plane. Only a dielectric layer may be between the first set of conductive interdigitated fingers and the second set of conductive interdigitated fingers. The first ground plane, the second ground plane, the dielectric layer, and the shielding layer may form a capacitor.
    Type: Application
    Filed: August 25, 2017
    Publication date: January 3, 2019
    Inventors: Haitao CHENG, Zhang JIN
  • Publication number: 20180366822
    Abstract: A capacitor radio frequency (RF) shielding structure may include a ground plane partially surrounding a coupling capacitor in an RF signal path. The ground plane may include a first ground plane portion extending between a positive terminal of the RF signal path and a negative terminal of the RF signal path. The ground plane may include a second ground plane portion extending between the positive terminal and the negative terminal of the RF signal path. The second ground plane portion may be opposed the first ground plane portion. The capacitor RF shielding structure may also include a patterned shielding layer electrically contacting the first ground plane portion and/or the second ground plane portion. The patterned shielding layer may electrically disconnecting a return current path over the patterned shielding layer to confine a return current to flowing over the first ground plane portion or the second ground plane portion.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 20, 2018
    Inventors: Haitao CHENG, Zhang JIN