Abstract: A gate driving unit, a method for driving the same, a gate driving circuitry and a display module are provided. The gate driving unit includes: a shift register circuit configured to delay a phase of an input signal inputted by a signal input end under control of a first clock signal input end and a second clock signal input end to obtain a carry signal, and output the carry signal through a carry end; and a pulse width regulation circuit configured to regulate a pulse width of the carry signal under control of the enable end to obtain a gate drive signal, and output the gate drive signal through a gate drive signal output end.

Abstract: A touch display panel includes: a plurality of electrode blocks arranged in an array and spaced apart in an active area; an inner common electrode line surrounding the active area and disposed in a non-active area, a spacing area being provided between the active area and a portion of the inner common electrode line located away from a side where a driving circuit area is located; a plurality of dummy touch driving electrode lines arranged in parallel and running through the active area, the plurality of dummy touch driving electrode lines arranged in parallel being in one-to-one correspondence with and electrically connected to at least electrode blocks close to the spacing area; and switch circuits disposed in the spacing area that are in one-to-one correspondence with the electrode blocks electrically connected to the dummy touch driving electrode lines.

Abstract: A gate driving unit, a method for driving the same, a gate driving circuitry and a display module are provided. The gate driving unit includes: a shift register circuit configured to delay a phase of an input signal inputted by a signal input end under control of a first clock signal input end and a second clock signal input end to obtain a carry signal, and output the carry signal through a carry end; and a pulse width regulation circuit configured to regulate a pulse width of the carry signal under control of the enable end to obtain a gate drive signal, and output the gate drive signal through a gate drive signal output end.

Abstract: A memory-in-pixel circuit and a driving method thereof, a liquid crystal display panel and a wearable device are disclosed. The memory-in-pixel circuit includes a latch circuit, a switch circuit and a selection circuit, all transistors included in the latch circuit are first type transistors, and the latch circuit is configured to latch a data voltage and generate a first latch signal and a second latch signal; the switch circuit is configured to provide the data voltage to the latch circuit when the switch circuit is turned on; the selection circuit is configured to apply the first selection signal or the second selection signal to a pixel under control of the first latch signal and the second latch signal, and to continue to apply the first selection signal or the second selection signal to the pixel when the switch circuit is turned off to achieve automatic update of the pixel.

Abstract: A display circuit includes a switch component configured to output a data voltage signal to the latch component under control of a scanning signal; a latch component configured to output a first control signal under control of a reset signal in a case where the switch component is turned off, and output the first control signal or a second control signal to the charging component according to the data voltage signal in a case where the switch component is turned on; and a charging component configured to write a first signal to a display component in the case where the switch component is turned off, and in the case where the switch component is turned on, write the first signal to the display component under control of the first control signal and write a second signal to the display component under control of the second control signal.

Abstract: The disclosure discloses a data voltage storage circuit, a method for driving the same, a liquid crystal display, and a display device, and the data voltage storage circuit includes a voltage input subcircuit, a storage control subcircuit, and an output control subcircuit; and the storage control subcircuit stores a data signal input to the first node, so that the data signal can be stored for a long period of time. The three subcircuits above cooperate with each other so that a signal output end can be provided with a signal of a second reference voltage signal end or a common voltage signal end using the simple structure to thereby lower the difficulty of a fabrication process thereof, narrow a space to be occupied by the circuit, and improve a pixel aperture ratio.

Abstract: A shift register, a driving method, a gate driving circuit, and a display device are provided. The shift register includes an input circuit and an output control circuit. The input circuit transmits a first signal from a first power terminal or a second signal from a second power terminal to the output control circuit under control of an input signal, a first clock signal and a second clock signal. The output control circuit transmits the first signal from the first power terminal or the second signal from the second power terminal to a signal output terminal under control of the first clock signal and the second clock signal. The input signal input to the shift register is delayed and output to a signal input terminal of a shift register in a next row.

Abstract: A touch display panel includes: a plurality of electrode blocks arranged in an array and spaced apart in an active area; an inner common electrode line surrounding the active area and disposed in a non-active area, a spacing area being provided between the active area and a portion of the inner common electrode line located away from a side where a driving circuit area is located; a plurality of dummy touch driving electrode lines arranged in parallel and running through the active area, the plurality of dummy touch driving electrode lines arranged in parallel being in one-to-one correspondence with and electrically connected to at least electrode blocks close to the spacing area; and switch circuits disposed in the spacing area that are in one-to-one correspondence with the electrode blocks electrically connected to the dummy touch driving electrode lines.

Abstract: A shift register, a driving method, a gate driving circuit, and a display device are provided. The shift register includes an input circuit and an output control circuit. The input circuit transmits a first signal from a first power terminal or a second signal from a second power terminal to the output control circuit under control of an input signal, a first clock signal and a second clock signal. The output control circuit transmits the first signal from the first power terminal or the second signal from the second power terminal to a signal output terminal under control of the first clock signal and the second clock signal. The input signal input to the shift register is delayed and output to a signal input terminal of a shift register in a next row.

Abstract: A display circuit includes a switch component configured to output a data voltage signal to the latch component under control of a scanning signal; a latch component configured to output a first control signal under control of a reset signal in a case where the switch component is turned off, and output the first control signal or a second control signal to the charging component according to the data voltage signal in a case where the switch component is turned on; and a charging component configured to write a first signal to a display component in the case where the switch component is turned off, and in the case where the switch component is turned on, write the first signal to the display component under control of the first control signal and write a second signal to the display component under control of the second control signal.

Abstract: A shift register unit is provided. The shift register unit includes a precharging module, a resetting module, a pull-up control module and a noise reduction module. The precharging module is connected to the resetting module and a pull-up node, the resetting module is connected to the pull-up node, the noise reduction module and an output end, the pull-up control module is connected to the pull-up node, the noise reduction module and the output end, and the noise output module is connected to the output end.

Abstract: A memory-in-pixel circuit and a driving method thereof, a liquid crystal display panel and a wearable device are disclosed. The memory-in-pixel circuit includes a latch circuit, a switch circuit and a selection circuit, all transistors included in the latch circuit are first type transistors, and the latch circuit is configured to latch a data voltage and generate a first latch signal and a second latch signal; the switch circuit is configured to provide the data voltage to the latch circuit when the switch circuit is turned on; the selection circuit is configured to apply the first selection signal or the second selection signal to a pixel under control of the first latch signal and the second latch signal, and to continue to apply the first selection signal or the second selection signal to the pixel when the switch circuit is turned off to achieve automatic update of the pixel.

Abstract: The disclosure discloses a data voltage storage circuit, a method for driving the same, a liquid crystal display, and a display device, and the data voltage storage circuit includes a voltage input subcircuit, a storage control subcircuit, and an output control subcircuit; and the storage control subcircuit stores a data signal input to the first node, so that the data signal can be stored for a long period of time. The three subcircuits above cooperate with each other so that a signal output end can be provided with a signal of a second reference voltage signal end or a common voltage signal end using the simple structure to thereby lower the difficulty of a fabrication process thereof, narrow a space to be occupied by the circuit, and improve a pixel aperture ratio.

Abstract: A shift register unit is provided. The shift register unit includes a precharging module, a resetting module, a pull-up control module and a noise reduction module. The precharging module is connected to the resetting module and a pull-up node, the resetting module is connected to the pull-up node, the noise reduction module and an output end, the pull-up control module is connected to the pull-up node, the noise reduction module and the output end, and the noise output module is connected to the output end.