Patents by Inventor Zhaobi WEI

Zhaobi WEI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11750200
    Abstract: Provided is a phase-locked loop circuit, a method for configuring the same, and a communication device. The phase-locked loop circuit includes a phase-locked loop main circuit and a phase temperature compensation circuit. The phase temperature compensation circuit includes at least one phase delay unit connected to the phase-locked loop main circuit and configured to generate a phase shift as a result of a temperature change for cancelling out a phase shift generated by the phase-locked loop main circuit as a result of a temperature change.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: September 5, 2023
    Assignee: ZTE CORPORATION
    Inventors: Jun Liu, Zhaobi Wei, Shan Wang, Pei Duan, Mengbi Lei
  • Publication number: 20230246730
    Abstract: Provided are a data transmission method, a circuit board, a data transmission apparatus, a storage medium and an electronic apparatus. The data transmission method is applied between a chip and an analog-to-digital/ digital-to-analog (AD/DA) converter and includes transmitting first data through a first transmission channel. The first transmission channel includes invalid bits in a second transmission channel, the second transmission channel is configured to transmit second data, the first data includes customized data, and the second data includes traffic data.
    Type: Application
    Filed: June 2, 2021
    Publication date: August 3, 2023
    Inventors: Shaofei ZHU, Zhaobi WEI
  • Patent number: 11700108
    Abstract: Provided are a phase detection method and apparatus for a clock signal, and a communication device. A clock signal of a clock to be detected is sampled according to sampling periods set by a sampling clock; a phase angle value corresponding to a sampled clock signal in a current sampling period is obtained according to a mapping relationship between sampled signals and phase angle values; a phase difference corresponding to the current sampling period is subtracted from the phase angle value to obtain an initial phase value of the clock to be detected in the current sampling period, wherein the phase difference is a phase difference between the clock to be detected and the sampling clock in the current sampling period; and after the sampling ends, a final phase value of the clock to be detected is obtained according to initial phase values obtained in respective sampling periods.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: July 11, 2023
    Assignee: ZTE CORPORATION
    Inventors: Jun Liu, Zhaobi Wei, Shan Wang, Mengbi Lei, Guojun Zhang
  • Publication number: 20220360267
    Abstract: Provided is a phase-locked loop circuit, a method for configuring the same, and a communication device. The phase-locked loop circuit includes a phase-locked loop main circuit and a phase temperature compensation circuit. The phase temperature compensation circuit includes at least one phase delay unit connected to the phase-locked loop main circuit and configured to generate a phase shift as a result of a temperature change for cancelling out a phase shift generated by the phase-locked loop main circuit as a result of a temperature change.
    Type: Application
    Filed: June 19, 2020
    Publication date: November 10, 2022
    Inventors: Jun LIU, Zhaobi WEI, Shan WANG, Pei DUAN, Mengbi LEI
  • Publication number: 20220263644
    Abstract: Provided are a phase detection method and apparatus for a clock signal, and a communication device. A clock signal of a clock to be detected is sampled according to sampling periods set by a sampling clock; a phase angle value corresponding to a sampled clock signal in a current sampling period is obtained according to a mapping relationship between sampled signals and phase angle values; a phase difference corresponding to the current sampling period is subtracted from the phase angle value to obtain an initial phase value of the clock to be detected in the current sampling period, wherein the phase difference is a phase difference between the clock to be detected and the sampling clock in the current sampling period; and after the sampling ends, a final phase value of the clock to be detected is obtained according to initial phase values obtained in respective sampling periods.
    Type: Application
    Filed: July 6, 2020
    Publication date: August 18, 2022
    Inventors: Jun LIU, Zhaobi WEI, Shan WANG, Mengbi LEI, Guojun ZHANG