Abstract: A method of estimating an optical flow includes processing, using an image processing pass, a first image and a second image separately, and estimating the optical flow based on a second image attention feature map of the first image and a second image attention feature map of the second image. The processing using the image processing pass includes extracting a feature map by encoding an image, outputting a first image fusion attention feature map by fusing row relationship information of the image with the image feature map, outputting a first image attention feature map of the image based on the first image fusion attention feature map and the image feature map, outputting a second image fusion attention feature map by fusing column relationship information of the image with the first image attention feature map, and generating a second image attention feature map of the image based on the second image fusion attention feature map and the first image attention feature map.

Abstract: A staged cementing device includes a cylindrical body having an inner chamber. A circulating opening and a liquid inlet recess open to the inner chamber are arranged on a wall of the body. An opening assembly is arranged in the body, which has an opening sleeve and an opening seat located in the opening sleeve. Initially the opening sleeve is connected with the body through a first shear pin and covers the circulating opening, and the opening seat is connected with the opening sleeve through a second shear pin and covers the liquid inlet recess. A packer includes a packing valve body and a packer rubber. The packing valve body includes a flow channel in communication with the liquid inlet recess, and the packer rubber includes a liquid reservoir in communication with the flow channel. The second shear pin is sheared off in response to primary cementing procedure.

Abstract: An apparatus for generating an output voltage across a load. The apparatus includes a first switching device; a second switching device coupled in series with the first switching device between an upper voltage rail and a lower voltage rail, wherein the upper voltage rail is configured to receive an input voltage; an inductor between a node between the first and second switching device and the load; a sensor configured to generate a control signal related to a current through the inductor; and a controller configured to operate the first and second switching devices to generate the output voltage based on the control signal.

Abstract: An electronic card connector includes an insulative housing defining an accommodating cavity receiving a card tray and having a first base body, a number of conductive terminals, and a shielding shell. The terminals define an array of first contacts and an array of second contacts respectively located in two sides. Each terminal has an affixed portion, a contacting portion extending into the accommodating cavity, and a soldering portion extending outside of the insulative housing. The insulative housing is inject-molded with the first contacts and the shielding shell, and the first contacts are configured as same as the second contacts in a rotationally symmetrical direction in 180 degree so that disregarding the insertion orientations of the card tray, the conductive terminals are always electrically connected with pins of the electronic card correctly.

Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for powering up a charge pump converter and providing protection and soft-start circuitry therefor. One example charge pump converter generally includes a first transistor and a second transistor coupled in series between an input voltage node and an output voltage node of the charge pump converter, a first capacitive element having a first terminal coupled to a node between the first and second transistors, and a first switch coupled to the input voltage node, the first switch being configured to selectively enable a first drive circuit having an output coupled to a control terminal of the second transistor.

Abstract: The present invention discloses a targeting polypeptide compound having dual targets, comprising a TATE cyclic peptide structure, an RGD cyclic peptide structure and a NOTA chelating group, wherein the TATE cyclic peptide structure, the RGD cyclic peptide structure and the NOTA chelating group are respectively linked by a PEG segment having a polymerization degree of 1 to 5 or directly linked to a same glutamic acid; the structure of the polypeptide compound can be represented as NOTA-PEGn-Glu{PEGm-TATE}-PEGP-RGD, where m, n and p are an integer from 0 to 5 respectively. The present invention further discloses a TATE-RGD dual-target radioactive molecular probe based on the polypeptide compound. The TATE-RGD dual-target polypeptide drug of the present invention may simultaneously bind to SSTR, integrin ?v?3, has higher receptor binding affinity and uptake, more excellent non-target tissue clearance rate, and better in vivo and in vitro stability.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: An electronic card connector includes an insulative housing defining an accommodating cavity receiving a card tray and having a first base body, a number of conductive terminals, and a shielding shell. The terminals define an array of first contacts and an array of second contacts respectively located in two sides. Each terminal has an affixed portion, a contacting portion extending into the accommodating cavity, and a soldering portion extending outside of the insulative housing. The insulative housing is inject-molded with the first contacts and the shielding shell, and the first contacts are configured as same as the second contacts in a rotationally symmetrical direction in 180 degree so that disregarding the insertion orientations of the card tray, the conductive terminals are always electrically connected with pins of the electronic card correctly.

Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for providing input current limiting and input over current protection for a power converter, such as a charge pump converter. One example method of power conversion generally includes sensing an average value associated with an input current for a power supply circuit, sensing an instantaneous value associated with the input current for the power supply circuit, limiting the input current when the sensed average value is greater than a first threshold, and activating over current protection for the power supply circuit when the sensed instantaneous value is greater than a second threshold.

Abstract: An apparatus is disclosed for open-loop limiting of a charging phase pulsewidth. An example apparatus includes an input node, an output node coupled to a battery, a flying capacitor coupled to the output node, a driver circuit, a charging circuit, and an open-loop charging phase pulsewidth limiter coupled to the driver circuit and the charging circuit. The driver circuit generates a charging phase signal based on a clock signal. Using at least one switch that is coupled between the input node and the flying capacitor, the charging circuit connects or disconnects the flying capacitor to or from the input node based on the charging phase signal. The open-loop charging phase pulsewidth limiter monitors for at least one limit event associated with charging the battery with the flying capacitor. Responsive to detection of the limit event, the open-loop charging phase pulsewidth limiter limits a pulsewidth of the charging phase signal.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for powering up a charge pump converter and providing protection and soft-start circuitry therefor. One example charge pump converter generally includes a first transistor and a second transistor coupled in series between an input voltage node and an output voltage node of the charge pump converter, a first capacitive element having a first terminal coupled to a node between the first and second transistors, and a first switch coupled to the input voltage node, the first switch being configured to selectively enable a first drive circuit having an output coupled to a control terminal of the second transistor.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: The embodiments described herein relate to an improved circuit technique for sensing current conducting in a power transistor coupled with an input power supply. The circuit includes a bi-directional current sensing circuit using current sensing transistor gate control. The circuit includes a forward current sensing transistor to sense current conducting in the power transistor during forward mode current of the circuit and a reverse boost current sensing transistor to sense current conducting during reverse current mode of the circuit. A level shifter is also provided with complementary outputs to either turn on the forward current sensing transistor or turn off the reverse boost current sensing transistor when the circuit is in forward current mode, or to turn off the forward current sensing transistor and turn on the reverse boost current sensing transistor when the circuit is in reverse current mode.

Abstract: The embodiments described herein relate to an improved circuit technique for sensing current conducting in a power transistor coupled with an input power supply. The circuit includes a bi-directional current sensing circuit using current sensing transistor gate control. The circuit includes a forward current sensing transistor to sense current conducting in the power transistor during forward mode current of the circuit and a reverse boost current sensing transistor to sense current conducting during reverse current mode of the circuit. A level shifter is also provided with complementary outputs to either turn on the forward current sensing transistor or turn off the reverse boost current sensing transistor when the circuit is in forward current mode, or to turn off the forward current sensing transistor and turn on the reverse boost current sensing transistor when the circuit is in reverse current mode.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: A switching regulator circuit includes a power stage and a compensation network. The compensation network includes a programmable transconductance (gm), having a first selectable transconductance such a closed loop transfer function of the switching regulator circuit may be characterized by a first transfer function having a having a first DC open loop gain and a first bandwidth, and by a second transfer function having a second DC open loop gain and a second bandwidth.