Patents by Inventor Zhaomin Zhu

Zhaomin Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11700417
    Abstract: A method and an apparatus for processing a video are provided technology. The method may include: separating a foreground image and a background image from a video frame in the target video stream, in response to acquiring a target video stream; adding a to-be-displayed content at a target display position in the background image to obtain a processed background image; and combining the foreground image and the processed background image to obtain a target video frame. The present disclosure may directly render the to-be-displayed content in the background, so that the content displayed in the background does not block a body in the foreground, such as person.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: July 11, 2023
    Assignee: Beijing Baidu Netcom Science and Technology Co., Ltd.
    Inventor: Zhaomin Zhu
  • Publication number: 20220018669
    Abstract: The present disclosure discloses a method for searching the shortest path of must-pass node, which includes the following processing steps: S1, constructing a Thiessen polygon; S2, when start node of must-pass nodes and end node of must-pass node are not the same must-pass node, performing processing of S3; S3, starting from the Thiessen polygon where the start node of must-pass nodes is located, querying the adjacent Thiessen polygons and merging them into the first merged polygon; S4, based on the first merged polygon, querying the unprocessed adjacent Thiessen polygons to merge the second merged polygon; S5, merging the isolated Thiessen polygon into a certain adjacent merged polygon with common edge; S6, deleting the edge lines of two vertices in Denaulay triangle that are not in the same merged polygon; S7.
    Type: Application
    Filed: October 9, 2020
    Publication date: January 20, 2022
    Inventors: Yunan Lu, Jinzhan Wei, Zhaomin Zhu, Ning Wu, Weirong Qin, Weichun Lu, Minghui Chen, Yuan Tang
  • Publication number: 20210203859
    Abstract: A method and an apparatus for processing a video are provided technology. The method may include: separating a foreground image and a background image from a video frame in the target video stream, in response to acquiring a target video stream; adding a to-be-displayed content at a target display position in the background image to obtain a processed background image; and combining the foreground image and the processed background image to obtain a target video frame. The present disclosure may directly render the to-be-displayed content in the background, so that the content displayed in the background does not block a body in the foreground, such as person.
    Type: Application
    Filed: March 17, 2021
    Publication date: July 1, 2021
    Inventor: Zhaomin Zhu
  • Patent number: 10743038
    Abstract: The present application provides a live broadcast processing method, an apparatus, a device, and a storage medium thereof, where the method includes: receiving, by a live broadcast server, source media data sent by a first terminal device of a video live broadcast side, where the source media data includes video data and audio data; translating the audio data into audio data in at least one target language; acquiring a playing language required by a video playing side, and acquiring audio data corresponding to the playing language from the audio data in the at least one target language; merging the audio data corresponding to the playing language with the video data to obtain target media data; and transmitting the target media data to a second terminal device of the video playing side for playback.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: August 11, 2020
    Assignee: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventor: Zhaomin Zhu
  • Patent number: 10678388
    Abstract: Embodiments provide a capacitive touch screen, including: an outer screen, having a driving unit array and a sensing unit array; an inner screen; and a connector connecting the outer screen to the inner screen. The connector includes at least one first surface connected to a surface of the outer screen, and at least one second surface connected to a surface of the inner screen. In a non-visible region of the outer screen, a plurality of electrode wires from the driving unit array or from the sensing unit array are divided into at least two groups, and the at least two groups of electrode wires are led out separately. The at least one first surface does not contact the plurality of electrode wires.
    Type: Grant
    Filed: May 5, 2018
    Date of Patent: June 9, 2020
    Assignee: SHENZHEN SUNDENAL TECHNOLOGY CO. LTD
    Inventors: Xiaogang Zhao, Zuhui Chen, Hongtao Tian, Ping Huang, Hui Huang, Zhaomin Zhu
  • Publication number: 20190364303
    Abstract: The present application provides a live broadcast processing method, an apparatus, a device, and a storage medium thereof, where the method includes: receiving, by a live broadcast server, source media data sent by a first terminal device of a video live broadcast side, where the source media data includes video data and audio data; translating the audio data into audio data in at least one target language; acquiring a playing language required by a video playing side, and acquiring audio data corresponding to the playing language from the audio data in the at least one target language; merging the audio data corresponding to the playing language with the video data to obtain target media data; and transmitting the target media data to a second terminal device of the video playing side for playback.
    Type: Application
    Filed: March 14, 2019
    Publication date: November 28, 2019
    Inventor: ZHAOMIN ZHU
  • Patent number: 10324256
    Abstract: A method of forming an integrated circuit is disclosed. The method includes: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: June 18, 2019
    Assignees: Massachusetts Institute of Technology, National University of Singapore, Nanyang Technological University
    Inventors: Wenjia Zhang, Bing Wang, Li Zhang, Zhaomin Zhu, Jurgen Michel, Soo-Jin Chua, Li-Shiuan Peh, Siau Ben Chiah, Eng Kian Kenneth Lee
  • Publication number: 20190129532
    Abstract: Embodiments provide a capacitive touch screen, including: an outer screen, having a driving unit array and a sensing unit array; an inner screen; and a connector connecting the outer screen to the inner screen. The connector includes at least one first surface connected to a surface of the outer screen, and at least one second surface connected to a surface of the inner screen. In a non-visible region of the outer screen, a plurality of electrode wires from the driving unit array or from the sensing unit array are divided into at least two groups, and the at least two groups of electrode wires are led out separately. The at least one first surface does not contact the plurality of electrode wires.
    Type: Application
    Filed: May 5, 2018
    Publication date: May 2, 2019
    Applicant: Shenzhen Sundenal Technology Co. Ltd
    Inventors: Xiaogang Zhao, Zuhui Chen, Hongtao Tian, Ping Huang, Hui Huang, Zhaomin Zhu
  • Publication number: 20180172903
    Abstract: A method of forming an integrated circuit is disclosed. The method includes: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.
    Type: Application
    Filed: December 11, 2017
    Publication date: June 21, 2018
    Applicants: Massachusetts Institute of Technology, National University of Singapore, Nanyang Technological University
    Inventors: Wenjia Zhang, Bing Wang, Li Zhang, Zhaomin Zhu, Jurgen Michel, Soo-Jin Chua, Li-Shiuan Peh, Siau Ben Chiah, Eng Kian Kenneth Lee
  • Patent number: 9874689
    Abstract: A method (100) of forming an integrated circuit is disclosed. The method comprises: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing (104) the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding (106) at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: January 23, 2018
    Assignees: National University of Singapore, Nanyang Technological University, Massachusetts Institute of Technology
    Inventors: Wenjia Zhang, Bing Wang, Li Zhang, Zhaomin Zhu, Jurgen Michel, Soo-Jin Chua, Li-Shiuan Peh, Siau Ben Chiah, Eng Kian Kenneth Lee
  • Publication number: 20160327737
    Abstract: A method (100) of forming an integrated circuit is disclosed. The method comprises: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing (104) the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding (106) at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.
    Type: Application
    Filed: January 14, 2015
    Publication date: November 10, 2016
    Applicants: MASSACHUSETTS INSTITUTE OF TECHNOLOGY, National University of Singapore, Nanyang Technological University
    Inventors: Wenjia Zhang, Bing Wang, Li Zhang, Zhaomin Zhu, Jurgen Michel, Soo-Jin Chua, Li-Shiuan Peh, Siau Ben Chiah, Eng Kian Kenneth Lee
  • Patent number: 7117291
    Abstract: In a synchronous multi-port bank memory, registers/buffers receive a read/write signal and an address signal from each of external ports, receive and send a data signal to and from each of the external ports, and receive and send a port block signal. An access conflict management circuit receives the address signals from the registers and buffers and generates the port block signal when an access conflict to the bank occurs. A switching network receives the read/write signal and the address signal from the registers/buffers and generates a bank selection signal when no port block signal is received, so as to activate the selected bank. Thus, memory access cycle time is shortened. A synchronous 1-port bank memory is also constructed similarly.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: October 3, 2006
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Hans Jurgen Mattausch, Tetsushi Koide, Tetsuo Hironaka, Hiroshi Uchida, Koh Johguchi, Zhaomin Zhu
  • Publication number: 20050125594
    Abstract: In a synchronous multi-port bank memory, registers/buffers receive a read/write signal and an address signal from each of external ports, receive and send a data signal to and from each of the external ports, and receive and send a port block signal. An access conflict management circuit receives the address signals from the registers and buffers and generates the port block signal when an access conflict to the bank occurs. A switching network receives the read/write signal and the address signal from the registers/buffers and generates a bank selection signal when no port block signal is received, so as to activate the selected bank. Thus, memory access cycle time is shortened. A synchronous 1-port bank memory is also constructed similarly.
    Type: Application
    Filed: February 27, 2004
    Publication date: June 9, 2005
    Inventors: Hans Mattausch, Tetsushi Koide, Tetsuo Hironaka, Hiroshi Uchida, Koh Johguchi, Zhaomin Zhu