Abstract: A method of driving a transistor between switching states includes controlling a transition of a gate voltage at a gate terminal of a transistor during each of a plurality of turn-off switching events to turn off the transistor, wherein the transistor is configured to be turned off according to a desaturation time during each of the plurality of turn-off switching events; measuring a transistor parameter indicative of a voltage slew rate of the transistor for a first turn-off switching event during which the transistor is transitioned from an on state to an off state; and regulating a duration of the desaturation time for a next turn-off switching event based on the measured transistor parameter.

Abstract: A method of driving a transistor between switching states includes controlling a transition of a gate voltage at a gate terminal of a transistor during each of a plurality of turn-off switching events to turn off the transistor, wherein the transistor is configured to be turned off according to a desaturation time during each of the plurality of turn-off switching events; measuring a transistor parameter indicative of a voltage slew rate of the transistor for a first turn-off switching event during which the transistor is transitioned from an on state to an off state; and regulating a duration of the desaturation time for a next turn-off switching event based on the measured transistor parameter.

Abstract: A method of driving a transistor between switching states includes controlling a transition of a gate voltage at a gate terminal of a transistor during each of a plurality of turn-off switching events to turn off the transistor, wherein the transistor is configured to be turned off according to a desaturation time during each of the plurality of turn-off switching events; measuring a transistor parameter indicative of a voltage slew rate of the transistor for a first turn-off switching event during which the transistor is transitioned from an on state to an off state; and regulating a duration of the desaturation time for a next turn-off switching event based on the measured transistor parameter.

Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.

Abstract: A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to control a gate voltage to generate an on-current during a plurality of turn-on switching events to turn on the transistor. The gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage, and a second driver configured to, during a boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage. A control circuit measures a transistor parameter representative of a reverse recovery current of the transistor for a turn-on switching event during which the transistor is transitioned to an on state and controls the first driver and controls the second driver based on the measured transistor parameter.

Abstract: A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to generate an on-current during a plurality of turn-on switching events to turn on the transistor, wherein the gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage and a second driver configured to, during a first boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage; a measurement circuit configured to measure a transistor parameter indicative of an oscillation of a load current for a turn-on switching event; and a controller configured to receive the measured transistor parameter and regulate a length of the first boost interval based on the measured transistor parameter.

Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.

Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor that are switched in a complementary manner. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.

Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor that are switched in a complementary manner. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.

Abstract: A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to generate an on-current during a plurality of turn-on switching events to turn on the transistor, wherein the gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage and a second driver configured to, during a first boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage; a measurement circuit configured to measure a transistor parameter indicative of an oscillation of a load current for a turn-on switching event; and a controller configured to receive the measured transistor parameter and regulate a length of the first boost interval based on the measured transistor parameter.

Abstract: A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to generate an on-current during a plurality of turn-on switching events to turn on the transistor, wherein the gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage and a second driver configured to, during a first boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage; a measurement circuit configured to measure a transistor parameter indicative of an oscillation of a load current for a turn-on switching event; and a controller configured to receive the measured transistor parameter and regulate a length of the first boost interval based on the measured transistor parameter.

Abstract: A method of driving a transistor includes generating an off-current during a plurality of turn-off switching events to control a gate voltage at a gate terminal of the transistor, wherein generating the off-current includes sinking a first portion of the off-current from the gate terminal to discharge a first portion of the gate voltage, and sinking, during a boost interval, a second portion of the off-current from the gate terminal to discharge a second portion of the gate voltage; measuring a transistor parameter indicative of an oscillation of a drain-source voltage of the transistor for a first turn-off switching event during which the transistor is transitioned off; activating the first portion of the off-current for a second turn-off switching event; and activating the second portion of the off-current for the second turn-off switching event, including regulating a length of the boost interval based on the measured transistor parameter.

Abstract: Embodiments herein provide a voltage regulation system comprising a charge pump a voltage regulator and a current regulator. The charge pump is configured to output a current signal to a capacitor. The voltage regulator is configured to sample an output of the capacitor, and compare the sampled voltage to a target voltage to generate a control signal. The current regulator is configured to sample a portion of the output current based on the control signal and regulate the current signal outputted by the charge pump.

Abstract: Embodiments herein provide a voltage regulation system comprising a charge pump a voltage regulator and a current regulator. The charge pump is configured to output a current signal to a capacitor. The voltage regulator is configured to sample an output of the capacitor, and compare the sampled voltage to a target voltage to generate a control signal. The current regulator is configured to sample a portion of the output current based on the control signal and regulate the current signal outputted by the charge pump.

Abstract: An example apparatus for converting a plurality of analog signals to a plurality of digital signals includes: a plurality of successive approximation (SAR) analog-to-digital converters (ADCs) each including a first input configured to receive a respective one of the plurality of analog signals, a second input configured to receive a reference signal, and an output configured to provide a respective one of the plurality of digital signals; and a shared cycle LSB generator coupled to the plurality of SAR ADCs and configured to provide the reference signal shared by the plurality of SAR ADCs.

Abstract: Embodiments herein provide electronic devices that include a charge pump coupled to a split reservoir capacitor which includes at least two discrete capacitors. Further, the discrete capacitors are coupled together by a switch (e.g., a transistor) which is controlled by an output regulator. In one embodiment, the output regulator monitors an output voltage of the charge pump and the split reservoir capacitor to determine when the output differs from a predetermined target voltage. When the switch isolates the two capacitors, the charge pump can continue to add charge to a first one of the discrete capacitors. Thus, when the output regulator detects a dip in the output voltage and activates the switch to reconnect the two discrete capacitors, the first discrete capacitor has extra charge which can decrease the time needed to bring the output voltage back to the target voltage.

Abstract: In an example, a processing system for an electronic device, such as a capacitive sensing device, includes a reservoir capacitor configured to store charge from a charge pump, and a control circuit configured to operate the charge pump at irregular intervals to transfer charge to the reservoir capacitor.

Abstract: A processing system for a capacitive sensing input device comprises a charge integrator, a circuit element having a first resistance, and a first switch coupled with the circuit element. The first circuit element is disposed in series with an input of the charge integrator. The first switch is configured to alter the first resistance to a second resistance when selectively closed during at least a portion of an integration phase of the charge integrator. The second resistance is lower than the first resistance.

Abstract: A capacitance measurement circuit cancels background capacitance while reducing charge leakage and supply ripples during reset phases and integrate phases. The capacitance measurement circuit operates a first switch into a linear mode causing a first resistance in the first switch, and after a delay, operates a second switch into a saturation mode causing a second resistance in parallel to the first resistance.

Abstract: A processing system for a capacitive sensing input device comprises a charge integrator, a circuit element having a first resistance, and a first switch coupled with the circuit element. The first circuit element is disposed in series with an input of the charge integrator. The first switch is configured to alter the first resistance to a second resistance when selectively closed during at least a portion of an integration phase of the charge integrator. The second resistance is lower than the first resistance.