Patents by Inventor Zheng-Wei Jiang

Zheng-Wei Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8588305
    Abstract: The present invention provides an apparatus for interpolation which is able to process input data with multiple video standards without sacrificing chip area. The interpolation unit comprises: a first interpolation unit for interpolating input data; a second interpolation unit for interpolating input data; a filter indicator for providing information to the first interpolation unit and the second interpolation unit; and an output unit for multiplexing and averaging output from the first interpolation unit and the second interpolation unit. The present invention also provides a motion compensation unit and a decoder for processing multiple video standards.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: November 19, 2013
    Assignee: Nvidia Corporation
    Inventors: Yong Peng, Zheng Wei Jiang, Frans Sijstermans, Stefan Eckart
  • Patent number: 8126952
    Abstract: The present invention provides a unified inverse discrete cosine transform (IDCT) microcode processor engine, which is able to process IDCT with different video standards and also achieves the processing speed requirement. The microcode processor engine comprises a read unit for reading input data; a shift left unit comprising: a first shift left block for left-shifting input data; and a second shift left block for left-shifting input data; an add unit for adding data output from the shift left unit; and a shift right unit for right-shifting data output from the add unit. The present invention also provides a system of inverse discrete cosine transform.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: February 28, 2012
    Assignee: NVIDIA Corporation
    Inventors: Zheng-Yu Zheng, Zheng-Wei Jiang, Franciscus Sijstermans
  • Publication number: 20090168885
    Abstract: The present invention provides an apparatus for interpolation which is able to process input data with multiple video standards without sacrificing chip area. The interpolation unit comprises: a first interpolation unit for interpolating input data; a second interpolation unit for interpolating input data; a filter indicator for providing information to the first interpolation unit and the second interpolation unit; and an output unit for multiplexing and averaging output from the first interpolation unit and the second interpolation unit. The present invention also provides a motion compensation unit and a decoder for processing multiple video standards.
    Type: Application
    Filed: June 20, 2008
    Publication date: July 2, 2009
    Inventors: Yong Peng, Zheng Wei Jiang, Frans Sijstermans, Stefan Eckart
  • Publication number: 20090150469
    Abstract: The present invention provides a unified inverse discrete cosine transform (IDCT) microcode processor engine, which is able to process IDCT with different video standards and also achieves the processing speed requirement. The microcode processor engine comprises a read unit for reading input data; a shift left unit comprising: a first shift left block for left-shifting input data; and a second shift left block for left-shifting input data; an add unit for adding data output from the shift left unit; and a shift right unit for right-shifting data output from the add unit. The present invention also provides a system of inverse discrete cosine transform.
    Type: Application
    Filed: June 26, 2008
    Publication date: June 11, 2009
    Inventors: Zheng-Yu Zheng, Zheng-Wei JIANG, Franciscus SIJSTERMANS