Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: A silicon carbide metal oxide semiconductor field effect transistor device includes a substrate, an epitaxial layer, and a plurality of cell units each of which includes a first cell and a second cell that are disposed in the epitaxy layer and connected to each other in the epitaxy layer. The first cell includes a first Schottky region, a first junction field effect region, a first well region, a first well contact structure, a first source region, a first Schottky metal, a first ohmic contact metal, and a first gate structure. The second cell includes a second Schottky region, a second junction field effect region, a second well region, a second well contact structure, a second source region, a second Schottky metal, a second ohmic contact metal, and a second gate structure. In the epitaxial layer, the first junction field effect region is connected to the second Schottky region.

Abstract: A Group III-V compound semiconductor device includes a Group III-V compound substrate and a passivation structure. The passivation structure is disposed on a surface of the Group III-V compound substrate and includes a scandium-nitrogen-containing layer and a scandium-oxygen-containing layer sequentially stacked in that order in a direction away from the surface of the Group III-V compound substrate.

Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: A four-junction quaternary compound solar cell and a method thereof are provided. Forming a first subcell (100) with a first band gap, a lattice constant matching with the substrate on an InP grown substrate, forming a second subcell (200) with a second band gap bigger than the first band gap, a lattice constant matching with the substrate on the first subcell, forming a graded buffer layer (600) with a third band gap bigger than the second band gap on the second subcell, forming a third subcell (300) with a fourth band gap bigger than the third band gap, a lattice constant smaller than the substrate on the graded buffer layer, forming a fourth subcell (400) with a fifth band gap bigger than the fourth band gap, a lattice constant matching with the third subcell on the third subcell, and then forming the required four-junction solar cell then by succeeding process including removing the grown substrate, bonding a support substrate, forming electrodes, evaporating an anti-reflect film and so on.

Abstract: A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.

Abstract: A high-concentration solar cell includes an epitaxial layer structure, an upper patterned electrode on the top surface, and a back electrode on the back surface. The upper patterned electrode includes a primary pattern and a secondary pattern, where the primary pattern is composed of a series of small metal isosceles trapezoids around the perimeter of the cell. The narrower base of each metal trapezoid points toward an interior of the cell. A lead soldering pad is located within each metal trapezoid for being soldered to an external conductor for carrying the solar cell current. The secondary pattern consists of thin spaced conductors that connect to the angled sides and base of each trapezoid and spread current across the top surface of the cell. The current along the angled sides of each trapezoid is well-distributed to all the spaced conductors connected to the angled sides to avoid current crowding.

Abstract: A four-junction quaternary compound solar cell and a method thereof are provided.

Abstract: A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.

Abstract: A high-efficiency four-junction solar cell includes: an InP growth substrate; a first subcell formed over the growth substrate, with a first band gap, and a lattice constant matched with that of the growth substrate; a second subcell formed over the first subcell, with a second band gap larger than the first band gap, and a lattice constant matched with that of the growth substrate; a third subcell formed over the second subcell, with a third band gap larger than the second band gap, and a lattice constant matched with that of the substrate lattice; a composition gradient layer formed over the third subcell, with a fourth band gap larger than the third band gap; and a fourth subcell formed over the composition gradient layer, with a fifth band gap larger than the third band gap, and a lattice constant mismatched with that of the substrate.

Abstract: A high-concentration solar cell includes an epitaxial layer structure, an upper patterned electrode on the top surface, and a back electrode on the back surface. The upper patterned electrode includes a primary pattern and a secondary pattern, where the primary pattern is composed of a series of small metal isosceles trapezoids around the perimeter of the cell. The narrower base of each metal trapezoid points toward an interior of the cell. A lead soldering pad is located within each metal trapezoid for being soldered to an external conductor for carrying the solar cell current. The secondary pattern consists of thin spaced conductors that connect to the angled sides and base of each trapezoid and spread current across the top surface of the cell. The current along the angled sides of each trapezoid is well-distributed to all the spaced conductors connected to the angled sides to avoid current crowding.

Abstract: A high-concentration multi-junction solar cell and method for fabricating same is provided. The high-concentration multi-junction solar cell comprises a top cell, an intermediate cell, a bottom cell and two tunneling junctions connecting the top cell and intermediate cell and the intermediate cell and bottom cell. The emitter layers of the top and intermediate cells both employ the graded doping concentrations and have high open circuit voltage and short circuit current. The top cell emitter layer is over several hundred nanometers thicker than that of the traditional multi-junction cell so as to decrease the whole series resistance of the multi-junction cell, improve the fill factor, and gain higher photoelectric conversion efficiency.