Abstract: A display panel includes a substrate, a pad, an auxiliary electrode layer, a data line layer, a first electrode layer, a light emitting layer, and a second electrode layer. The substrate has a display area and a peripheral area. The pad is disposed on a side of the substrate and located in the peripheral area. The auxiliary electrode layer is disposed on the same side of the substrate as the pad; the data line layer is disposed on a same layer as the auxiliary electrode layer; the first electrode layer is disposed on a side of the auxiliary electrode layer facing away from the substrate; the light emitting layer is disposed on a side of the first electrode layer facing away from the substrate; and the second electrode layer is disposed on a side of the light emitting layer facing away from the substrate and connected to the auxiliary electrode layer.

Abstract: The present disclose is related to an array substrate. The array substrate may include a base substrate; a driving transistor on the base substrate; an insulating layer on the driving transistor, the insulating layer comprising a via hole above a first electrode of the driving transistor; a conductive portion on the insulating layer; and a light emitting device on the conductive portion and electrically connected to the conductive portion. The conductive portion may be electrically connected to the first electrode of the driving transistor through the via hole. The light emitting device may be above the via hole, and an orthographic projection of the light emitting device on the base substrate may cover an orthographic projection of the via hole on the base substrate.

Abstract: A display substrate and a fabrication method thereof, a display panel and a display device are provided. The display substrate includes pixels. Each of the pixels includes sub-pixels that emit light of different colors, each of the sub-pixels includes a light emitting element, and at least one of the sub-pixels further includes a color filter. The color filter of the at least one of the sub-pixels covers a portion of a light emitting region of the light emitting element of the at least one of the sub-pixels, and a color of the color filter of the at least one of the sub-pixels is the same as a color of light emitted by the light emitting element of the at least one of the sub-pixels.

Abstract: A multiplexer circuit includes a first selection sub-circuit and a second selection sub-circuit. The first selection sub-circuit configured to transmit an input signal received at a input signal terminal to a first output terminal in response to a first control signal received at a first control terminal, and transmit a voltage of a power supply voltage terminal to the first output terminal in response to a second control signal received at a second control terminal. The second selection sub-circuit configured to transmit the input signal received at the input signal terminal to a second output terminal in response to a third control signal received at a third control terminal, and transmit the voltage of the power supply voltage terminal to the second output terminal in response to a fourth control signal received at a fourth control terminal.

Abstract: A shift register unit and a control method thereof, a gate driving circuit and a control method thereof, and a display apparatus are provided. The shift register unit includes: a first shift register coupled to an input signal terminal, a first clock signal terminal and a second clock signal terminal. The first shift register is configured to generate a first output signal based on the signal at the first clock signal terminal and generate a second output signal based on the signal at the second clock signal terminal; and a second shift register coupled to the input signal terminal and a third clock signal terminal, the second shift register is configured to generate a third output signal based on the signal at the third clock signal terminal. The first shift register includes a first control circuit, a first output circuit and a second output circuit.

Abstract: The present disclosure provides a shift register unit, a driving method, a gate driving circuit and a display device. The shift register unit includes a pull-down node control circuit; the pull-down node control circuit is electrically connected to an input terminal, a reset terminal, a first voltage terminal, a second voltage terminal and a pull-down node, respectively, and is configured to, under the control of an input signal provided by the input terminal and a reset signal provided by the reset terminal, control the pull-down node to be electrically conducted to the first voltage terminal or the second voltage terminal, and control to hold a potential of the pull-down node.

Abstract: The present disclosure provides a display control method and a display control device. The display control method is used for a display panel. The display panel includes at least a first display area and a second display area arranged in a first direction, the first display area is coupled to a first signal line, and the second display area is coupled to a second signal line. The display control method includes: controlling a first sub-pixel in the first display area to display an image via the first signal line; and controlling a second sub-pixel in the second display area to display an image via the second signal line. A light-emission phase of the first sub-pixel at most partially overlaps a light-emission phase of the second sub-pixel.

Abstract: A display substrate (100) and a design method therefor, and a display apparatus. The display substrate (100) includes: pixel circuits which are arranged in an array, where the pixel circuits are divided into at least two areas; and data switching circuits (10), which are correspondingly connected to the pixel circuits in the areas by means of data signal lines, wherein a channel width-to-length ratio (W/L) of a switch device in each data switching circuit (10) is positively correlated with a design data load of an area corresponding to the data switching circuit (10). The width-to-length ratios (W/L) of different switch devices can be matched according to different design data loads of different areas.

Abstract: A display substrate is provided. The display substrate includes: a base substrate including a display area and a peripheral area located on at least a first side of the display area; a plurality of pixel units arranged in an array along a first direction and a second direction in the display area of the base substrate, where the pixel units include a pixel driver circuit and a light-emitting device electrically connected to the pixel driver circuit, and the light-emitting device includes a cathode, an anode, and a light-emitting layer disposed between the cathode and the anode; and a cathode line located in the peripheral area and electrically connected to the cathode. The cathode line substantially surrounds the display area and is electrically connected to the cathode line at a plurality of positions. The cathode line includes a first cathode sub-line located in the same layer as the anode.

Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.

Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes a base substrate and a scan line, a data line, a power supply line, a sensing line, a pixel driving circuit and a light-emitting unit that are sequentially stacked on the base substrate. The array substrate also includes a gate layer, a first conductive layer, a second conductive layer, and a third conductive layer. The first electrode of the storage capacitor is at least disposed at the first conductive layer, and the second electrode of the storage capacitor is at least disposed at the second conductive layer. The data line, the power supply line, and the sensing line are disposed at the third conductive layer.

Abstract: A display panel includes a substrate, a pad, an auxiliary electrode layer, a data line layer, a first electrode layer, a light emitting layer, and a second electrode layer. The substrate has a display area and a peripheral area. The pad is disposed on a side of the substrate and located in the peripheral area. The auxiliary electrode layer is disposed on the same side of the substrate as the pad; the data line layer is disposed on a same layer as the auxiliary electrode layer; the first electrode layer is disposed on a side of the auxiliary electrode layer facing away from the substrate; the light emitting layer is disposed on a side of the first electrode layer facing away from the substrate; and the second electrode layer is disposed on a side of the light emitting layer facing away from the substrate and connected to the auxiliary electrode layer.

Abstract: The present disclosure provides a display substrate, a method for manufacturing the same, a driving method and a display device. The display substrate includes a base substrate, gate lines, data lines and sub-pixels. The sub-pixels include sub-pixel columns corresponding to the data lines in a one-to-one manner. In a sub-pixel driving circuit of the sub-pixel, a driving transistor and a data writing transistor are located at a first side of an aperture area of the sub-pixel; a sensing transistor is located at a second side of the aperture area of the sub-pixel. The first side and the second side are opposite sides of the aperture area along the extension direction of the data lines. Gate electrodes of sensing transistors in a same sub-pixel row, and gate electrodes of data writing transistors in an adjacent next sub-pixel row, are all coupled to a gate line corresponding to the adjacent next sub-pixel row.

Abstract: This application relates to display panels, methods of driving the same, and display devices. The display panel includes: a first pixel circuit and a demultiplexing circuit. The first pixel circuit includes a first reset circuit, a first data writing circuit, and a first drive circuit. A first terminal of the first reset circuit is connected to a first terminal of the first drive circuit. A second terminal of the first reset circuit is connected to a first multiplexing signal line. A control terminal of the first drive circuit is connected to a first terminal of the first data writing circuit. A second terminal of the first data writing circuit is connected to the first multiplexing signal line. The demultiplexing circuit includes a first control circuit and a second control circuit. A first terminal of the first control circuit is connected to the first multiplexing signal line. A second terminal of the first control circuit is used for receiving a reset signal.

Abstract: A multiplexer circuit includes a first selection sub-circuit and a second selection sub-circuit. The first selection sub-circuit configured to transmit an input signal received at a input signal terminal to a first output terminal in response to a first control signal received at a first control terminal, and transmit a voltage of a power supply voltage terminal to the first output terminal in response to a second control signal received at a second control terminal. The second selection sub-circuit configured to transmit the input signal received at the input signal terminal to a second output terminal in response to a third control signal received at a third control terminal, and transmit the voltage of the power supply voltage terminal to the second output terminal in response to a fourth control signal received at a fourth control terminal.

Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a plurality of sub-pixels, a plurality of groups of gate scan signal lines, and a plurality of groups of data lines. Each group of gate scan signal lines includes at least one gate scan signal line, each group of data lines includes n data lines, and the plurality of sub-pixels are arranged in an array; and n is greater than or equal to 2. A group of gate scan signal lines is electrically connected to n rows of sub-pixels. A column of sub-pixels is electrically connected to a group of data lines, and includes a plurality of groups of sub-pixels. Each group of sub-pixels includes n sub-pixels. The n sub-pixels are respectively electrically connected to n data lines in the group of data lines to which this column of sub-pixels is electrically connected.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a storage capacitor. The storage capacitor includes a second capacitor electrode, a first capacitor electrode and a third capacitor electrode which are sequentially on the base substrate. The first capacitor electrode has a first capacitor electrode side and a second capacitor electrode side opposite to each other in the second direction, and the second capacitor electrode has a third capacitor electrode side and a fourth capacitor electrode side opposite to each other in the second direction; orthographic projections of the first capacitor electrode side and the second capacitor electrode side on the base substrate are between an orthographic projection of the third capacitor electrode side and an orthographic projection of the fourth capacitor electrode side on the base substrate.

Abstract: The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate of the present disclosure has a display region, and includes a base and a plurality of data lines and a plurality of fan-out traces on the base; each of the plurality of data lines is connected to a corresponding one of the plurality of fan-out traces at a connection node in the display region; and at least one of the plurality of data lines is connected to a corresponding fan-out trace at a plurality of connection nodes.

Abstract: Provided are a display substrate and a display device. The display substrate includes a base substrate, and gate lines extending in a first direction, data lines extending in a second direction and pixel units that are on the base substrate, the first direction intersecting the second direction; each pixel unit including sub-pixels, each sub-pixel including a pixel circuit; the pixel circuit including at least a switching transistor, a drive transistor, a sensing transistor, and a storage capacitor; for each pixel circuit, the switching transistor, the drive transistor, and the sensing transistor therein are all on a same side of the storage capacitor; the switching transistor is at an intersection of the gate line and the data line connected thereto, and the switching transistor is adjacent to the sensing transistor in the first direction and adjacent to the drive transistor in the second direction.

Abstract: A display substrate, a method of manufacturing a display substrate, and an electronic device are provided. The display substrate includes: a base substrate; a thin film transistor arranged on the base substrate; a first planarization layer arranged on a side of the thin film transistor away from the base substrate; a first protective layer arranged on a side of the first planarization layer away from the base substrate; a first conductive layer arranged on a side of the first protective layer away from the base substrate; and a second planarization layer arranged on a side of the first conductive layer away from the base substrate, wherein the display substrate is provided with a first via hole penetrating the first protective layer, and the first planarization layer is in contact with the second planarization layer through the first via hole.