Patents by Inventor Zhimin J. Yao

Zhimin J. Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9324613
    Abstract: A method for forming through silicon vias (TSVs) in a silicon substrate is disclosed. The method involves forming a silicon post as an substantially continuous annulus in a first side of a silicon substrate, removing material from an opposite side to the level of the substantially continuous annulus, removing the silicon post and replacing it with a metal material to form a metal via extending through the thickness of the substrate. The substantially continuous annulus may be interrupted by at least one tether which connects the silicon post to the silicon substrate. The tether may be formed of a thing isthmus of silicon, or some suitable insulating material.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: April 26, 2016
    Assignee: Innovative Micro Technology
    Inventors: John C Harley, Zhimin J. Yao
  • Publication number: 20160093531
    Abstract: A method for forming through silicon vias (TSVs) in a silicon substrate is disclosed. The method involves forming a silicon post as an substantially continuous annulus in a first side of a silicon substrate, removing material from an opposite side to the level of the substantially continuous annulus, removing the silicon post and replacing it with a metal material to form a metal via extending through the thickness of the substrate. The substantially continuous annulus may be interrupted by at least one tether which connects the silicon post to the silicon substrate. The tether may be formed of a thing isthmus of silicon, or some suitable insulating material.
    Type: Application
    Filed: February 11, 2015
    Publication date: March 31, 2016
    Inventors: John C HARLEY, Zhimin J. Yao
  • Patent number: 7538032
    Abstract: Embodiments of the present invention are directed to a process for forming small diameter vias at low temperatures. In preferred embodiments, through-substrate vias are fabricated by forming a through-substrate via; and depositing conductive material into the via by means of a flowing solution plating technique, wherein the conductive material releases a gas that pushes the conductive material through the via to facilitate plating the via with the conductive material. In preferred embodiments, the fabrication of the substrate is conducted at low temperatures.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: May 26, 2009
    Assignee: Teledyne Scientific & Imaging, LLC
    Inventors: Robert L. Borwick, Philip A. Stupar, Jeffrey F. DeNatale, Chailun Tsai, Zhimin J. Yao, Kathleen Garrett, John White, Les Warren, Morgan Tench
  • Patent number: 6700172
    Abstract: A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: March 2, 2004
    Assignee: Raytheon Company
    Inventors: John C. Ehmke, Charles L. Goldsmith, Zhimin J. Yao, Susan M. Eshelman
  • Patent number: 6391675
    Abstract: A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: May 21, 2002
    Assignee: Raytheon Company
    Inventors: John C. Ehmke, Charles L. Goldsmith, Zhimin J. Yao, Susan M. Eshelman
  • Publication number: 20020036304
    Abstract: A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.
    Type: Application
    Filed: December 4, 2001
    Publication date: March 28, 2002
    Applicant: Raytheon Company, a Delaware corporation
    Inventors: John C. Ehmke, Charles L. Goldsmith, Zhimin J. Yao, Susan M. Eshelman