Abstract: An impedance matching method for a low-profile ultra-wideband array antenna is provided. The method includes: connecting an arm of a balanced end of a hyperbolic microstrip balun in series with an open circuit line; directly coupling the open circuit line to a radiator layer; connecting another arm of the balanced end of the hyperbolic microstrip balun to the radiator layer via a metallized via hole, and welding an unbalanced end of the hyperbolic microstrip balun to a coaxial line, so that the coaxial line feeds a power to the antenna via the hyperbolic microstrip balun. In this method, the open circuit line is integrated between the hyperbolic microstrip balun and the radiator layer of the antenna to achieve an impedance matching of the ultra-wideband antenna and to simplify a structure of a matching circuit.

Abstract: Disclosed is a multi-port phase compensation nested apparatus for microwave-plasma deposition of diamond films. A resonant cavity part includes an inner cavity body, a ring waveguide, a slot opening, a quartz ring, a metal platform, a deposition platform, a substrate, and a recess, wherein the slot opening is located on a wall of the inner cavity body, communicating the inner cavity body with the ring waveguide.

Abstract: A field programmable gate array (FPGA)-based parallel equalization method is provided. The method implements efficient equalization of communication data by means of a parallel pipeline filter structure and through a least mean square (LMS) algorithm capable of dynamically adjusting a step. Firstly, a tap coefficient of an equalization filter is calculated through the LMS algorithm capable of dynamically adjusting an iteration factor. Secondly, the efficiency of FPGA data processing is improved through a multistage pipeline and a multi-channel parallel data processing. According to the present disclosure, in each clock cycle, there are M channels of data inputted into the equalization filter in parallel, and at the same time, there are also M channels of data outputted in parallel, and thus the FPGA can efficiently perform equalization processing on data acquired by a high-speed analog-to-digital converter (ADC) through the parallel pipeline method.

Abstract: It is provided a high-linearity GaN HEMT radio frequency power device for improving a transconductance under a large signal, including a substrate layer, a buffer layer, a second barrier layer, a channel layer, a first barrier layer, and a protection layer arranged in sequence. A source, a gate, and a drain are arranged on the protection layer. A first two-dimensional electron gas and a second two-dimensional electron gas are respectively formed between the channel layer and the first barrier layer and between the channel layer and the second barrier layer. The source, the gate, and the drain are configured to receive an external control signal to control motion of electrons in the first two-dimensional electron gas and the second two-dimensional electron gas formed by the channel layer. In case of the large signal, electrons in the second two-dimensional electron gas flow into the first two-dimensional electron gas.

Abstract: A method for accelerating fast Fourier transform (FFT) based on field programmable gate array is provided. A sequence requiring N-point FFT is decomposed equally into 4 subsequences. The 4 subsequences are processed through 4 parallel FFT intellectual property (IP) cores. Finally, an arithmetic operation is performed on the processed data and twiddle factor data pre-stored in a memory to obtain a result of the N-point FFT of an original sequence. An FFT decomposition module, a twiddle factor storage module, and an operation processing module are provided. Through the processing method, a time delay consumed by an N-point FFT operation can be reduced, and excellent application value can be achieved in a high-speed digital signal processing system.

Abstract: A microstrip ultra-wideband antenna is provided, including: an upper dielectric substrate, a radiation patch, an open-circuit line, a short-circuit line, a ground plane, a lower dielectric substrate, a vertical dielectric substrate, isolation walls, a hyperbolic microstrip balun feeder and an ideal wave port. The radiation patch is attached to a lower surface of the upper dielectric substrate; the ground plane is attached to an upper surface of the lower dielectric substrate; the short-circuit line and the open-circuit line are attached to a rear surface and a front surface of the vertical dielectric substrate respectively; the hyperbolic microstrip balun feeder is attached to the front and rear surface of the vertical dielectric substrate; the isolation walls are located between the upper dielectric substrate and the lower dielectric substrate perpendicularly to an end of the radiation patch; and the ideal wave port is provided below the hyperbolic microstrip balun feeder.

Abstract: The present disclosure provides a reconfigurable power amplifier (PA) based on a PIN switch and a design method thereof. The reconfigurable PA based on a PIN switch includes an input port, an input matching circuit, the PIN switch, a gate bias circuit, a transistor, a drain bias circuit, an output matching circuit and an output port, where the input matching network includes an input end connected to a power input end, and an output end connected to a gate of the transistor, the gate bias circuit is connected in parallel with the gate, the drain bias circuit is connected in parallel with a drain, the drain of the transistor is connected to an input end of the output matching circuit, and an output end of the output matching circuit serves as a power output.

Abstract: The present disclosure provides a multi-band base station antenna for scattering suppression, including a high-band dual-polarized antenna and a low-band dual-polarized antenna. The operating band of the high-band dual-polarized antenna is 1.7-3.0 GHz, which are four; the operating band of the low-band dual-polarized antenna operates is 0.69-0.96 GHz, and is comprised of two intersected dipoles; above the high-band dual-polarized antennas, a spacing between the high-band dual-polarized antenna and the low-band dual-polarized antenna is smaller than the quarter wavelength corresponding to the low-band dual-polarized antenna; the low-band dual-polarized antenna is provided with several rectangular open slots at equal spacings, with symmetrical openings on both sides of the dipole, with a width of 1-1.5 mm and a length of 4-to 6 mm; and a ratio of the sum of widths of the open slots to a length of an arm of the dipole is greater than 0.16 and less than 0.24.

Abstract: An enhancement-mode III-V HEMT based on an all-solid-state battery is provided. In which, a second semiconductor layer and a first semiconductor layer are sequentially formed on a substrate, and a heterostructure is formed between the second semiconductor layer and the first semiconductor layer; a source electrode is electrically connected to a drain electrode through a 2DEG generated in the heterostructure; a gate electrode is used to control on-off of the 2DEG in the heterostructure; and an all-solid-state battery is arranged between the source electrode and the gate electrode, is composed of at least one group of battery units connected in series or connected in series and parallel, and is used to deplete the 2DEG in a corresponding region of the heterostructure.

Abstract: An impedance matching method for a low-profile ultra-wideband array antenna is provided. The method includes: connecting an arm of a balanced end of a hyperbolic microstrip balun in series with an open circuit line; directly coupling the open circuit line to a radiator layer; connecting another arm of the balanced end of the hyperbolic microstrip balun to the radiator layer via a metallized via hole, and welding an unbalanced end of the hyperbolic microstrip balun to a coaxial line, so that the coaxial line feeds a power to the antenna via the hyperbolic microstrip balun. In this method, the open circuit line is integrated between the hyperbolic microstrip balun and the radiator layer of the antenna to achieve an impedance matching of the ultra-wideband antenna and to simplify a structure of a matching circuit.

Abstract: A microstrip ultra-wideband antenna is provided, including: an upper dielectric substrate, a radiation patch, an open-circuit line, a short-circuit line, a ground plane, a lower dielectric substrate, a vertical dielectric substrate, isolation walls, a hyperbolic microstrip balun feeder and an ideal wave port. The radiation patch is attached to a lower surface of the upper dielectric substrate; the ground plane is attached to an upper surface of the lower dielectric substrate; the short-circuit line and the open-circuit line are attached to a rear surface and a front surface of the vertical dielectric substrate respectively; the hyperbolic microstrip balun feeder is attached to the front and rear surface of the vertical dielectric substrate; the isolation walls are located between the upper dielectric substrate and the lower dielectric substrate perpendicularly to an end of the radiation patch; and the ideal wave port is provided below the hyperbolic microstrip balun feeder.

Abstract: The present disclosure provides a multi-band base station antenna for scattering suppression, including a high-band dual-polarized antenna and a low-band dual-polarized antenna. The operating band of the high-band dual-polarized antenna is 1.7-3.0 GHz, which are four; the operating band of the low-band dual-polarized antenna operates is 0.69-0.96 GHz, and is comprised of two intersected dipoles; above the high-band dual-polarized antennas, a spacing between the high-band dual-polarized antenna and the low-band dual-polarized antenna is smaller than the quarter wavelength corresponding to the low-band dual-polarized antenna; the low-band dual-polarized antenna is provided with several rectangular open slots at equal spacings, with symmetrical openings on both sides of the dipole, with a width of 1-1.5 mm and a length of 4-to 6 mm; and a ratio of the sum of widths of the open slots to a length of an arm of the dipole is greater than 0.16 and less than 0.24.

Abstract: An enhancement-mode III-V HEMT based on an all-solid-state battery is characterized in that a second semiconductor layer and a first semiconductor layer are sequentially formed on a substrate, and a heterostructure is formed between the second semiconductor layer and the first semiconductor layer; a source electrode is electrically connected to a drain electrode through a 2DEG generated in the heterostructure; a gate electrode is used to control on-off of the 2DEG in the heterostructure; and an all-solid-state battery is arranged between the source electrode and the gate electrode, is composed of at least one group of battery units connected in series or connected in series and parallel, and is used to deplete the 2DEG in a corresponding region of the heterostructure. The present invention can effectively achieve an enhanced operating mode.

Abstract: Disclosed is a novel III-V heterojunction field effect transistor comprising a substrate layer, a first semiconductor layer, a second semiconductor layer, a drain electrode, a source electrode, a gate electrode, a first dielectric layer, second dielectric layers and the like, wherein the first semiconductor layer has a greater bandgap compared with the second semiconductor layer, and the second semiconductor layer and the first semiconductor layer are combined to form a heterostructure. The thickness of the first semiconductor layer is not greater than the critical thickness of two-dimensional electron gas formed in a heterojunction channel, and thus natural 2DEG in the heterojunction channel is depleted. The novel III-V heterojunction field effect transistor has the advantages of being simple in structure, simple in preparation process, stable in performance, high in reliability and the like.

Abstract: Disclosed is a novel III-V heterojunction field effect transistor comprising a substrate layer, a first semiconductor layer, a second semiconductor layer, a drain electrode, a source electrode, a gate electrode, a first dielectric layer, second dielectric layers and the like, wherein the first semiconductor layer has a greater bandgap compared with the second semiconductor layer, and the second semiconductor layer and the first semiconductor layer are combined to form a heterostructure. The thickness of the first semiconductor layer is not greater than the critical thickness of two-dimensional electron gas formed in a heterojunction channel, and thus natural 2DEG in the heterojunction channel is depleted. The novel III-V heterojunction field effect transistor has the advantages of being simple in structure, simple in preparation process, stable in performance, high in reliability and the like.