Patents by Inventor Zhirui Zong

Zhirui Zong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11372095
    Abstract: Aspects of the present disclosure are directed to injection locking and related apparatuses. As may be implemented in accordance with one or more embodiments, an apparatus includes a plurality of injection-locking circuits configured to receive an injection signal, each injection-locking circuit including a mixer and a lock-detection circuit. In each of the injection-locking circuits, the lock-detection circuit detects a lock-status relationship between the injection signal and a signal output from the injection-locking circuit. In response to the lock-status relationship indicating an unlocked condition, a phase/magnitude of the injection signal is adjusted. In response to the lock-status relationship indicating a locked condition, transmission of an FM continuous wave (FMCW) chirp signal is facilitated.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: June 28, 2022
    Assignee: NXP B.V.
    Inventors: Tarik Saric, Erwin Johannes Gerardus Janssen, Zhirui Zong, Juan Felipe Osorio Tamayo
  • Patent number: 11228318
    Abstract: Exemplary aspects of the present disclosure involve a system and related method of PLL circuitry in a chirp signaling FMCW system having a variable PLL bandwidth (BW). To adjust the BW, the PLL circuitry may provide for variable capacitance in the circuitry. This capacitance change may allow for a bandwidth for one slope, as used for the acquisition period. The capacitance may then be adjusted to allow for a different bandwidth for another slope which is used to reset the circuitry in preparation for another frequency sweep. Adjusting the PLL BW, via variable capacitance, may be used to mitigate phase noise which can adversely the PLL.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: January 18, 2022
    Assignee: NXP B.V.
    Inventors: Tarik Saric, Piotr Gibas, Zhirui Zong
  • Publication number: 20210026002
    Abstract: Aspects of the present disclosure are directed to injection locking and related apparatuses. As may be implemented in accordance with one or more embodiments, an apparatus includes a plurality of injection-locking circuits configured to receive an injection signal, each injection-locking circuit including a mixer and a lock-detection circuit. In each of the injection-locking circuits, the lock-detection circuit detects a lock-status relationship between the injection signal and a signal output from the injection-locking circuit. In response to the lock-status relationship indicating an unlocked condition, a phase/magnitude of the injection signal is adjusted. In response to the lock-status relationship indicating a locked condition, transmission of an FM continuous wave (FMCW) chirp signal is facilitated.
    Type: Application
    Filed: July 24, 2019
    Publication date: January 28, 2021
    Inventors: Tarik Saric, Erwin Johannes Gerardus Janssen, Zhirui Zong, Juan Felipe Osorio Tamayo
  • Patent number: 9385651
    Abstract: A novel and useful 60 GHz frequency generator based on a third harmonic extraction technique which improves system level efficiency and performance. The frequency generator employs a third harmonic boosting technique to increase the third harmonic at the output of the oscillator. The oscillator generates both ˜20 GHz fundamental and a significant amount of the third harmonic at ˜60 GHz and avoids the need for a frequency divider operating at 60 GHz. The undesired fundamental harmonic at ˜20 GHz is rejected by the good fundamental harmonic rejection ratio (HRR) inherent in the oscillator buffer stage while the ˜60 GHz component is amplified to the output. The fundamental harmonic is further suppressed by active cancellation by properly combining the two outputs. The oscillator fabricated in 40 nm CMOS exhibits a phase noise of ?100 dBc/Hz at 1 MHz offset from a 60 GHz carrier and have a tuning range of 25%.
    Type: Grant
    Filed: October 3, 2015
    Date of Patent: July 5, 2016
    Assignee: Short Circuit Technologies LLC
    Inventors: Zhirui Zong, Masoud Babaie, Robert Bogdan Staszewski
  • Publication number: 20160099681
    Abstract: A novel and useful 60 GHz frequency generator based on a third harmonic extraction technique which improves system level efficiency and performance. The frequency generator employs a third harmonic boosting technique to increase the third harmonic at the output of the oscillator. The oscillator generates both ˜20 GHz fundamental and a significant amount of the third harmonic at ˜60 GHz and avoids the need for a frequency divider operating at 60 GHz. The undesired fundamental harmonic at ˜20 GHz is rejected by the good fundamental HRR inherent in the oscillator buffer stage while the ˜60 GHz component is amplified to the output. The fundamental harmonic is further suppressed by an active cancellation by properly combining the two outputs. The oscillator fabricated in 40 nm CMOS exhibits a phase noise of ?100 dBc/Hz at 1 MHz offset from a 60 GHz carrier and have a tuning range of 25%.
    Type: Application
    Filed: October 3, 2015
    Publication date: April 7, 2016
    Inventors: Zhirui Zong, Masoud Babaie, Robert Bogdan Staszewski