Abstract: The present invention discloses an ESD protection circuit comprising resistor vias. It comprises a plurality of ESD devices connected in parallel, with each ESD device comprising a resistor and a two-terminal switch (e.g. an OTS component) connected in series. The resistor is formed in a resistor via disposed vertically with the two-terminal switch and filled with at least a conductive material with high resistivity.

Abstract: The present invention discloses parallel, series and hybrid ESD protection circuits. A preferred parallel ESD protection circuit comprises a plurality of ESD devices connected in parallel, with each comprising a resistor and an OTS component connected in series. A preferred series ESD protection circuit comprises a plurality of ESD devices connected in series, wherein the OTS components in all ESD devices are disposed on a same level. A preferred hybrid ESD protections circuit comprises ESD devices connected in parallel, as well as in series.

Abstract: The present invention provides a selector material, a selector unit and a preparation method thereof and a memory structure, wherein the selector material comprises at least one of Te, Se and S, that is, the selector material is selected from a simple substance such as Te, Se and S or compounds composed of any of these elements, further, the performance can be improved by doping with elements such as O, N, Ga, In, As and the like, or oxides, nitrides and carbides or other dielectric materials. The selector material in the present invention has the advantages of high turn-on current, simple material, fast switching speed, good repeatability and low toxicity when the selector material is used in the selector unit, which is beneficial to achieving high-density three-dimensional information storage.

Abstract: A cross-point memory includes a plurality of memory devices, with each device comprising a memory layer between first and second address lines. In one preferred embodiment, the memory layer comprises an OTS (Ovonic Threshold Switch) film and an antifuse film. In another preferred embodiment, the memory layer comprises an OTS film having a first switch voltage (i.e. forming voltage Vform) greater than all subsequent switch voltages (i.e. threshold voltage Vth).

Abstract: A read-out circuit and a read-out method for a three-dimensional memory, comprises a read reference circuit and a sensitive amplifier, the read reference circuit produces read reference current capable of quickly distinguishing reading low-resistance state unit current and reading high-resistance state unit current. The read reference circuit comprises a reference unit, a bit line matching module, a word line matching module and a transmission gate parasitic parameter matching module. With respect to the parasitic effect and electric leakage of the three-dimensional memory in the plane and vertical directions, the present invention introduces the matching of bit line parasite parameters, leakage current and transmission gate parasitic parameters into the read reference current, and introduces the matching of parasitic parameters of current mirror into the read current, thereby eliminating the phenomenon of pseudo reading and reducing the read-out time.

Abstract: The present invention discloses parallel, series and hybrid ESD protection circuits. A preferred parallel ESD protection circuit comprises a plurality of ESD devices connected in parallel, with each comprising a resistor and an OTS component connected in series. A preferred series ESD protection circuit comprises a plurality of ESD devices connected in series, wherein the OTS components in all ESD devices are disposed on a same level. A preferred hybrid ESD protections circuit comprises ESD devices connected in parallel, as well as in series.

Abstract: A phase change material, a phase change memory cell, and a preparation method thereof. The phase change material comprises elements tantalum, antimony and tellurium, the phase change material having a chemical formula of TaxSbyTez, wherein x, y, and z represent atomic ratios of the elements respectively; and 1?x?25, 0.5?y:z?3, and x+y+z=100. The phase change thin film material TaxSbyTez has a high phase change speed, outstanding thermal stability, strong data retention capability, a long cycle life, and a high yield. Ta5.7Sb37.7Te56.6 has ten-year data retention capability at 165° C.; and applying same in a device cell of a phase change memory achieves an operating speed of 6 ns and endurance of more than 1 million write-erase cycles. The crystal grains of the phase change material TaxSbyTez of the present disclosure are small, and after annealing treatment at 400° C. for 30 minutes, the grain size is still smaller than 30 nm.

Abstract: The present disclosure provides a phase change memory and a method for making the same. The phase change memory includes a substrate, a plurality of phase change memory cells, and an isolation material layer. The plurality of phase change memory cells are separately disposed on the substrate, the phase change memory cell sequentially includes, from bottom to top, a first electrode material layer, a first transition material layer, an ovonic threshold switching (OTS) material layer, a second transition material layer, a second electrode material layer, a third transition material layer, a phase change material layer, a fourth transition material layer, and a third electrode material layer; The isolation material layer is disposed on the substrate and surrounds side surfaces of the phase change memory cell, and the plurality of phase change memory cells are isolated from each other by isolation material layer.

Abstract: A read circuit of storage class memory comprises: an array; a read reference circuit, having the same bit line parasitic parameters as the array, having the same read transmission gate parasitic parameters as the array, used to generate a read reference current; a sense amplifier, providing the same current mirror parasitic parameters as the reference side, used to generate a read current from a selected memory cell, compare the said read current with the said read reference current and output a readout result. In the present invention, the said read current and the said read reference current are generated at the same time, the transient curve of the said read reference current is between the low resistance state read current and the high resistance state read current from an early stage. The present invention largely reduces the read access time, has a good process variation tolerance, has a wide application, and is easy to be used in the practical product.

Abstract: A read-out circuit and a read-out method for a three-dimensional memory, comprises a read reference circuit and a sensitive amplifier, the read reference circuit produces read reference current capable of quickly distinguishing reading low-resistance state unit current and reading high-resistance state unit current. The read reference circuit comprises a reference unit, a bit line matching module, a word line matching module and a transmission gate parasitic parameter matching module. With respect to the parasitic effect and electric leakage of the three-dimensional memory in the plane and vertical directions, the present invention introduces the matching of bit line parasite parameters, leakage current and transmission gate parasitic parameters into the read reference current, and introduces the matching of parasitic parameters of current mirror into the read current, thereby eliminating the phenomenon of pseudo reading and reducing the read-out time.

Abstract: The present disclosure relates to the field of preparing an inorganic nanometer material and application thereof, and specifically relates to a film-forming silica sol, a method of preparing the silica sol, and usage thereof. The present disclosure provides a film-forming silica sol comprising, by weight percentage, constituents of: silica sol: 66-91%; modifying agent: 0.1-1.8%; film-forming auxiliary: 7.2-33.9%. The present disclosure further provides a method of preparing a film-forming silica sol and an application thereof. With the film-forming silica sol, a method of preparing the silica sol, and usage thereof according to the present disclosure, the prepared film-forming silica sol has a good appearance transparency and stability, and when applied to paint as a film-forming coating, it has a good glossiness, a high hardness, and a strong adhesive force; therefore, it has a high practical value in the paint field.

Abstract: A storage array and a storage chip and method for storing a logic relationship between objects. The storage array comprises first leading-out wires and second leading-out wires, and a storage unit is connected between each first leading-out wire and each second leading-out wire having different serial numbers. A controllable switch is connected between each first leading-out wire and each second leading-out wire having a same serial number. The storage chip comprises an interface module. A control module is used for producing a control signal. A driving module is used for producing write current, erase current or read current. A first decoder and a second decoder are used for gating the first leading-out wires and the second leading-out wires. A storage array is used for storing a logic relationship value. The storage method comprises write and read operations.

Abstract: A phase change material for a phase change memory and a preparing method thereof. The phase change material for a phase change memory has a chemical formula of Sc100-x-y-zGexSbyTez, wherein 0?x?60, 0?y?90, 0<z?65, 0<100-x-y-z<100. The phase change material for a phase change memory according to the present invention is capable of repeatedly changing phases. The Sc100-x-y-zGexSbyTez has two different resistance value states, i.e., a high resistance state and a low resistance state, and a reversible transformation between the high resistance state and the low resistance state can be achieved by being applied a pulse electrical signal thereto, which satisfies basic requirements of a storage material for the phase change memory.

Abstract: An Sb—Te—Ti phase-change thin-film material applicable to a phase-change memory and preparation thereof. The Sb—Te—Ti phase-change memory material is formed by doping an Sb—Te phase-change material with Ti, Ti forms bonds with both Sb and Te, and the Sb—Te—Ti phase-change memory material has a chemical formula SbxTeyTi100?x?y, where 0<x<80 and 0<y<100?x. When the Sb—Te—Ti phase-change memory material is a Ti—Sb2Te3 phase-change memory material, Ti atoms replace Sb atoms, and phase separation does not occur. The crystallization temperature of the Sb—Te—Ti phase-change memory material is significantly risen, retention is improved, and thermal stability is enhanced; meanwhile, the amorphous state resistance decreases, and the crystalline state resistance increases; and the Sb—Te—Ti phase-change memory material has wide application in phase-change memories.

Abstract: A storage array and a storage chip and method for storing a logic relationship between objects. The storage array comprises first leading-out wires and second leading-out wires, and a storage unit is connected between each first leading-out wire and each second leading-out wire having different serial numbers. A controllable switch is connected between each first leading-out wire and each second leading-out wire having a same serial number. The storage chip comprises an interface module. A control module is used for producing a control signal. A driving module is used for producing write current, erase current or read current. A first decoder and a second decoder are used for gating the first leading-out wires and the second leading-out wires. A storage array is used for storing a logic relationship value. The storage method comprises write and read operations.

Abstract: A phase change material for a phase change memory and a preparing method thereof. The phase change material for a phase change memory has a chemical formula of Sc100-x-y-zGexSbyTez, wherein 0?x?60, 0?y?90, 0<z?65, 0<100-x-y-z<100. The phase change material for a phase change memory according to the present invention is capable of repeatedly changing phases. The Sc100-x-y-zGexSbyTez has two different resistance value states, i.e., a high resistance state and a low resistance state, and a reversible transformation between the high resistance state and the low resistance state can be achieved by being applied a pulse electrical signal thereto, which satisfies basic requirements of a storage material for the phase change memory.

Abstract: A phase change memory cell and a preparation method thereof. A phase change material layer having a thickness equal to the size of a single unit cell or a plurality of unit cells is adopted, the phase change material layer fundamentally expresses interfacial characteristics, and body material characteristics are weakened, such that a two-dimensional phase change memory cell storing information through change of interface resistance and having a high density, low power consumption and high speed is prepared.

Abstract: The present disclosure provides a method for preparing an aluminum oxide polishing solution. The methods include: 1) mixing a silane coupling agent, ethyl alcohol, and water to form a hydrolysate; 2) under a condition of heating and stirring at a temperature between 95° C. and 110° C., adding the hydrolysate into aluminum oxide powder; keeping stirring while heating till liquid is completely volatilized, thereby obtaining a modified aluminum oxide; 3) grinding the modified aluminum oxide into powder and dispersing the powder into water; adjusting solution pH to 9.5-10.5, thereby obtaining the aluminum oxide polishing solution. It may achieve a polishing efficiency of pH=13.00 by using the aluminum oxide polishing solution of the present disclosure; meanwhile, less scratches will occur to a polishing disc.

Abstract: A read circuit of storage class memory comprises: an array; a read reference circuit, having the same bit line parasitic parameters as the array, having the same read transmission gate parasitic parameters as the array, used to generate a read reference current; a sense amplifier, providing the same current mirror parasitic parameters as the reference side, used to generate a read current from a selected memory cell, compare the said read current with the said read reference current and output a readout result. In the present invention, the said read current and the said read reference current are generated at the same time, the transient curve of the said read reference current is between the low resistance state read current and the high resistance state read current from an early stage. The present invention largely reduces the read access time, has a good process variation tolerance, has a wide application, and is easy to be used in the practical product.

Abstract: The present disclosure provides a method for preparing an aluminum oxide polishing solution. The methods include: 1) mixing a silane coupling agent, ethyl alcohol, and water to form a hydrolysate; 2) under a condition of heating and stirring at a temperature between 95° C. and 110° C., adding the hydrolysate into aluminum oxide powder; keeping stirring while heating till liquid is completely volatilized, thereby obtaining a modified aluminum oxide; 3) grinding the modified aluminum oxide into powder and dispersing the powder into water; adjusting solution pH to 9.5-10.5, thereby obtaining the aluminum oxide polishing solution. It may achieve a polishing efficiency of pH=13.00 by using the aluminum oxide polishing solution of the present disclosure; meanwhile, less scratches will occur to a polishing disc.