Abstract: The invention provides processes to make slowly digestible starches from native and commercial starches. Slowly digestible starches are prepared by controlled hydrolysis of gelatinized starch by alpha amylase. The slowly digestible starches have a range of starch digestion rates and fall between normal, untreated commercial and native starch, and commercial resistant starches. The slowly digestible starches provide a range of starch functionalities. These slow digesting starches retain their digestion characteristic after cooling, and can used in a range of processed food products to modulate the rapid glucose release typical of many processed starchy foods. Edible products incorporating slowly digestible starch will exhibit lower glycemic index and increase satiety. The invention provides solid and liquid food, nutritional, and drug preparations containing the slowly digestible starch.

Abstract: A dual conversion, noise resistant, digitally-controlled mm-wave frequency synthesizer for generating rapidly-tunable RF signals. The prime signal-generation source is a 3.0-3.2 GHz low noise wide band voltage controlled oscillator (“vco”). The oscillator includes a buried stripline hairpin resonator having dual-tuning circuits to increase bandwidth coverage and unique bias circuitry to improve phase noise. The oscillator frequency is multiplied by a factor of two, yielding a 6.0-6.4 GHz signal that is mixed with a fixed locally generated carrier of 3900 MHz, the output of which represents the first Intermediate Frequency (IF). This IF is then mixed with 1950 MHz (3900 MHz divided by two), yielding a second IF that covers the 188 to 550 MHz range. The 2nd IF is divided down and phase locked to an external reference using a commercially available chip set. The 6.0-6.4 phase locked signal is then re-mixed with the 3.0-3.2 GHz output form the oscillator, thereby yielding a 9.0-9.6 GHz signal. The 9.