Patents by Inventor Zhong-Hua Li

Zhong-Hua Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7007186
    Abstract: An integrated circuit configured to capture an input signal to produce an output signal. The input signal is synchronized with a first clock signal. The output signal is synchronized with a second clock signal having a second frequency different from a first frequency associated with the first signal. The integrated circuit includes a first clock domain gating circuit having a first output terminal and a first input terminal. The first clock domain gating circuit is configured to be clocked by the first clock. The first input terminal is coupled to receive the input signal, and the first clock domain gating circuit is configured to toggle a state of a signal on the first output terminal from one of a first state and a second state to the other of the first state and the second state every time a pulse is detected in the input signal, thereby producing a latched output at the first output terminal.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: February 28, 2006
    Assignee: Adaptec Corporation
    Inventors: Zhong-Hua Li, Anil Kapatkar, Srinivasan Venkataraman
  • Patent number: 6907478
    Abstract: A method for facilitating transfer of data between a master block and a slave block through a bus. The method includes ascertaining a transfer size of the data. The method also includes designating a first possible transfer size in a set of possible transfer sizes a chosen transfer size, the set of possible transfer sizes including possible transfer sizes ranging from 20 to 2n, where 2n at least equals to the largest transfer size desired between the master block and the slave block, the first possible transfer size presenting the largest possible transfer size in the set of possible transfer sizes that is less than or equal to the transfer size. The method additionally includes transferring a first data portion of the data from the master block to the slave block, the first data portion having a size that is equal to the chosen transfer size.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: June 14, 2005
    Assignee: Adaptec, Inc.
    Inventors: Zhong-Hua Li, Chakradhara Raj Yadav Aradhyula, Srikanthan Tirumala, Prasad Kuncham
  • Publication number: 20040177176
    Abstract: A method for facilitating transfer of data between a master block and a slave block through a bus. The method includes ascertaining a transfer size of the data. The method also includes designating a first possible transfer size in a set of possible transfer sizes a chosen transfer size, the set of possible transfer sizes including possible transfer sizes ranging from 20 to 2n, where 2n at least equals to the largest transfer size desired between the master block and the slave block, the first possible transfer size presenting the largest possible transfer size in the set of possible transfer sizes that is less than or equal to the transfer size. The method additionally includes transferring a first data portion of the data from the master block to the slave block, the first data portion having a size that is equal to the chosen transfer size.
    Type: Application
    Filed: February 18, 2003
    Publication date: September 9, 2004
    Inventors: Zhong-Hua Li, Chakradhara Raj Yadav Aradhyula, Srikanthan Tirumala, Prasad Kuncham