Abstract: The present disclosure provides a processor having polymorphic instruction set architecture. The processor comprises a scalar processing unit, at least one polymorphic instruction processing unit, at least one multi-granularity parallel memory and a DMA controller. The polymorphic instruction processing unit comprises at least one functional unit. The polymorphic instruction processing unit is configured to interpret and execute a polymorphic instruction and the functional unit is configured to perform specific data operation tasks. The scalar processing unit is configured to invoke the polymorphic instruction and inquire an execution state of the polymorphic instruction. The DMA controller is configured to transmit configuration information for the polymorphic instruction and transmit data required by the polymorphic instruction to the multi-granularity parallel memory.

Abstract: A multi-granularity parallel storage system including a plurality of memories, a shift generator, an address increment lookup unit, an address shifter, a row address generator, and a plurality of address adders. The shift generator is configured to generate a shift value. The address increment lookup unit is configured to generate input data for the address shifter. The address shifter is configured to cyclically shift the input data rightward by Shift elements and then output the shifted data. The row address generator is configured to generate a row address RowAddr and input the generated row address RowAddr to the other input terminal of each address adder. Each address adder is configured to perform a non-sign addition of the input data at the two input terminals to obtain a read/write (R/W) address for one of the memories and input the R/W address to an address input terminal of the memory.

Abstract: A multi-granularity parallel storage system includes an R/W port and a memory. The memory includes W memory blocks and a data gating network. Each of the memory blocks is a 2D array consisting of multiple memory units, and each memory row of the 2D array includes W memory units. For each memory block, one memory row can be read/written at a time, W is the nth power of 2, and n is a natural number.

Abstract: A multi-granularity parallel storage system including a plurality of memories, a shift generator, an address increment lookup unit, an address shifter, a row address generator, and a plurality of address adders. The shift generator is configured to generate a shift value. The address increment lookup unit is configured to generate input data for the address shifter. The address shifter is configured to cyclically shift the input data rightward by Shift elements and then output the shifted data. The row address generator is configured to generate a row address RowAddr and input the generated row address RowAddr to the other input terminal of each address adder. Each address adder is configured to perform a non-sign addition of the input data at the two input terminals to obtain a read/write (R/W) address for one of the memories and input the R/W address to an address input terminal of the memory.

Abstract: A multi-granularity parallel storage system and memory that support parallel read/write of rows and columns in multiple granularities. The storage system includes a R/W port and a memory. The memory includes W memory blocks and a data gating network. Each of the memory blocks is a 2D array consisting of multiple memory units and each memory row of the 2D array includes W memory units. For each memory block, one memory row can be read/written at a time, W is the nth power of 2, and n is a natural number. The storage system can support parallel read/write of matrix row and column data of different data types at the same time, and thus essentially eliminate the need for a transposition operation in signal processing and improve efficiency of signal processing.

Abstract: A process for preparing an enantiomerically enriched cycloalkene-substituted alanine compound having the structure: by asymmetrically hydrogenating a dehydro amino acid compound having the structure: in a suitable reaction media in the presence of a catalyst having a transition metal moiety complexed to a chiral phosphine ligand to prepare enantiomerically enriched cycloalkene substituted alanine compounds having the structure of Formula (IA) or (IB), which are key intermediates for the ACE inhibitors ramipril and perindolpril:

Abstract: A method of making cementitious particles using combustion synthesis is described. The method uses less energy and produces lower CO2 emissions than conventional processes. By controlling the process conditions, the morphology and the properties of the particles can be easily tuned for a variety of applications. A batch reactor and a continuous conveyor type reactor that can be used for the combustion synthesis with high viscosity raw materials are also described.

Abstract: A process for preparing an enantiomerically enriched cycloalkene-substituted alanine compound having the structure: by asymmetrically hydrogenating a dehydro amino acid compound having the structure: in a suitable reaction media in the presence of a catalyst having a transition metal moiety complexed to a chiral phosphine ligand to prepare enantiomerically enriched cycloalkene substituted alanine compounds having the structure of Formula (IA) or (IB), which are key intermediates for the ACE inhibitors ramipril and perindolpril:

Abstract: A method of making cementitious particles using combustion synthesis is described. The method uses less energy and produces lower CO2 emissions than conventional processes. By controlling the process conditions, the morphology and the properties of the particles can be easily tuned for a variety of applications. A batch reactor and a continuous conveyor type reactor that can be used for the combustion synthesis with high viscosity raw materials are also described.