Abstract: The present disclosure relates to a high-speed and low-power successive approximation register analog-to-digital converter (SAR ADC) and an analog-to-digital conversion method. Binary redundancy reassembly is performed to improve a digital-to-analog converter (DAC) capacitor array included in the SAR ADC such that the total number of capacitors included in a capacitor sub-array of the DAC capacitor array is greater than the number of precision bits of the SAR ADC, and the total number of unit capacitors included in all capacitors when the total number of capacitors included in the capacitor sub-array is greater than the number of precision bits of the SAR ADC is equal to the total number of unit capacitors included in all capacitors when the total number of capacitors included in the capacitor sub-array is equal to the number of precision bits of the SAR ADC.

Abstract: A chip-package-antenna integrated structure based on an SIW multi-feed network. A plurality of output terminals of the chip are connected to the SIW multi-feed network through the impedance matching network, to achieve the impedance matching between the chip and the SIW multi-feed network. The output terminal of the SIW multi-feed network is directly connected to the antenna terminals, and two or more input signals experience power combining in the substrate integrated waveguide are combined for power combining. Then the combined millimeter-wave signal is radiated by the antenna, finally realizing the power combining in the chip-package-antenna integrated structure. At the same time, the SIW multi-feed network is composed of a SIW structure, in which a plurality of via holes are arranged spaced apart to form a cavity structure.

Abstract: Provided is a millimeter-wave radar package module, which relates to antenna packaging. The millimeter wave radar package module includes a package and a plurality of antenna units packaged therein. The package includes a chip, and the chip includes a transmitter and a receiver. The antenna units are respectively connected to an output pin of the receiver and an output pin of the transmitter through a transmission line.

Abstract: The present disclosure relates to a high-speed and low-power successive approximation register analog-to-digital converter (SAR ADC) and an analog-to-digital conversion method. Binary redundancy reassembly is performed to improve a digital-to-analog converter (DAC) capacitor array included in the SAR ADC such that the total number of capacitors included in a capacitor sub-array of the DAC capacitor array is greater than the number of precision bits of the SAR ADC, and the total number of unit capacitors included in all capacitors when the total number of capacitors included in the capacitor sub-array is greater than the number of precision bits of the SAR ADC is equal to the total number of unit capacitors included in all capacitors when the total number of capacitors included in the capacitor sub-array is equal to the number of precision bits of the SAR ADC.

Abstract: A multi-feed packaged antenna based on fan-out package, which relates to packaged antennas. A first passivation layer is arranged under a packaging layer, and first and second redistribution layers are arranged on the first passivation layer to build the multi-feed packaged antenna. Connecting ends of multiple channels of a chip are connected to a feed structure of a packaged antenna. A metal layer of the feed structure is achieved by the first redistribution layer, and the second redistribution layer is mainly configured to package an antenna. The coaxial feed is adopted herein, in which two redistribution layers are provided, by which a multi-port power combining can be achieved on the antenna, providing a wide-beam performance.

Abstract: A multi-feed packaged antenna based on fan-out package, which relates to packaged antennas. A first passivation layer is arranged under a packaging layer, and first and second redistribution layers are arranged on the first passivation layer to build the multi-feed packaged antenna. Connecting ends of multiple channels of a chip are connected to a feed structure of a packaged antenna. A metal layer of the feed structure is achieved by the first redistribution layer, and the second redistribution layer is mainly configured to package an antenna. The coaxial feed is adopted herein, in which two redistribution layers are provided, by which a multi-port power combining can be achieved on the antenna, providing a wide-beam performance.

Abstract: Provided is a millimeter-wave radar package module, which relates to antenna packaging. The millimeter wave radar package module includes a package and a plurality of antenna units packaged therein. The package includes a chip, and the chip includes a transmitter and a receiver. The antenna units are respectively connected to an output pin of the receiver and an output pin of the transmitter through a transmission line.

Abstract: A chip-package-antenna integrated structure based on an SIW multi-feed network. A plurality of output terminals of the chip are connected to the SIW multi-feed network through the impedance matching network, to achieve the impedance matching between the chip and the SIW multi-feed network. The output terminal of the SIW multi-feed network is directly connected to the antenna terminals, and two or more input signals experience power combining in the substrate integrated waveguide are combined for power combining. Then the combined millimeter-wave signal is radiated by the antenna, finally realizing the power combining in the chip-package-antenna integrated structure. At the same time, the SIW multi-feed network is composed of a SIW structure, in which a plurality of via holes are arranged spaced apart to form a cavity structure.