Semiconductor device
A semiconductor device includes a semiconductor substrate, a channel layer, a Schottky layer, a first layer having a narrower band gap than the Schottky layer, a second layer having band discontinuity with the Schottky layer, a gate electrode, an n+ layer, a source electrode, and a drain electrode. The first and second layers are within the Schottky layer, and the second layer is disposed on the first layer.
Latest Mitsubishi Denki Kabushiki Kaisha Patents:
- Randomly accessible visual information recording medium and recording method, and reproducing device and reproducing method
- RANDOMLY ACCESSIBLE VISUAL INFORMATION RECORDING MEDIUM AND RECORDING METHOD, AND REPRODUCING DEVICE AND REPRODUCING METHOD
- Randomly accessible visual information recording medium and recording method, and reproducing device and reproducing method
- RANDOMLY ACCESSIBLE VISUAL INFORMATION RECORDING MEDIUM AND RECORDING METHOD, AND REPRODUCING DEVICE AND REPRODUCING METHOD
- SOLAR CELL PANEL
1. Field of the Invention
The present invention relates to a semiconductor device such as a metal-semiconductor field effect transistor and a pseudomorphic high electron mobility transistor.
2. Background Art
Schottky gate field effect transistors such as a metal-semiconductor field effect transistor (hereinafter referred to as MESFET), a pseudomorphic high electron mobility transistor (hereinafter referred to as PHEMT) and the like using GaAs or InP are used as high frequency transistors used in a microwave band to a milliwave band. These devices have been known to undergo elemental deterioration caused by an electric field in the case of a high radio frequency (hereinafter referred to as RF) output operation described in GaAs IC symposium (1995), pp81-84 and GaAs IC symposium (1994), pp259-262. Particularly it is demanded of high frequency transistors to have high frequency characteristics and elemental dimensions such as a gate length and a channel depth are therefore designed to be smaller. When such an element is operated under high voltage, the electric field becomes very high and therefore a characteristic deterioration caused by the electric field is easily caused. For example, GaAs PHEMTs are reduced in output in a RF reliability test performed at room temperature and the temperature of these devices become high when they are operated as described in the GaAs MANTECH (1997), pp42-45.
Also, in a high electron mobility transistor which is provided with a first semiconductor layer having a narrow band gap and a second semiconductor layer having a wide band gap and in which a two-dimensional electron gas channel is formed at the boundary between the first semiconductor layer and the second semiconductor layer, a third semiconductor layer as a gate section which forms a p-n junction between itself and the second semiconductor layer and has a conductor lower end higher than that of the second semiconductor layer in the energy band structure to constitute a barrier is disposed on the second semiconductor layer, thereby constituting the transistor, as described in Japanese Laid-Open Patent Publication No. 64-36080. Further, there is a compound semiconductor device in which a compound semiconductor layer (energy barrier layer) having a larger band gap than a carrier supply layer and a buffer layer is inserted into these layers to thereby form an energy barrier against carriers thereby decreasing leak current and also improving low noise properties as described in Japanese Laid-Open Patent Publication No. 6-244218. Also, there is a high electron mobility transistor in which a layer having a large forbidden band width is formed in the carrier supply layer to prevent inflow of holes as described in Japanese Laid-open Patent Publication No. 9-205196.
The deterioration mechanism of a PHEMT is considered to be as follows. First, hot carriers of hot electrons or hot holes having high energy due to impact ionization when the PHEMT is operated in a high electric field is generated. These hot carriers reach the surface of a semiconductor device and deteriorate the surface. In the case where these hot carriers are hot electrons, they are trapped by a surface passivation film and a depletion layer is widened by the negative charge, causing channel contraction. Alternatively, the hot carriers may cause damage to the surface of the semiconductor device. As a consequence, the Imax value drops, so that the characteristics of the PHEMT are deteriorated. This deterioration mechanism becomes more significant with an increased electric field. Also, because impact ionization energy is large in InP type HEMT or metamorphic HEMT which improves high frequency characteristics, the deterioration characteristics is significant.
SUMMARY OF THE INVENTIONIt is an object of the present invention to restrict the characteristic deterioration caused by an electric field in the semiconductor device such as a MESFET and a PHEMT.
In accordance with one aspect of the present invention, there is a semiconductor device including a semiconductor substrate, a channel layer formed on the semiconductor substrate, a Schottky layer formed on the channel layer, a first layer having a narrower band gap than the Schottky layer, a second layer having band discontinuity with the Schottky layer, a gate electrode disposed on the Schottky layer, n+ layer formed on the Schottky layer on both sides of the gate electrode, the n+ layer having discontinuous parts positioned on the gate electrode, a source electrode formed on the first n+ layer, and a drain electrode formed on the second n+ layer. The first and second layers are inserted in the Schottky layer, and the second layer is disposed on the first layer.
BRIEF DESCRIPTION OF THE DRAWINGSThe present invention will become readily understood from the following description of preferred embodiments thereof made with reference to the accompanying drawings, in which like parts are designated by like reference numeral, and in which:
A semiconductor device according to an embodiment of the present invention will be explained with reference to accompanying drawings. It is to be noted that in these drawings, the same symbols are affixed to substantially the same parts.
First Embodiment A semiconductor device according to a first embodiment of the present invention will be explained with reference to
Here, as the Schottky layer 5, an AlGaAs layer in which the mol ratio of Al is 0.24 or less is usually used. Also, the barrier layer 11 is made of a semiconductor material having bands (ΔEc and ΔEv) discontinuous to the Schottky layer 5 and has a barrier effect on carriers such as holes or electrons. As the barrier layer 11, an AlGaAs layer or InGaP layer in which the mol ratio of Al is 0.4 or more which is higher than that of the Schottky layer 5 may be used. Further, the recombination layer 12 is made of a material having a narrower band gap than the Schottky layer 5. As the recombination layer 12, for example, an InGaAs layer doped with oxygen may be used. A layer having a lattice defect in the interface or within the layer may also be used as the recombination layer 12.
Next, the effect obtained by the recombination layer 12 and the barrier layer 11 disposed between the Schottky layers 5a and 5b will be explained with reference to
It should be noted that each electrode may be covered with insulator with keeping a contact face. The semiconductor device may be packaged within a case.
Second Embodiment A semiconductor device according to a second embodiment of the present invention will be explained with reference to
Next, explanations will be furnished as to the effect of the p+ contact layer 15 with reference to
A semiconductor device according to a third embodiment of the present invention will be explained with reference to
A semiconductor device according to a fourth embodiment of the present invention will be explained with reference to
Although, in this example, the via-hole 16 is opened from the surface of the GaAs substrate 10 and is penetrated up to the source electrode 2, it may be opened from the source electrode 2 and penetrated up to the GaAs substrate 10.
Fifth Embodiment A semiconductor device according to a fifth embodiment of the present invention will be explained with reference to
Next, a surface deterioration caused by an electric field arises on the surface of the Schottky layer 5. On the other hand, a compound semiconductor containing phosphorus (P) such as InGaP semiconductor and the like is more resistant to oxidation than compound semiconductors such as compound semiconductors containing arsenic (As) such as GaAs and AlGaAs semiconductors. Also, InGaP has large band discontinuity (ΔEv) in a valence band and therefore has a barrier effect upon hot holes. Moreover, InGaP is resistant to surface oxidation. Then, the surface of the Schottky layer 5 is covered with the InGaP layer 18, whereby the surface deterioration can be limited. In the production of this semiconductor device, InGaP having a specific form as shown in
A semiconductor device according to a sixth embodiment of the present invention will be explained with reference to
Explanations will be furnished as to the effect obtained by providing the n− GaAs layer 19 sandwiched between these two InGaP layers 17 and 18 and the n+ GaAs layer 4. Like the explanations in the fifth embodiment, a surface deterioration caused by a high electric field is restricted by covering the surface of the Schottky layer 5 and the surface of the n− GaAs layer 19 with InGaP layer 7 and 18.
It is to be noted that although the explanations are furnished taking a GaAs PHEMT as an example, the present invention is not limited to this transistor and is applicable to semiconductors having a FET (field-effect transistor) structure such as MESFETs, InP type HEMTs and metamorphic HEMTs.
The semiconductor device according to the present invention is provided with a recombination layer and a barrier layer disposed on the recombination layer between two Schottky layers. In an RF high output operation, hot carriers generated in a channel layer due to a high electric field are intercepted by the barrier layer, so that they do not reach the surface above the barrier layer. For this, a surface deterioration caused by these hot carriers can be restricted. Also, the hot carriers intercepted by the barrier layer become extinct resulting from the recombination of holes with electrons in a recombination layer disposed under the barrier layer, whereby the accumulation of these hot carriers can be prevented.
Although the present invention has been described in connection with the preferred embodiments thereof with reference to the accompanying drawings, it is to be noted that various changes and modifications are apparent to those skilled in the art. Such changes and modifications are to be understood as included within the scope of the present invention as defined by the appended claims, unless they depart therefrom.
Claims
1-5. (canceled)
6. A semiconductor device comprising:
- a channel layer on a semiconductor substrate;
- a Schottky layer on the channel layer;
- a gate electrode disposed on the Schottky layer;
- a compound semiconductor layer containing phosphorus and covering the Schottky layer;
- first and second n+ layers on the compound semiconductor layer containing phosphorus, on opposite sides of the gate electrode;
- a source electrode on the first n+ layer; and
- a drain electrode on the second n+ layer.
7. The semiconductor device according to claim 6, further comprising:
- a first pair of first and second compound semiconductor layers containing phosphorus sandwiching the first n+ layer; and
- a second pair of first and second compound semiconductor layers containing phosphorus and sandwiching the second n+ layer.
8. The semiconductor device according to claim 6, further comprising:
- a first pair of first and second compound semiconductor layers containing phosphorus sandwiched between the first n+ layer and the Schottky layer;
- a first n− layer sandwiched between the first pair of first and second compound semiconductor layers containing phosphorus.
- a second pair of first and second compound semiconductor layers containing phosphorus sandwiched between the second n+ layer and the Schottky layer; and
- a second n− layer sandwiched between the second pair of first and second compound semiconductor layers containing phosphorus.
9. The semiconductor device according to claim 6, wherein the compound semiconductor layer containing phosphorus is InGaP.
10. (canceled)
Type: Application
Filed: Mar 14, 2005
Publication Date: Aug 4, 2005
Applicant: Mitsubishi Denki Kabushiki Kaisha (Tokyo)
Inventor: Takayuki Hisaka (Tokyo)
Application Number: 11/078,361