Method and apparatus for external processor thermal control
A system and method for throttling a slave component of a computer system to reduce an overall temperature of the computing system upon receiving a first signal is disclosed. The first signal may be from a master component indicating that a temperature for the master component has exceeded its threshold temperature. The slave component or the master component may be a central processing unit, a graphics memory and controller hub, or a central processing unit memory controller hub. The slave component may send a second signal to indicate that a temperature for the slave component has exceeded its temperature. The master component would then initiate throttling of the master component to reduce the overall temperature of the computing system. The master component may be throttled to a degree less than the slave component. A first component may be designated the master component and the second component may be designated the slave component based on a selection policy. The selection policy may be received from a user through a graphical user interface. The selection policy may be based on an action being performed by the computing system.
Embodiments of the invention pertain to cooling systems for computer systems. More particularly, embodiments of the invention pertain to throttling a component of a computer system based on a criterion.
The movement of electrons within the electrical components of a computer system causes a great deal of heat to be generated. Unless the heat is dissipated, it will accumulate, causing damage to the system. Such damage may include the warping of the electrical components and possible fire hazards.
Currently, thermal sensors are attached to a die to read the actual temperature of the die hot spots. When the hot spot temperatures are exceeded on a particular die, that die reduces its temperature independently of the other die using some form of reduction in work per unit time, also called throttling. This throttling prevents a die from reaching its maximum working temperature and damaging the system. Throttling may be performed by clock gating and clock frequency reduction.
The throttling may be triggered if the thermal sensors read a throttling threshold temperature up to some maximum tolerable temperature. To ensure safety, this maximum temperature may be set well below a temperature that causes actual catastrophic damage.
Usually, different components in a system, such as the central unit and the graphics memory and controller hub (GMCH), may share a cooling system for a more efficient design to the computer system. However, these different components often have different cooling needs.
BRIEF DESCRIPTION OF THE DRAWINGS
A system and method for throttling a slave component of a computer system to reduce an overall temperature of the computing system upon receiving a first signal is disclosed. The first signal may be from a master component indicating that a temperature for the master component has exceeded its threshold temperature. The slave component or the master component may be a central processing unit (CPU), a graphics memory and controller hub (GMCH), or a CPU memory controller hub. The slave component may send a second signal to indicate that a temperature for the slave component has exceeded its temperature. The master component may then initiate throttling of the master component to reduce the overall temperature of the computing system. The master component may be throttled to a degree less than the slave component. A first component may be designated the master component and the second component may be designated the slave component based on a selection policy. The selection policy may be received from a user through a graphical user interface. The selection policy may be based on an action being performed by the computing system.
Embodiments of the present invention also relate to apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but not limited to, any type of disk including floppy disks, optical disks, compact disk-read only memories (CD-ROMs), and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), erasable programmable read only memories (EPROMs), electronically erasable programmable read only memories (EEPROMs), magnetic or optical cards, or any type of media suitable for storing electronic instructions, and each coupled to a computer system bus. Instructions are executable using one or more devices (e.g., central processing units, etc.). In other embodiments, steps of the present invention might be performed by specific hardware components that contain reconfigurable or hardwired logic for performing the steps, or by any combination of programmed computer components and custom hardware components.
The minimum residual GMCH thermal power budget is the power available to the GMCH 120 when the CPU 110 is at its maximum operating power in steady state. The minimum residual CPU thermal power budget is the power available to the CPU 110 when the GMCH 120 is at its maximum operating power in steady state.
The CPU 110 has a microprocessor 111 to process software instructions. The CPU 110 may have a thermal sensor 112 to detect when the CPU 110 is getting too hot. The thermal sensor 112 may alert a CPU throttling arbiter 113, which may contain throttling control logic to control CPU throttling hardware 114. The throttling hardware 114 then reduces the amount of processing being performed by the microprocessor. For a computing system 100 that executes graphics, a graphics driver 115 may be used to interact with the GMCH 120 via the FSB 130. Messages may be transmitted via the FSB 130 using the inband message protocol 116.
The GMCH 120 may have a graphics engine 121 to execute graphics processing. The GMCH 120 may have a thermal sensor 122 to detect when the GMCH 120 is getting too hot. The thermal sensor 122 may alert a GMCH throttling arbiter 123, which may contain throttling control logic to control GMCH throttling hardware 124. The throttling hardware 114 then reduces the amount of graphics execution being performed by the microprocessor. Messages may be transmitted via the FSB 130 using the inband message protocol 125.
The CPU 110 may have a pin 150, such as a PROCHOT pin, which receives a signal from the GMCH 120. Upon receiving the signal, the CPU throttling arbiter 113 may cause the CPU throttling hardware 114 to throttle the microprocessor 111. Additionally, the GMCH 120 may also have a PROCHOT pin 160, which receives a signal from the CPU 110. Upon receiving the signal, the GMCH throttling arbiter 123 may cause the graphics throttling hardware 124 to throttle the graphics engine 121.
The heat capacity 222 and the thermal conductivity 224 of the shared thermal solution 220 create a heat reduction factor θsa. The heat capacity 212 and the thermal conductivity 214 of the first junction 210 create a heat reduction factor θjs1. The heat capacity 232 and the thermal conductivity 234 of the second junction 230 create a heat reduction factor θjs2. The temperature for the CPU 110 and the GMCH 120 may be governed by the equations:
Tcpu=(Pcpu+Pgmch)*θsa +Ta +Pcpu*θjs1
Tgmch=(Pcpu+Pgmch)*θsa+Ta +Pgmch*θjs2
where Pcpu is the power from CPU 110, Pgmch is the power from the GMCH 120, and Ta is the ambient temperature 240. If the temperature of the CPU 110 is greater than its maximum allowed die junction temperature, then the temperature of the CPU 110 must be reduced. If the temperature of the GMCH 120 is greater than its maximum allowed die junction temperature, then the temperature of the GMCH 120 must be reduced.
The temperatures of the CPU 110 and the GMCH 120 may be reduced in a number of ways.
In a further embodiment, a selection policy may be used to designate which component is throttled.
In a further embodiment, a selection policy may be based on the actions being performed by the computing system at that time.
In the above description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention can be practiced without these specific details.
Claims
1. A method comprising:
- receiving in a slave component a first signal from a master component indicating that a temperature for the master component has exceeded a master threshold temperature; and
- throttling the slave component to reduce an overall temperature of the computing system.
2. The method of claim 1, further comprising:
- sending to the master component a second signal from the slave component indicating that a temperature for the slave component has exceeded a slave threshold temperature to initiate throttling of the master component to reduce the overall temperature of the computing system.
3. The method of claim 2, further comprising throttling the master component to a degree less than the slave component.
4. The method of claim 1, further comprising:
- selecting a first component to be the master component based on a selection policy; and
- selecting a second component to be the slave component based on a selection policy.
5. The method of claim 4, further comprising allowing a user to create the selection policy.
6. The method of claim 5, wherein the selection policy is determined by an action being performed by the computing system.
7. A set of instructions residing in a storage medium, said set of instructions to be executed by a processor to implement a method for processing data, the method comprising:
- receiving at a pin of a slave component a first signal from a master component indicating that a temperature for the master component has exceeded a master threshold temperature; and
- throttling the slave component to reduce an overall temperature of the computing system.
8. The set of instructions of claim 7, further comprising:
- sending to the master component a second signal from the slave component indicating that a temperature for the slave component has exceeded a slave threshold temperature to initiate throttling of the master component to reduce the overall temperature of the computing system.
9. The set of instructions of claim 7, further comprising:
- selecting a first component to be the master component based on a selection policy; and
- selecting a second component to be the slave component based on a selection policy.
10. The set of instructions of claim 9, wherein the selection policy is determined by an action being performed by the computing system.
11. A slave component of a computing system comprising:
- a slave throttling hardware to throttle the slave component; upon receiving; and
- a throttling control logic to activate the slave throttling hardware of the slave component upon receiving a first signal from a master component that shares a cooling system with the slave component, the signal indicating that a temperature for the master component has exceeded a master threshold temperature.
12. The slave component of claim 11, wherein the master component and the slave component are each one of a central processing unit, a graphics memory and controller hub, or a central processing unit memory controller hub.
13. The slave component of claim 11, further comprising a first slave pin to receive the first signal.
14. The slave component of claim 13, further comprising:
- a thermal sensor to read a temperature for the slave component; and
- a second slave pin to send a second signal from the slave component indicating that a temperature for the slave component has exceeded a slave threshold temperature to induce throttling of the master component.
15. A computing system comprising:
- a first component including: a first component throttling hardware to throttle the first component; and a first throttling control logic to activate the first throttling hardware of the first component upon receiving a first signal;
- a second component including: a second component thermal sensor to sense a temperature of the second component; and a second throttling control logic to send the first signal indicating that the temperature of the second component has exceeded a second threshold temperature; and
- a shared cooling solution to cool the first component and the second component.
16. The computing system of claim 15, wherein the first component and the second component are each one of a central processing unit, a graphics memory and controller hub, or a central processing unit memory controller hub.
17. The computing system of claim 15, wherein
- the first component further includes a first component thermal sensor to read a temperature for the slave component;
- the second component further includes a second component throttling hardware to throttle the second component; and
- the first throttling control logic sends a second signal to the second throttling control logic to throttle the second component.
18. The computing system of claim 17, wherein the first throttling control logic and the second throttling control logic select the first component to be a master component and the second component to be a slave component based on a selection policy.
19. The computing system of claim 18, further comprising a graphical user interface to allow a user to create the selection policy.
20. The computing system of claim 18, wherein the selection policy is determined by an action being performed by the computing system.
21. The computing system of claim 17, wherein
- the first component further includes a first receiving pin to receive the first signal and a first transmitting pin to send the second signal; and
- the second component further includes a second receiving pin to receive the second signal and a second transmitting pin to send the first signal.
22. The computing system of claim 17, further comprising a front side bus coupling the first component to the second component to communicate the first signal and the second signal.
Type: Application
Filed: Dec 29, 2004
Publication Date: Jun 29, 2006
Inventors: Eric Samson (Folsom, CA), John Horigan (Mountain View, CA), Robert Jackson (San Jose, CA), Shreekant Thakkar (Portland, OR)
Application Number: 11/027,433
International Classification: F25B 41/00 (20060101); F25D 23/12 (20060101); F15B 7/00 (20060101);