System and method for controlling boot-up process in a communications network switch using preconfiguration of port hardware

Abstract

A system and method for controlling an Ethernet node's boot-up process. Port hardware associated with the Ethernet node may be configured to include a TX DISABLED state as a default condition during power up. Upon detecting a system reset condition with respect to the Ethernet node, the TX DISABLED state is triggered at the port hardware. Initialization and configuration of system switch software continues to take place in response to the system reset condition. Responsive to the TX DISABLED state, network traffic on the link ports is curtailed. Upon completion of the system software configuration, a TX ENABLED state is effectuated with respect to the link ports, whereupon network traffic on the link ports may commence.

Description

PRIORITY UNDER 35 U.S.C. §119(e) & 37 C.F.R. §1.78

This nonprovisional application claims priority based upon the following prior United States provisional patent application entitled: ETHERNET PHY PORT HARDWARE PRECONFIGURATION DURING HARDWARE BOOTUP, Application No.: 60/667,549, filed Apr. 1, 2005, in the name of Prakash Jain, which is hereby incorporated by reference for all purposes.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application discloses subject matter related to the subject matter disclosed in the following commonly owned co-pending patent application(s): (i) “SYSTEM AND METHOD FOR CONTROLLING BOOT-UP PROCESS IN A COMMUNICATIONS NETWORK SWITCH,” filed even date herewith, Attorney Docket No. 1285-0176US, in the name(s) of: Prakash Jain and Trinh Minh, which is (are) hereby incorporated by reference.

BACKGROUND OF THE INVENTION

1. Technical Field of the Invention

The present invention generally relates to communications networks. More particularly, and not by way of any limitation, the present invention is directed to system and method for controlling boot-up process in a communications network entity such as an Ethernet node.

2. Description of Related Art

When a communications network entity such as an Ethernet node (e.g., an Ethernet switch/router) is set in a reboot state, its link port hardware may exhibit certain voltage levels on the links associated therewith that may be sensed by other network entities connected to the Ethernet node as being indicative of operational links, while the system software of the Ethernet node is still undergoing initialization and configuration. Accordingly, the other network entities including remote devices may continue to transmit data traffic towards the Ethernet node that is undergoing boot-up. It is known that such a boot-up behavior can cause numerous network problems. For instance, a remote device being serviced by the Ethernet node may start sending the network traffic on a port interface that has not been properly processed, thereby potentially resulting in lost traffic. Also, based on the detection of a false operational condition of a switch port, a change in the network topology may be sensed, although the change is erroneous in fact. This situation may cause higher convergence times with respect to the switching and routing protocols operating in the network. Similar network problems are also known to exist even where redundant interfaces are available for the ports that are newly coming up in a booting process. Additionally, where advanced techniques such as load balancing or link aggregation are implemented, the potential for further complications in the network increases significantly.

SUMMARY OF THE INVENTION

Embodiments of the present disclosure are directed to a system and method for controlling an Ethernet node's boot-up process. Port hardware associated with the Ethernet node may be configured (e.g., preconfigured or reconfigured) to include a TX DISABLED state as a default condition during power up. Upon detecting a system reset condition with respect to the Ethernet node (including, e.g., power-on or boot-up condition), the TX DISABLED state is triggered at the port hardware, whereby the port hardware is inactivated. Initialization and configuration of system switch software continues to take place in response to the system reset condition. Responsive to the TX DISABLED state, network traffic on the link ports is curtailed. Upon completion of the system software configuration, a TX ENABLED state is effectuated with respect to the link ports, whereupon network traffic on the link ports may commence.

In one aspect, the present invention is directed to a method of controlling an Ethernet node's boot-up process, the method comprising: preconfiguring the Ethernet node's port hardware to include a TX DISABLED state as a default condition during power up; upon detecting a system reset condition with respect to the Ethernet node, triggering the TX DISABLED state at the Ethernet node's port hardware; completing configuration of system software associated with the Ethernet node, the configuration taking place responsive to the system reset condition; and upon completion of the configuration, rendering the Ethernet node's port hardware into a TX ENABLED state.

Another embodiment is directed to a system for controlling an Ethernet node's boot-up process, comprising: means for preconfiguring the Ethernet node's port hardware to include a TX DISABLED state as a default condition during power up; means for triggering the TX DISABLED state at the Ethernet node's port hardware in response to detecting a system reset condition with respect to the Ethernet node; and means for rendering the Ethernet's port hardware into a TX ENABLED state upon completing configuration of system software associated with the Ethernet node, the configuration taking place responsive to the system reset condition.

A still further embodiment is directed to a network node operable in an Ethernet environment, comprising: a physical layer (PHY) device operable to support at least one link port, wherein the at least one link port is operable for coupling with a remote device via an Ethernet link; and means for preconfiguring the PHY device (e.g., by effectuating appropriate logic with respect to the device's configuration pins) to include a TX DISABLED state as a default condition during power up.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete understanding of the present invention may be had by reference to the following Detailed Description when taken in conjunction with the accompanying drawings wherein:

FIG. 1 is an exemplary network environment having one or more Ethernet nodes wherein an embodiment of the present invention may be implemented;

FIG. 2 is a flowchart of a scheme for controlling boot-up process of an Ethernet node in accordance with one embodiment;

FIG. 3 depicts PHY layer functionality in exemplary Ethernet implementations;

FIG. 4 is a flowchart of a scheme for controlling boot-up process of an Ethernet node in accordance with another embodiment; and

FIG. 5 is a block diagram of an Ethernet node wherein a boot-process controlling system and methodology may be implemented according to one embodiment of the present invention.

DETAILED DESCRIPTION OF THE DRAWINGS

Embodiments of the invention will now be described with reference to various examples of how the embodiments can best be made and used. Like reference numerals are used throughout the description and several views of the drawings to indicate like or corresponding parts, wherein the various elements are not necessarily drawn to scale. Referring now to FIG. 1 in particular, shown therein is an exemplary network environment 100 having one or more Ethernet nodes wherein an embodiment of the present invention may be implemented. Reference numerals 102A and 102B refer to entities that are exemplary of two Ethernet nodes A and B having the Layer 2 and/or Layer 3 functionality (i.e., switching and routing), which may also be generally referred to as “network nodes” for purposes of the present patent disclosure. Network node A 102A and network node B 102B may be disposed in any known or heretofore unknown Ethernet arrangement(s) and/or configuration(s), and are operable to serve a remote device A 104A with respect to network traffic generated by or directed to it. Remote device A 104A may comprise one or more active Ethernet link ports, e.g., port 108-1, as well as one or more standby Ethernet link ports, e.g., port 108-2, for effectuating fail-over between an active interface and a standby interface.

By way of illustration, network node A 102A may be designated as a primary or active node operable to serve remote device 104A via a link 110-1 (i.e., active interface). Likewise, network node B 102B may be designated as a secondary or standby node operable to serve remote device 104A via a link 110-2 (i.e., standby interface). Each network node 102A or 102B may be comprised of a plurality of link ports for effectuating interfaces with one or more remote devices such as, e.g., remote device 104A, and/or one or more other network nodes that may be disposed in separate network portions 106A or 106B. It should be apparent to one skilled in the art that network portions 106A and 106B may share one or more common network segments in some implementations. Additionally, the networks in which network nodes 102A and/or 102B are disposed may themselves be integrated within network portions 106A and/or 106B. Regardless of the specific network topology and configuration of the networks described herein, however, remote device A 104A is operable to communicate with another remote device, e.g., remote device B 104B, via an active end-to-end path and a standby end-to-end path. In order to effectuate such an arrangement, remote device 104B is also deemed to comprise an active port 112-1 for interfacing with network portion 106A via a primary link 114-1 and a standby port 112-2 for interfacing with network portion 106B via a secondary link 114-2.

As alluded to before, network nodes 102A and 102B may each have a number of link ports, some of which may be for interfacing with remote devices while others may be for interfacing with networks 106A and 106B, respectively. By way of illustration, link ports 116-1, 118-1 associated with network nodes 102A and 102B, respectively, are operable with respect to network traffic from or to remote device 104A. In similar fashion, link ports 116-2, 118-2 associated with network nodes 102A and 102B, respectively, are operable with respect to the network-side traffic.

When network node 102A is down for some reason, e.g., a catastrophic switch software and/or hardware failure, reset, power down, rebooting, etc., its link port interfaces are deactivated or de-energized, including the device-side and network-side interfaces. Accordingly, upon sensing the link down condition on link 110-1, remote device 104A switches over to its hot standby port 108-2 for communicating with remote device 104B via network node 102B. When network node 102A is powered up again (i.e., power-on or system reset condition), it engages in a controlled boot-up process thereafter, as will be set forth in detail below, such that its link ports do not exhibit spurious logic conditions that may cause the interfacing entities (i.e., remote devices as well as other network nodes) to commence network traffic while the switch software (i.e., system software) is still in an incomplete operational state. As pointed out in the Background section of the present disclosure, such a situation gives rise to various deleterious effects with respect to the integrity of the traffic received at the network node.

FIG. 2 is a flowchart of a scheme for controlling boot-up process of an Ethernet node in accordance with one embodiment. When the Ethernet node (such as, e.g., network node 102A described above in reference to FIG. 1) is put into a system reset or power-up condition, the boot-up process involving initialization and configuration of both hardware and system software is commenced (blocks 202 and 204). Upon detecting the reset condition and in response thereto, a “Link Down” condition is effectuated on at least a portion of the link ports of the network node. When the Link Down condition is sensed by the entities (i.e., devices and nodes) connected to the network node via respective links, network traffic on the links is discontinued (block 206). That is, e.g., a remote device that is transmitting network traffic via a particular link to the network node that has initiated the boot-up processes may cease data transmission on that interface. In one implementation, the Link Down condition may be effectuated by maintaining an appropriate logic level on a particular pin (e.g., TX DISABLE pin) associated with a physical layer (“PHY”) device of the network node that is responsible for interfacing with at least a portion of the link ports. Depending on how the hardware is realized, the logic level may comprise a logic high (e.g., a particular voltage level) for assertion (i.e., active high). In particular, this implementation is applicable with respect to Small Form-factor Pluggable (SFP) modules for interfacing with fiber-based links (i.e., “fiber ports”). For copper-based 10/10/1000BASE-T ports (i.e., “copper ports”), hardware preconfigurable options are more relevant as will be described below.

While the Link Down (or, disabled) condition is maintained on the link ports, the system software of the network node continues with its initialization and configuration process until it is complete and operational (blocks 208 and 210). Thereafter, upon a suitable indication to the port hardware that the system software has completed the requisite configuration process, a “Link Up” condition is effectuated on the ports (block 212). Similar to the implementation of the Link Down condition, an appropriate logic signal (e.g., a logic low) may be provided on TX DISABLE pins of the PHY device(s) interfacing with the link ports in order to indicate the “enabled” state of the ports. Upon sensing the Link Up condition by the entities, network traffic is commenced on the links of the network node, thereby advantageously avoiding data uncertainty and/or loss at the node during the boot-up period (block 214). In particular, the Link Up condition may be enforced by the system software by configuring the PHY hardware correctly, either setting appropriate bit(s) in a Complex Programmable Logic Device (CPLD) for fiber ports or in PHY chip for copper ports.

FIG. 3 depicts PHY layer functionality in exemplary Ethernet implementations. As is well known, an Ethernet arrangement may include any number of network nodes having Layer-2 (switching) and Layer-3 (routing, IPv4 as well as IPv6) functionalities that may be implemented in accordance with a number of standards and protocols. For purposes of the present disclosure, accordingly, an exemplary Ethernet node may include a variable number of ports that are capable of interfacing with one or more types of physical media (e.g., twisted copper, optical fiber, et cetera) and are in compliance with standards such as 10BASE-T, 100BASE-T, 1000BASE-T, 1000BASE-X, etc. Also, the PHY device hardware may be embodied in a number of form factors, e.g., SFP modules, GigaBit Interface Converter (GBIC) modules, that integrate various aspects of the PHY layer functionality.

As illustrated in FIG. 3, three implementation models of PHY layer functionality are exemplified: 10BASE-T 300A, 100BASE-T 300B and 1000BASE-T 300C. In accordance with the standard Open System Interconnection or OSI model, a plurality of higher layers 356 interface with a Logical Link Control (LLC) layer 354 which in turn interfaces with a Media Access Control (MAC) layer 352. MAC layer 352 uses a variety of sublayer functionalities depending on the applicable standards to interface with the physical hardware forming a PHY device. In 10BASE-T implementation model 300A, a medium dependent interface (MDI) 302 and a physical medium attachment (PMA) 304 form a media attachment unit (MAU) 306 that forms the PHY device, which uses an attachment unit interface (AUI) 308 to couple to MAC layer 352 via a physical layer signaling (PLS) functionality 310. In 100BASE-T implementation model 300B, a Registered Jack (RJ)-45 unit forms MDI 312 that is coupled to PHY 322. As illustrated in FIG. 3, a number of functionalities and sublayers are integrated within PHY 322: auto-negotiation 314, physical medium dependent (PMD) functionality 316, PMA 318, and physical coding sublayer (PCS) 320. PHY 322 uses a medium independent interface (MII) 324 to couple to MAC layer 352 via a reconciliation sublayer (RS) 326. Likewise, an RJ-45 unit forms MDI 328 for 1000BASE-T implementation model (GigaBit Ethernet) 300C, wherein PHY 336 includes PMD functionality 330, PMA 332 and PCS 334 that integrates auto-negotiation. A GigaBit MII (GMII) 338 is operable to interface PHY 336 with MAC layer 352 via RS 340.

Accordingly, based on the foregoing discussion, it should be appreciated that PHY layer functionality may be embodied in a number of hardware implementations involving one or more integrated circuits or IC devices, each embodiment including appropriate drive circuitry for driving suitable logic levels on supported links under certain control input signals. Essentially, a “transmit (TX) control” logic circuit may be implemented in association with the physical layer hardware (i.e., a PHY/MAU chip or SFP/GBIC module), whereby the PHY functionality is maintained in a “transmit disabled” state on boot-up (preferably as soon as a reset is detected), until the system software is up and running. In one implementation where the PHY hardware has programmable logic device (PLD) functionality to control a reset pin, the PLD logic may be used to drive a suitable level on the reset pin such that it remains asserted. Since the PHY hardware in reset cannot transmit, the remote-side and network-side entities detect this condition as a link down condition. It should be appreciated that this control may be required on a port-by-port basis, and if a PHY device is operable to control multiple ports or if one reset pin controls multiple ports, additional logic may be required to properly implement the TX disable and enable conditions on each port.

In another implementation where the PHY functionality is embodied in an application-specific IC (ASIC), TX control may be achieved by modifying initial boot-up configuration of the ASIC so that TX control remains in a disabled state until system software enables it. Some of the existing PHY hardware implementations currently allow initial boot time configuration for auto-negotiation and speed (e.g., 100 Mbps, 1 Gbps, etc.). Accordingly, the device may be preconfigured for a TX DISABLED condition as default boot time configuration for the PHY ASIC using certain select pins on the chip. One skilled in the art should recognize upon reference hereto that the same result of TX DISABLED condition may also be achieved if the ASIC can be preconfigured with auto-negotiation being enabled and NULL speed (i.e., no speed) being selected during boot-up.

FIG. 4 is a flowchart of an exemplary scheme for controlling the boot-up process of an Ethernet node using preconfiguration/reconfiguration capabilities of the port hardware of the node. As illustrated in block 402, the initial system boot-up configuration of the port hardware (e.g., an ASIC operable to support one or more link ports) may be modified to include the TX DISABLED state as a default condition. For example, an existing PHY device may utilize three hardware preconfiguration pins (P0, P1 and P2) to support a number of auto-negotiation and speed preconfigurations such as provided below:

TABLE I
P0	P1	P2	DESCRIPTION
0	0	0	Force 10BASE-T
0	0	1	Force 100BASE-T
0	1	X	Force 1000BASE-T
1	0	0	Auto-negotiation advertise:
			10BASE-T
1	0	1	Auto-negotiation advertise:
			10/100BASE-T
1	1	0	Auto-negotiation advertise:
			10/100/1000BASE-T
1	1	1	Auto-negotiation advertise:
			1000BASE-T

Based on the foregoing pin logic for preconfiguration, one of the unused combinations of the P0-P2 logic, e.g., [011], may be used to force a TX DISABLED condition. Accordingly, it can be seen that the [01X] combination may be differentiated into [010] and [011] combinations, where the [010] combination may be used for supporting the 1000BASE-T speed preconfiguration and the [011] combination may be used for preconfiguring the TX DISABLED state upon system boot-up. Thereafter, when a system reset/boot condition is encountered, the preconfigured TX DISABLED state is triggered in the boot-up process of the system (block 404). Responsive to the TX DISABLED state, no network traffic is effectuated via the ports of the Ethernet node (block 406). In other words, network traffic via either the device-side or network-side port hardware of the node is discontinued or curtailed. Upon completion of initialization and configuration of the system software, the port hardware is rendered into TX ENABLED state (block 408), whereby the network traffic may be commenced via the enabled ports (block 410).

FIG. 5 is a block diagram of an exemplary Ethernet node 500 wherein a boot-process controlling system and methodology may be implemented according to one embodiment of the present invention. A system reset/boot detection module 514 is operable to interface with system switch software 502 of the Ethernet node 500, wherein a system reset/boot condition commences the software's initialization and configuration. Further, a link status control module 506 is operable responsive to the reset condition for applying suitable logic to one or more inputs 508 of a PHY/MAU device 504 such that a TX DISABLED condition is achieved with respect to a link 514 that is interfaced to a port supported by the PHY/MAU device 504. As explained in detail hereinabove, such a condition may be realized in a number of ways. Upon completion of the software initialization/configuration process, a suitable indication 510 may be provided to the PHY/MAU hardware such that the TX DISABLED condition is removed, whereupon link 514 becomes operational again with respect to network traffic thereon. Alternatively, the system software 502 may generate an indication 512 to the link status control module 506 for applying suitable logic to the PHY/MAU hardware 504 such that the supported link ports are rendered in an ENABLED state. Alternatively, a reset pin provided with the PHY/MAU hardware 504 may be kept in a TX DISABLED state during boot-up until the system software 502 releases it.

It is believed that the operation and construction of the present invention will be apparent from the Detailed Description set forth above. While the exemplary embodiments of the invention shown and described have been characterized as being preferred, it should be readily understood that various changes and modifications could be made therein without departing from the scope of the present invention as set forth in the following claims.

Claims

1. A method of controlling an Ethernet node's boot-up process, comprising:

preconfiguring said Ethernet node's port hardware to include a TX DISABLED state as a default condition during power up;

upon detecting a system reset condition with respect to said Ethernet node, triggering said TX DISABLED state at said Ethernet node's port hardware;

completing configuration of system software associated with said Ethernet node, said configuration taking place responsive to said system reset condition; and

upon completion of said configuration, rendering said Ethernet node's port hardware into a TX ENABLED state.

2. The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said TX DISABLED state is effectuated without delay in response to said system reset condition.

3. The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said port hardware comprises hardware to support one or more Gigabit Ethernet ports.

4. The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said port hardware comprises hardware to support one or more 1000BASE-X Small Form-factor Pluggable (SFP) ports.

5. The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said port hardware comprises hardware to support one or more Registered Jack-45 (RJ-45) ports operable with at least one of 10BASE-T, 100BASE-T and 1000BASE-T Ethernet standards.

6. The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein network traffic at said port hardware is curtailed upon effectuating said TX DISABLED state.

7. The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein network traffic at said port hardware is commenced upon effectuating said TX ENABLED condition.

8. A system for controlling an Ethernet node's boot-up process, comprising:

means for preconfiguring said Ethernet node's port hardware to include a TX DISABLED state as a default condition during power up;

means for triggering said TX DISABLED state at said Ethernet node's port hardware in response to detecting a system reset condition with respect to said Ethernet node; and

means for rendering said Ethernet's port hardware into a TX ENABLED state upon completing configuration of system software associated with said Ethernet node, said configuration taking place responsive to said system reset condition.

9. The system for controlling an Ethernet node's boot-up process as recited in claim 8, wherein said TX DISABLED state is effectuated without delay in response to said system reset condition.

10. The system for controlling an Ethernet node's boot-up process as recited in claim 8, wherein said port hardware comprises hardware to support one or more Gigabit Ethernet ports.

11. The system for controlling an Ethernet node's boot-up process as recited in claim 8, wherein said port hardware comprises hardware to support one or more 1000BASE-X Small Form-factor Pluggable (SFP) ports.

12. The system for controlling an Ethernet node's boot-up process as recited in claim 8, wherein said port hardware comprises hardware to support one or more Registered Jack-45 (RJ-45) ports operable with at least one of 10BASE-T, 100BASE-T and 1000BASE-T Ethernet standards.

13. The system for controlling an Ethernet node's boot-up process as recited in claim 8, further comprising means for curtailing network traffic at said port hardware upon effectuating said TX DISABLED state.

14. The system for controlling an Ethernet node's boot-up process as recited in claim 8, further comprising means for commencing network traffic at said port hardware upon effectuating said TX ENABLED condition.

15. A network node operable in an Ethernet environment, comprising:

a physical layer (PHY) device operable to support at least one link port, wherein said at least one link port is operable for coupling with a remote device via an Ethernet link; and

means for preconfiguring said PHY device to include a TX DISABLED state as a default condition during power up.

16. The network node operable in an Ethernet environment as recited in claim 15, wherein said at least one link port comprises a Gigabit Ethernet port.

17. The network node operable in an Ethernet environment as recited in claim 15, wherein said at least one link port comprises a 10/100/1000BASE-X port.

18. The network node operable in an Ethernet environment as recited in claim 15, further comprising means for curtailing network traffic at said at least one link port upon effectuating said TX DISABLED state responsive to a system reset condition.

19. The network node operable in an Ethernet environment as recited in claim 18, further comprising means for rendering said PHY device into a TX ENABLED state upon completing configuration of system software associated with said network node, said configuration taking place responsive to a system reset condition.

20. The network node operable in an Ethernet environment as recited in claim 19, further comprising means for commencing network traffic at said at least one link port upon effectuating said TX ENABLED condition.