Semiconductor die for increasing yield and usable wafer area
According to one embodiment, a semiconductor die for increasing usable area of a wafer and for increasing yield has a substantially hexagonal shape. The wafer can have, for example, a circular shape. The semiconductor die can be diced by, for example, using a water-jet-guided laser. In one embodiment, the semiconductor die results in an approximately 2.0% to 4.0% reduction in the unusable area of the wafer. Moreover, the substantially hexagonal shape of the semiconductor die reduces stress at corners of the semiconductor die, thus increasing the yield of the wafer.
1. Field of the Invention
The present invention is generally in the field of semiconductors. More particularly, the present invention is in the field of semiconductor die fabrication.
2. Background
In conventional semiconductor device fabrication techniques, a number of uniformly shaped dies are designed on a semiconductor wafer. The dies are typically designed to have a square or rectangular shape for ease of manufacturability and dicing. As such, the dies are arranged in adjacent rows across a circular wafer in a grid configuration, so as to fit as many dies as possible on the wafer.
However, considerable portions of the wafer still remain unusable in such conventional semiconductor device fabrication techniques because the curved edge of the circular wafer prevents the accommodation of square or rectangular dies near the edges of the wafer. Since these unusable portions of the valuable wafer are discarded after singulation of the dies, a substantial amount of revenue can be lost during the fabrication of the dies.
Moreover, the square or rectangular dies that have a corner terminating near the edge of the wafer usually have lower integrity due to the stress imposed at the edges of the wafer. Consequently, such dies, even if fully formed and diced, have significantly higher failure rates than the dies situated away from the edges of the wafer.
SUMMARY OF THE INVENTIONA semiconductor die for increasing the number of complete dies on a wafer, to increase yield and effective usable wafer area, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.
The present invention is directed to a semiconductor die for increasing the number of complete dies on a wafer, to increase yield and effective usable wafer area. The following description contains specific information pertaining to the implementation of the present invention. One skilled in the art will recognize that the present invention may be implemented in a manner different from that specifically discussed in the present application. Moreover, some of the specific details of the invention are not discussed in order not to obscure the invention.
The drawings in the present application and their accompanying detailed description are directed to merely exemplary embodiments of the invention. To maintain brevity, other embodiments of the present invention are not specifically described in the present application and are not specifically illustrated by the present drawings.
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Hexagonal dies 304 of the present invention can be conveniently diced using various die singulation processes. For example, hexagonal dies 304 can be diced using water-jet-guided laser technology, which involves the use of a low-pressure water jet that guides a laser beam. The water prevents thermal damage to the dies on the wafer as the laser beam cuts through the wafer. Accordingly, the water jet can be configured to follow the perimeters of hexagonal dies 304 on wafer 300 shown in
As another example of achieving hexagonal dies 304, scribe lines can be formed around the respective perimeters of hexagonal dies 304 on wafer 300. Thereafter, a number of perforations are formed within the scribe lines using a low power laser beam. After the perforations are made, tension can be applied to wafer 300 to separate each hexagonal die 304 from wafer 300. Regardless of the approach taken to form and dice hexagonal dies 304, it is manifest that the invention's hexagonal dies 304 can be enclosed and used in various semiconductor packages after forming and dicing of the dies.
In addition to achieving greater use of the wafer area, the present invention results in dies that are more reliable due to reduced stress at the corners of the dies.
Since the ratio R2a/R2b for hexagonal die 414 of the invention shown in FIG. 4B is much closer to 1.0 compared to the ratio R1a/R1b for conventional die 400 shown in
It is also noted that the corners of a die generally represent its highest stress points. As a consequence, reduction of stress at the corners has a profound effect on reducing die failure rate due to excessive stress imposed during, for example, semiconductor fabrication and packaging. Potential sources of such imposed stress include probe card testing, die singulation, general die handling (such as “pick and place” processes), injection molding, wire bonding, and die packaging processes.
As a result of the significant reduction in stress at the corners, hexagonal die 414 has a lower failure rate and greater reliability compared to conventional die 400. That is, even if hexagonal die 414 and conventional die 400 were both located near the respective centers of their respective wafers, or were otherwise located a “safe” distance from the respective edges of their respective wafers, hexagonal die 414 would have a lower failure rate and greater reliability since hexagonal die 414 can more easily withstand the different stress inducing processes during fabrication and packaging due to the reduced stress at the corners. As stated above, examples of such stress inducing processes include probe card testing, die singulation, general die handling (such as “pick and place” processes), injection molding, wire bonding, and die packaging processes.
Moreover, since the corners of the hexagonal dies of the invention experience lower stress than the corners of the conventional dies under similar conditions, the hexagonal dies near the edges of the wafer have substantially higher integrity than the conventional dies that have a corner situated at the edge of the wafer, such as conventional dies 106, 108, 110, 112, 114, 116, 118, 120, on wafer 100 in
Thus, hexagonal dies 304 of the present invention provide significant advantages over conventional dies 104 shown in
From the above description of the invention it is manifest that various techniques can be used for implementing the concepts of the present invention without departing from its scope. Moreover, while the invention has been described with specific reference to certain embodiments, a person of ordinary skill in the art would appreciate that changes can be made in form and detail, and additional steps can be taken, without departing from the spirit and the scope of the invention. For example, it is manifest that the invention's hexagonal dies 304 can be enclosed and used in various semiconductor packages after dicing of the dies. Thus, the described embodiments are to be considered in all respects as illustrative and not restrictive. It should also be understood that the invention is not limited to the particular embodiments described herein but is capable of many rearrangements, modifications, and substitutions without departing from the scope of the invention.
Thus, a semiconductor die for increasing yield and usable wafer area has been described.
Claims
1. A semiconductor die for increasing a usable area of a wafer and for increasing yield, said semiconductor die having a non-regular hexagonal shape, thereby increasing said usable area of said wafer, wherein said non-regular hexagonal shape of said semiconductor die reduces stress at a corner of said semiconductor die, there by further increasing said yield;
- wherein said semiconductor die is diced by forming a perforations within scribe lines around a perimeter of said semiconductor die.
2. The semiconductor die of clam 1 wherein said wafer is a substantially circular wafer.
3. The semiconductor die of claim 1 wherein said semiconductor die is diced using a water-jet-guided laser.
4-5. (canceled)
6. The semiconductor die of claim 1 wherein said scmiconductor die causes a greater than approximately 2.0% increase in said usable area of said wafer.
7. The semiconductor die of claim 1 wherein said. semiconductor die includes a substantially hexagonal core.
8. The semiconductor die of claim 1 wherein said semiconductor die includes a substantially rectangular core.
9. The semiconductor die of claim 1 wherein said semiconductor die is enclosed in a semiconductor package.
10. A semiconductor wafer having a plurality of non-regular hexagonal dies abutting one another so as to reduce unusable area of said semiconductor wafer, and so as to reduce stress at corners of said dies and so as to result in an increased yield of said semiconductor wafer; said semiconductor wafer having scribe lines thereon for forming perforations around a perimeter of each of said plurality of non-regular hexagonal dies.
11. The semiconductor wafer of claim 10 wherein corners of each said substantially hexagonal dies have a reduced stress.
12. The semiconductor wafer of claim 10 wherein said semiconductor wafer has a substantially circular shape.
13. The semiconductor wafer of claim 10 wherein said plurality of substantially hexagonal dies are diced using a water-jet-guided laser.
14-16. (canceled)
17. The semiconductor wafer of claim 10 wherein said dies cause at least 2.0% reduction in said unusable area of said semiconductor wafer.
18. The semiconductor wafer of claim 10 wherein each of said dies includes a substantially hexagonal core.
19. The semiconductor wafer of claim 10 wherein each of said dies includes a rectangular core.
20. The semiconductor wafer of claim 10 wherein said dies are enclosed in respective semiconductor packages.
21. The semiconductor die of claim 1 wherein said semiconductor die includes a substantially square shape core.
22. The semiconductor die of claim 10 wherein said semiconductor die includes a substantially square shape core.
Type: Application
Filed: Mar 6, 2007
Publication Date: Sep 11, 2008
Inventors: Ken Jian Ming Wang (San Francisco, CA), Ming Wang Sze (Ladera Ranch, CA)
Application Number: 11/715,175
International Classification: B32B 3/12 (20060101);