CAPACITANCE DIFFERENCE DETECTING METHOD
A capacitance difference detecting method, comprising: (a) utilizing a voltage control unit to cooperate with a first capacitor to be detected and a second capacitor to be detected to generate a first voltage and a second voltage; and (b) computing a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit.
This application is a division application of co-pending U.S. application Ser. No. 12/703,732, filed on Feb. 10, 2010 and included herein by reference.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates to a capacitance difference detecting method, and particularly relates to a capacitance difference detecting method that need not to measure real capacitance value of the capacitor to be detected.
2. Description of the Prior Art
In modern electronic apparatuses, the capacitor type detector, which is always applied to a touch sensing device such as a touch sensing panel, is a well know technology. However, a prior art capacitor type detector may has different problems. For example, if the capacitor type detector is utilized as the touch sensing panel, the adhesion of ITO may cause non equal capacitance. Additionally, an electronic apparatus may have the problem of parasitical capacitance, background capacitance or system distribution, which may cause low yield or high cost to examine product defect. Besides, if the background capacitance is too large but the variance for detected capacitance of the capacitor type detector is too small (for example, the capacitance variation caused by finger touch), it will be hard to determine the variation of the detecting capacitance. High resolution is needed to determine capacitance variation in this case.
Fosc∝dV·(Cstray+CS)/ID1 (1)
Since detail concept for such technology is well known by persons skilled in the art, it is omitted for brevity here. Such capacitance detecting method needs an ADC (analog to digital converter, not illustrated here since there are too many kinds of ADCs in this field) to detect. However, the detecting range of the ADC varies corresponding to different parasitical capacitance, background capacitance. Also, the dynamic range and the sensitivity of the ADC vary corresponding to different detecting ranges, such that the yield and production time are affected.
Cs indicates capacitance value of the capacitor 203, Cstray indicates capacitance value of the capacitor 205. Similar with the example shown in
According to above mentioned description, the real capacitance value are detected in the prior art. Accordingly, error measurement may be caused due to parasitical capacitance, background capacitance or different kinds of noises.
SUMMARY OF THE INVENTIONTherefore, one objective of the present invention is to provide a capacitor detecting method, which can detect capacitance variation without detecting real capacitance values.
One embodiment of the present invention discloses a capacitance difference detecting method, comprising: (a) utilizing a voltage control unit to cooperate with a first capacitor to be detected and a second capacitor to be detected to generate a first voltage and a second voltage; and (b) computing a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit.
According to above-mentioned embodiments, capacitance variation can be detected without detecting real capacitance value, and the comparator offset can be ignored. Additionally, differential input can effectively suppress common model disturbance. Also, capacitance difference is not related with power source such that PSRR can be improved. Moreover, the utilization of only one comparator and a simple digital logic controller can save power and has the advantage of high resolution.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
Under this structure, the difference value of the first capacitor to be detected 303 and the second capacitor to be detected 305 can be acquired if the first voltage V1 and the second V2 is adjusted to be the same via the control circuit 301, as shown in Equations (3) and (4).
In Equations (3) and (4), CST indicates background capacitance value, CS1 indicates the capacitance value of the first capacitor to be detected 303, CS2 indicates the second capacitor to be detected 305, Cdf indicates an average for a difference value of the first capacitor to be detected 303 and the second capacitor to be detected 305, CDA indicates the capacitance value of the voltage control unit 307, CST1 indicates a value of the capacitor 309, and CST2 indicates a value of the capacitor 311. As shown in following equations, Cdf can be computed according to CS, CS1/CS2/CST1, CST2/Cdf and CDA as shown in Equation (3), when a difference between the first voltage V1 and the second voltage V2 is set to be 0. Besides, if the first capacitor to be detected 303 and the second capacitor to be detected 305 vary due to system noise or other reasons, the capacitance difference between the first capacitor to be detected 303 and the second capacitor to be detected 305 2 (Cdf2−Cdf1) can be computed according to CST1, CST2, CDA1 and CDA2.
In above-mentioned embodiments, CST1, CST2 are parasitical capacitance values in the system and are fixed when the system is manufactured and can be considered as constant values. The variation of CDA is not related with the background capacitance Cs, and no resolution bit is needed to indicate Cs. Additionally, sensitivity of the detector can be well improved. Small capacitance variation can be detected if CDA is small enough. Besides, offset of the comparator will be transformed to a difference value of CS1 and CS2. In this case, the offset will be removed when two capacitance variation are subtracted, such that error detection of the detector can be avoided. In this structure, the comparator offset can be ignored, thus circuit design complexity can be decreased and ADC linearity can be improved. Furthermore, it can be proved by Equation (3) that the capacitance variation is not related the system voltage VDD, therefore PSRR (Power Supply Rejection Ratio) can be increased to improve noise rejection ability. Additionally, in above-mentioned structure, differential input can be utilized to restrain common model noise, to improve noise rejection of the detector and to increase SNR (Signal Noise Ratio) thereof. It should be noted the scope of the present invention is not limited to the operation of Equations (3) and (4), Cdf can also be acquired if the first voltage V1 and the second voltage V2 are designed to have a difference value beside 0.
The capacitance difference detecting circuit 300 can include switches 317, 319, 321, 323, 325 and 327 besides above-mentioned devices, and control charging and discharging of the switches 317, 319, 321, 323, 325 and 327. AC in Equation (4) can be acquired via a computing device such as a microprocessor.
Step 401
Utilize a voltage control unit (307) to cooperate with a first capacitor to be detected (303) and a second capacitor to be detected (305) to generate a first voltage V1 and a second voltage V2.
Step 403
Compute a difference between the first capacitor to be detected (303) and the second capacitor to be detected (305) according to the first voltage V1, the second voltage V2 and parameter of the voltage control unit (for example, the capacitance value of the variable capacitance value or a sum for capacitance of a capacitor).
If the circuit including the detected capacitance comprises a first constant capacitor and a second constant capacitor (ex. CST1 and CST2), step 403 can compute the difference between the first capacitor to be detected (303) and the second capacitor to be detected (305). One of the embodiments is computing according to above-mentioned Equations (3) and (4). Other detail technology characteristics are disclosed in above-mentioned embodiments, thus it is omitted for brevity.
According to above-mentioned embodiments, capacitance variation can be detected without detecting real capacitance value, and the comparator offset can be ignored. Additionally, differential input can effectively suppress common model disturbance. Also, capacitance difference is not related with power source such that PSRR can be improved. Moreover, the utilization of only one comparator and a simple digital logic controller can save power and has the advantage of high resolution.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Claims
1. A capacitance difference detecting method, comprising:
- (a) utilizing a voltage control unit to cooperate with a first capacitor to be detected and a second capacitor to be detected to generate a first voltage and a second voltage; and
- (b) computing a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit.
2. The capacitance difference detecting method of claim 1, wherein the step (a) further comprises comparing the first voltage and the second voltage, and changing the parameter of the voltage control unit according to a comparison result, to control the first voltage and the second voltage respectively to be a predetermined value.
3. The capacitance difference detecting method of claim 1, wherein the voltage control unit is an adjustable capacitor, and a capacitance value of the adjustable capacitor is controlled by the control signal; where capacitance values of the voltage control unit, the first capacitor to be detected and the second capacitor to be detected determine the first voltage and the second voltage.
4. The capacitance difference detecting method of claim 3, wherein capacitance values of the voltage control unit, the first capacitor to be detected and the second capacitor to be detected cause the first voltage and the second voltage to be the same.
5. The capacitance difference detecting method of claim 1, further comprising:
- providing a first constant capacitor and a second constant capacitor, wherein the step (b) computes capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to voltage values of the first voltage and the second voltage, a parameter of the voltage control unit, the first constant capacitor and the second constant capacitor.
6. The capacitance difference detecting method of claim 5, wherein the first constant capacitor and the second constant capacitor are parasitic capacitors.
Type: Application
Filed: Jul 24, 2012
Publication Date: Nov 15, 2012
Inventors: Kun-Chih Lin (Hsinchu City), Wen-Chi Wu (Tao-Yuan City)
Application Number: 13/556,212
International Classification: G01R 27/26 (20060101);