PARITY FRAME

- CIENA CORPORATION

A method of forward error correction in an optical communications system. A signal to be transmitted is logically defined as a super-frame comprising a plurality of frames including a parity frame and a predetermined set of data frames. Each frame of the super-frame is processed in accordance with a first FEC scheme having a known error correlation characteristic. At least the set of data frames is processed in accordance with a second FEC scheme which is selected based on the error correlation characteristic of the first FEC scheme.

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Description
CROSS-REFERENCE TO RELATED APPLICATIONS

This application is the first application filed for the present invention.

MICROFICHE APPENDIX

Not Applicable.

TECHNICAL FIELD

The present invention relates generally to optical communication systems, and in particular to systems and methods for error correction and data recovery in a coherent receiver.

BACKGROUND

In the field of data communications, it is well known that data can be lost or corrupted during transmission between a sender and a receiver. Typically, the reliability of the communications network is characterised by the Bit Error Ratio (BER), which measures the ratio of erroneously received bits (or symbols) to the total number of bits or symbols transmitted.

Various known methods are used to detect and correct data transmission errors, and thereby minimize the BER. These techniques normally fall into one of two categories, namely Automatic Resend Request (ARQ) and Forward Error Correction (FEC).

Automatic Resend Request (ARQ) techniques involve processing data at the receiver to detect erroneous or missing data. If such transmission errors are detected, an ARQ message is sent to request that the transmitter re-send the erroneous or missing data. In most packet networks any packet that has errors (CRC failure) at an intermediate node is deleted and not forwarded. These techniques suffer limitations in that they produce a large amount of control messaging between the transmitter and the receiver, and they require the transmitter to store in memory all of the data that it has transmitted, until the receiver confirms that the data has been successfully received. In high speed communications systems, the required memory in the transmitter becomes undesirably large, and the control signalling consumes an undesirably high amount of network resources. In addition, the round-trip delay experienced in sending an ARQ message and receiving a resent packets, can be undesirable in some applications.

Forward Error Correction (FEC) techniques involve processing the data prior to transmission, to generate parity (or check) symbols that may be used at the receiver to detect and correct erroneously received data. Well known FEC schemes include, but are not limited to, Turbo codes, Low-Density Parity Check (LDPC) codes, Block Turbo codes, Reed Solomon codes and BCH codes. For example, by adding T check symbols to a data frame being transmitted, a Reed Solomon code can detect up to T erroneous symbols in the receiver, and correct up to T/2 erroneous symbols in the received frame. An assumption of Reed Solomon encoding is that the errored symbols in the frame follow a Poisson distribution, that is, the probability that any given symbol is erroneous is equal to that of every other symbol, and is independent of any other symbol. As is known in the art, FEC techniques have an advantage that they avoid the need for storing and resending packets, and so avoid the above-noted problems associated with ARQ, but at a cost of increased overhead.

It is desirable to minimize the overhead, and have a very high noise tolerance, which has lead to the use of iterative sparse-graph FEC techniques such as Turbo codes and LDPC codes. However, these techniques suffer from a problem in that a decoded frame may contain residual errors that cannot be corrected by the selected FEC scheme. This problem may arise due to either channel effects (such as cycle slips) or limitations of the FEC algorithm itself, and normally affects a minority of the frames comprising a given signal. However, even when most of the frames are correctly decoded, a small number of decoded frames with significant residual errors can raise the BER of the signal as a whole. Within limits, the error-correction performance of iterative FEC techniques can be improved by increasing the number of iterations implemented by the decoder. However, there is a lower limit to the BER that can be achieved by these techniques, which cannot be further reduced by additional iterations. This lower limit is referred to as an “error floor”. In the case of Turbo codes and LDPC codes, for example, error floors in the range of 10−4 to 10−10 are often encountered, which is unacceptably high for many users of optical transmission systems. Code designs that maximize error correction performance at high noise levels (low signal to noise ratio (SNR)) often raise the error floor. For high speed optical communications systems, hardware implementations of the FEC decoder are required, but this also raises the error floor.

Y. Miata et al. “Efficient FEC for Optical Communications using Concatenated Codes to Combat Error-floor”, OFC/NFOEC 2008, describes the use of concatenation of a Reed Solomon code with an LDPC code to effectively eliminate error floors. This technique assumes that the errors remaining after the LDPC decoding step are small enough in number and follow a close enough approximation to a Poisson distribution that the Reed Solomon code will be capable of correcting them. However, in an optical communications system, cycle slips during carrier recovery can cause error bursts that are challenging for the FEC to correct. Under these conditions, the errored symbols remaining after the LDPC decoding are often too numerous and/or sufficiently non-Poisson that the concatenated Reed Solomon decoding provides very little real benefit.

J. Normemnacher et al. “Parity-Based Loss Recovery for Reliable Multicast Transmission”, IEEE/ACM TRANSACTIONS ON NETWORKING, VOL. 6, NO. 4, AUGUST 1998 describes techniques which combine Forward Error Correction and Automatic Repeat Request (ARQ) to achieve scalable reliable multicast transmission. packet system. In this arrangement, packets are held in an ARQ buffer, and a parity packet is sent so that it can be used to recreate a missing packet without having to request retransmission of that missing frame. This arrangement allows a missing or dropped frame to be recovered at a receiver, and so reduces the number of re-transmission requests received by the multicast root node. However, a large ARQ buffer is still required in the root node, because the need to re-transmit lost packets is not eliminated entirely.

Techniques for data recovery that overcome limitations of the prior art remain highly desirable. In particular, it is desirable to have an error correction scheme for high speed optical transmission systems that has both very strong noise performance and a very low error floor.

SUMMARY

Disclosed herein are techniques for error correction and data recovery in an optical communications system.

Accordingly, an aspect of the present invention provides a method of forward error correction in an optical communications system. A signal to be transmitted is logically defined as a super-frame comprising a plurality of frames including a parity frame and a predetermined set of data frames. Each frame of the super-frame is processed in accordance with a first FEC scheme having a known error correlation characteristic. At least the set of data frames is processed in accordance with a second FEC scheme which is selected based on the error correlation characteristic of the first FEC scheme.

BRIEF DESCRIPTION OF THE DRAWINGS

Representative embodiments of the invention will now be described by way of example only with reference to the accompanying drawings, in which:

FIG. 1 is a flowchart illustrating representative steps in a process in accordance with an embodiment of the invention, implemented in a transmitter;

FIGS. 2A and 2B are flowcharts illustrating representative steps in respective alternative processes in accordance with an embodiment of the invention, implemented in a receiver; and

FIG. 3 schematically illustrates a representative optical communications system in which methods in accordance with the present invention may be implemented

It will be noted that throughout the appended drawings, like features are identified by like reference numerals.

DETAILED DESCRIPTION

Error bursts after FEC can occur due to channel effects, or due to FEC algorithm limitations. The techniques described below exploit the observation that error bursts in an optical communications system will cause a FEC decoder to either fail to converge to a valid code word; or produce a decoded frame in which erroneous symbols are correlated in a manner that is characteristic of the specific FEC scheme that is being used.

In very general tell is, there are provided techniques in which a first FEC scheme having a known error correlation characteristic is concatenated with a second FEC scheme which is selected based on the error correlation characteristic of the first FEC scheme. With this arrangement, a decoder in a receiver processes received frames using the first FEC scheme, on a per-frame basis, to yield FEC decoded frames in which the residual symbol errors are non-Poisson. The FEC decoded frames are then processed in accordance with the second FEC scheme to correct the residual symbol errors and so yield recovered data frames having a very low BER.

In one embodiment, the first FEC scheme is selected to have an error correlation characteristic such that an error burst due to channel effects will produce residual errors after FEC decoding that are clustered within one frame; and the second FEC scheme is selected such that it can correct 1 errored frame in a super-frame consisting of P (where P>1) frames, given P−1 correctly received frames.

Preferably, the first FEC scheme is selected to be strong enough that, in the absence of an error burst, a frame can be decoded to yield at least a moderately low residual BER. Known codes are capable of achieving this error correction performance. This means that a decoder implementing the first FEC scheme will either converge to a valid code word for a given frame, indicating with very high confidence that the received frame has been correctly decoded; or else it will fail to converge, indicating the presence of an error burst.

Various methods are known by which the effects of a cycle slip can be confined to a single block of symbols. For example, U.S. Pat. No. 7,522,841, which issued Apr. 21, 2009, in which an optical signal is composed of periodic SYNC bursts separated by blocks of data symbols. Since the symbol sequence and periodicity of the SYNC bursts are known, a cycle slip can be detected and its effects limited to the data symbols lying between the first slipped symbol and the next SYNC burst. With this arrangement, it is convenient to logically divide the signal into frames, with each frame comprising one or more SYNC bursts and an associated block of data symbols. This will have the effect of confining error bursts due to a cycle slip to the frame in which the cycle slip occurred. Thus, there is a high correlation in the pattern of residual bit errors.

For a given super-frame, the probability that more than one frame is lost (or corrupted) due to an error burst can be minimized by appropriate selection of the size of each frame and the number P of frames in the super-frame. In some embodiments, each frame may comprise 8k bits, and the number P of frames in the super-frame may be 64, although this is not essential. With this arrangement, there is a very high probability that a decoder implementing the first FEC scheme will fail to converge to a valid code word for at most 1 frame in the super-frame. Consequently, a second FEC scheme in which a parity frame is computed over P−1 data frames can be used to correct (or reconstruct) the one errored frame in the super-frame, given that the other P−1 frames of the super-frame have been correctly decoded. For this single frame reconstruction, the parity frame can be computed by accumulating the bit-wise XOR of the P−1 data frames. In this case, any frame in the super-frame can be reconstructed in the receiver by accumulating the bit-wise XOR of the other P−1 (correctly decoded) frames of the super-frame.

FIGS. 1 and 2 respectively illustrate a representative flow charts showing encoding and data recovery processes in accordance with the above-described embodiment. As may be seen in FIG. 1, each data frame DF(x) (x=1 . . . P−1) to be transmitted is processed (at step S2) to calculate the parity frame PF in accordance with the second FEC scheme, in this case as the bit-wise XOR of the data frames DF(x). Then, each frame F(x) of the super frame, consisting of the P−1 data frames DF(x) and the parity frame PF, is encoded (at step S4) using the first FEC scheme to produce corresponding FEC encoded frames E(x). The thus encoded super-frame can then be transmitted (at step S6) through an optical communications system.

Referring to FIG. 2A, in a receiver of the optical communications system, each received frame R(x) is processed (at step S8) in accordance with the first FEC scheme to generate corresponding decoded frames D(x). If this decoding step is successful (for example, the decoder converges to a valid codeword) at step S10, the decoded frame D(x) is retained, and used to calculate a local parity frame LPF in accordance with the second FEC scheme (at step S12), in this case as the bit-wise XOR of the decoded frames D(x). On the other hand, if the decoding step is unsuccessful, the errored frame is flagged (at step S14). Upon completion of the decoding step, if all of the frames have been correctly decoded, then the local parity frame (LPF) can be discarded (at step S16). Otherwise, the local parity frame (LPF) can be used to repair (or replace) the errored frame (at step S18). In the illustrated example, if the accumulated LPF is the bit-wise XOR of P−1 correctly decoded frames, then the content of the local parity frame in fact corresponds with the corrected content of the one errored frame. In this case, the errored frame can be corrected by substituting the LPF in place of the errored frame.

FIG. 2B illustrates an alternative process, in which the LPF is accumulated over all of the decoded frames D(x). Following the decoding and LPF accumulation steps (steps S8 and S12), the LPF is examined (at 20) to determine whether or not its value is zero. If the LPF=0, then all of received frames R(x) have been decoded successfully, and the decoding process ends. On the other hand, if the LPF does not equal zero, then at least one of the decoded frames D(x) was not successfully decoded. In this case, the errored frame D(e) is identified (at S22), and corrected using the LPF (at S24), in a manner directly analogy to that described above with reference to FIG. 2A.

In the foregoing description, the second FEC scheme corrects an error burst in a decoded frame by replacing the entire errored frame. This has an advantage in terms of simplicity of the algorithm, which in turn simplifies high speed hardware based implementations. However, if desired, more sophisticated FEC algorithms may be implemented, for example to replace a portion of an errored frame or to replace particular patterns of bits within the errored frame, in accordance with the known error correlation characteristics of the first FEC scheme.

In the foregoing description, the second FEC scheme is designed to correct one errored frame in a super-frame. These techniques can be extended to enable correction of error bursts affecting more than one frame.

For example, instead of calculating the Local Parity Frame LPF as the bitwise XOR of the correctly decoded frames, the LPF can be calculated to have “soft” values (more than two levels) indicating the probabilities of zero and one for each bit location in the frame. This may be referred to as a “soft metric” of each bit location. The soft metric can be an integer representing the log likelihood ratio, comprising a sign bit and a magnitude value. The magnitude value may be represented by two to six bits.

In order to recover errored frames, Maximum Likelihood (ML) decoding can be applied across the erroneous frames and soft syndromes, for example using coset decomposition and trellis decoding as discussed in Esmaeili, M.; Khandani, A. K.: “Acyclic Tanner Graphs and Maximum-Likelihood Decoding of Linear Block Codes”; IEE Proceedings, Vol. 147, No. 6, DECEMBER 2000, the contents of which are hereby incorporated herein by reference.

More generally, one or more redundant (parity) frames can be computed to contain information about the number of 0's and 1's in each bit location (denoted by its index value) of the data frames or FEC encoded data frames of the super-frame. For example, two redundant frames can be added forcing the sum of bit values (0 and 1) across bits of the same index in each FEC frame to be zero modulo 3. Let us call this parity mod 3. Assume we detect two received frames being in error following FEC decoding. The bit pattern in these two erroneous frames (for any given index value) can be 00,01,10 or 11. In the case that the mod 3 parity is any one of, 00,10 or 01, then it can be shown that the two bits in error are 00,11 or 11, respectively. If the mod 3 parity is 11, the corresponding error pattern can be either 10 or 01 which is ambiguous. In such cases, the dependency between such two bits (the fact that such two bits are either 01 or 10) can be used to improve their corresponding soft metrics and then repeat the FEC iterative decoding for the erroneous frames.

For example, when the parity bit matches the XOR of the respective sign bits of the errored frames, the corresponding magnitude values could be doubled. When the parity bit does not match, then the magnitude values could be halved. Or, when the parity values do not match, the sign bit corresponding to the weaker magnitude is flipped.

Depending upon the FEC code structure being used, internal parities of that code can also be used in the calculation to select which of the two errored frames is trusted more.

After the soft metrics are adjusted, the FEC algorithm may then be executed on the two errored frames. If the decoder then converges to the valid codeword for one of these frames, then single frame correction, as described above, can be executed on the other.

This example uses a single parity calculation. Other coding can be used between frames, and the more complicated syndromes used in more insightful calculations upon greater numbers of errored frames. MDS codes are advantageous for this. Partial correction and guidance of the soft FEC can be done with shorter syndromes.

In the above-described embodiments, a bit-wise parity is calculated across the P−1 data frames of the super frame. However, this is not essential. Single parities could be calculated across more than one bit per frame, but at the cost of much less information and so much less capability for correcting errors. More complicated syndromes can be calculated across multi-bit symbols per frame, but again should only cover one symbol per frame for full performance.

The sets of P frames need not be transmitted contiguously. Indeed, while it is desirable that each frame be transmitted contiguously in order to increase the probability than a line event is contained within one frame, one could choose other transmission patterns.

The methods of U.S. Pat. No. 6,959,019 or U.S. Pat. No. 7,149,432, the contents of which are hereby incorporated herein by reference, could be used to reorder the bits.

The sets of P frames have been described as disjoint, for simplicity of implementation. They could be chosen to overlap.

The syndromes have been described as being calculated in parallel upon disjoint sets of bits, but could be intertangled, which effectively makes larger syndromes.

Frames can have a few extra overhead bits, or other bits that are not covered by the Soft FEC or not fully covered by the syndrome calculation.

While it is often advantageous for all frames to have the same length, frames can have unequal lengths if desired. A parity frame could have a different length than some data frames. The super-frame count, P, or the syndrome size can vary.

When linear codes are used for both the syndrome calculation and for the soft FEC, such as MDS and LDPC, BCH, or turbo codes, and the order of all of the symbols preserved, then the calculations are commutative. The syndromes could be calculated only on the data, and then the soft FEC calculated on the syndrome (parity) frame, or the soft FEC could be calculated first and then the syndromes calculated on all bits in the resulting frames. Either order produces the identical syndrome frame(s).

The first described example has soft FEC for the code in the frame and hard parities for the code across frames. Soft FEC could be used for both, with (Single Input Single Output) SISO processing of the inner code and the resulting metrics such as log likelihood values passed to the outer code.

The received frames do not need to be decoded in order. They can be done in parallel. Different frames may take different durations to decode. Once a sufficient number of received frames in one super-frame have been decoded correctly, the remaining data frame(s) can be reconstructed from the parity frame as described above. In some embodiments, reconstruction of one of more data frames in this matter may be more efficient than attempting to decode the corresponding received frame.

It will be appreciated that the methods described above may be implemented in an optical communications system by way of one or more signal processors, which may be constructed using any suitable combination of hardware and software. In high speed optical communications systems, it is contemplated that hardware implementations will be preferable. It is contemplated that, at the transmitter end of a link, the signal processor will normally take the form of (or be incorporated within) a FEC encoder, that is optimized to implement the encoding operations of the first and second FEC schemes. Similarly, it is contemplated that, at the receiver end of a link, the signal processor will normally take the form of (or be incorporated within) a FEC decoder, that is optimized to implement the decoding and frame reconstruction operations of the first and second FEC schemes.

FIG. 3 schematically illustrates a representative optical communications system 2 of the type in which methods in accordance with the present invention may be implemented. As may be seen in FIG. 3, a FEC encoder 4 associated with a transmitter 6 may comprise a signal processor implementing the encoding operations of the first and second FEC schemes. Similarly, a FEC decoder 8 associated with a receiver 10 may comprise a signal processor implementing the decoding and frame reconstruction operations of the first and second FEC schemes. In principal, these signal processors may be implemented by a general purpose computer programmed using suitable software. However, using current technology, software-based solutions are expected to be too slow. Accordingly, in preferred embodiments, the signal processors are implemented entirely in hardware, for example using field Programmable gate Arrays (FPGAs) or Application Specific Integrated Circuits (ASICs). In some embodiments, the signal processor is implementing as two processor blocks pipelined together, such that one block is used to process frames using the first FEC scheme, and the other block is used to process frames using the second FEC scheme.

Although the invention has been described with reference to certain specific embodiments, various modifications thereof will be apparent to those skilled in the art without departing from the spirit and scope of the invention as outlined in the claims appended hereto.

Claims

1. A method of forward error correction in an optical communications system, the method comprising:

logically defining a signal as a super-frame comprising a plurality of frames including a parity frame and a predetermined set of data frames; and
a signal processor performing the steps of: processing each frame of the super-frame in accordance with a first FEC scheme having a known error correlation characteristic; and processing at least the set of data frames in accordance with a second FEC scheme which is adapted to compensate at least the error correlation characteristic of the first FEC scheme.

2. The method as claimed in claim 1, wherein the signal processor is associated with a transmitter of the optical communications system, and wherein processing at least the set of data frames in accordance with a second FEC scheme comprises computing the parity frame across the predetermined set of data frames.

3. The method as claimed in claim 2, wherein computing the parity frame comprises accumulating a bit-wise XOR across the predetermined set of data frames.

4. The method as claimed in claim 2, wherein the parity frame is computed before the step of processing each frame of the super-frame in accordance with the first FEC scheme.

5. The method as claimed in claim 1, wherein the signal processor is associated with a receiver of the optical communications system, and wherein processing each frame of the super-frame in accordance with the first FEC scheme comprises:

decoding received frames of the super-frame to generate corresponding decoded frames.
determining, for each received frame, whether or not the decoding step was successful.

6. The method as claimed in claim 5, wherein processing at least the set of data frames in accordance with a second FEC scheme comprises computing a local parity frame across the decoded frames.

7. The method as claimed in claim 6, wherein processing each frame of the super-frame further comprises determining, for each received frame, whether or not the decoding step was successful, and wherein the step of computing a local parity frame is performed across only decoded frames corresponding to received frames that were successfully decoded.

8. The method as claimed in claim 6, wherein computing the local parity frame comprises accumulating a bit-wise XOR.

9. The method as claimed in claim 8, wherein the known error correlation characteristic of the first FEC scheme comprises that an error burst due to channel effects will affect at most one frame within the super-frame.

10. The method as claimed in claim 9, wherein processing at least the set of data frames in accordance with a second FEC scheme further comprises:

identifying an erroneous decoded frame corresponding to a received frame that was not successfully decoded; and
correcting the erroneous decoded frame using the local parity frame.

11. The method as claimed in claim 10, wherein correcting the erroneous decoded frame comprises replacing the erroneous decoded frame with the local parity frame.

12. The method as claimed in claim 6, wherein computing the local parity frame comprises accumulating a bit-wise soft metric across the decoded frames corresponding to received frames that were successfully decoded.

13. The method as claimed in claim 12, wherein the bit-wise soft metric is a probability of a predetermined bit value at each frame location.

14. The method as claimed in claim 12, wherein the known error correlation characteristic of the first FEC scheme comprises that an error burst due to channel effects will affect at most two frames within the super-frame.

15. The method as claimed in claim 14, wherein processing at least the set of data frames in accordance with a second FEC scheme further comprises:

identifying each erroneous decoded frame corresponding to a received frame that was not successfully decoded; and
correcting each identified erroneous decoded frame using the local parity frame.

16. The method as claimed in claim 15, wherein there are two erroneous decoded frames, and wherein correcting each identified erroneous decoded frame comprises:

considering a set comprising the two erroneous frames and the local parity frame; and
identifying each bit position for which the sum of the corresponding bit values across the set results in odd parity; and
for each identified bit position, swapping the value of the least reliable bit among the set.

17. The method as claimed in claim 5, further comprising:

stopping the step of decoding received frames when a number of frames for which the decoding step was successful is sufficient that remaining data frames of the super-frame can be reconstructed using the second FEC scheme; and
reconstructing the remaining data frames of the super-frame using the second FEC scheme.

18. A signal processor for implementing forward error correction of a signal in an optical communications system, the signal being logically formatted as a super-frame comprising a plurality of frames including a parity frame and a predetermined set of data frames, the signal processor comprising:

means for processing each frame of the super-frame in accordance with a first FEC scheme having a known error correlation characteristic; and
means for processing at least the set of data frames in accordance with a second FEC scheme which is adapted to compensate at least the error correlation characteristic of the first FEC scheme.

19. The signal processor as claimed in claim 18, wherein the signal processor is implemented as a FEC encoder in a transmitter of the optical communications system.

20. The signal processor as claimed in claim 18, wherein the signal processor is implemented as a FEC decoder in a receiver of the optical communications system.

21. The signal processor as claimed in claim 18, wherein the signal processor is implemented in hardware.

Patent History
Publication number: 20130191696
Type: Application
Filed: Jan 19, 2012
Publication Date: Jul 25, 2013
Applicant: CIENA CORPORATION (Linthicum, MD)
Inventors: Kim B. ROBERTS (Nepean), Amir K. KHANDANI (Kitchener)
Application Number: 13/353,362