TRENCH METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH MULTIPLE TRENCHED SOURCE-BODY CONTACTS FOR REDUCING GATE CHARGE
A trench MOSFET with multiple trenched source-body contacts is disclosed for reducing gate charge by applying multiple trenched source-body contacts in unit cell. Furthermore, source regions are only formed along channel regions near the gate trenches, not between adjacent trenched source-body contacts for UIS (Unclamped Inductance Switching) current enhancement.
This invention relates generally to the cell structure and device configuration of power semiconductor devices. More particularly, this invention relates to a novel and improved cell structure and device configuration of a trench metal oxide semiconductor field effect transistor (MOSFET, the same hereinafter) with multiple trenched source-body contacts.
BACKGROUND OF THE INVENTIONAnother prior art U.S. Pat. No. 8,049,273 discloses a device structure 110 having multiple trenched source-body contacts 111 in unit cells for improving the peak induced voltage in switching converter, as shown in
Therefore, there is still a need in the art of the semiconductor power device, particularly for trench MOSFET design and fabrication, to provide a novel cell structure, device configuration that would resolve these difficulties and design limitations.
SUMMARY OF THE INVENTIONThe present invention provides a trench MOSFET with multiple trenched source-body contacts for reducing gate charge. According to the present invention, the multiple trenched source-body contacts are formed in unit cell and filled with tungsten plugs for a wide mesa between two adjacent gate trenches in an active area, furthermore, source regions are only formed along channel regions near the gate trenches, not between adjacent trenched source-body contacts for UIS (Unclamped Inductance Switching) current enhancement.
In one aspect, the present invention features a trench MOSFET comprising: a substrate of a first conductivity type; an epitaxial layer of the first conductivity type onto the substrate, wherein the epitaxial layer has a lower doping concentration than the substrate; a plurality of gate trenches starting from a top surface of the epitaxial layer and extending downward into the epitaxial layer; a plurality of body regions of a second conductivity type between two adjacent gate trenches; a plurality of source regions of the first conductivity type in an upper portion of the body regions in an active area; and multiple trenched source-body contacts each filled with a contact metal plug, penetrating through the source regions and extending into the body regions, wherein the source regions are only formed along channel regions near the gate trenches in the active area, not between two adjacent trenched source-body contacts.
In another aspect, the present invention features a trench MOSFET further comprising a plurality of body contact doped regions of the second conductivity type within the body regions and surrounding at least bottoms of the multiple trenched source-body contacts, wherein the body contact doped regions have a higher doping concentration than the body regions.
In another aspect, the present invention features a trench MOSFET wherein the gate trenches can be implemented to have single gate structure comprising a single electrode padded by a gate oxide layer, wherein the gate oxide layer has a thickness along sidewalls equal to or greater than bottom of the single electrode.
In another aspect, the present invention features a trench MOSFET wherein the gate trenches can be implemented to have single gate structure comprising a single electrode padded by a gate oxide layer, wherein the gate insulation layer has a greater thickness along bottom than along sidewalls of the single electrode.
In another aspect, the present invention features a trench MOSFET wherein the gate trenches can be implemented to have terrace gate structure comprising a single electrode padded by a gate oxide layer, wherein the single electrode further extends beyond the top surface of the epitaxial layer, and the gate oxide layer has a greater thickness along bottom than along sidewalls of the single electrode. Alternatively, the gate oxide layer has a thickness along sidewalls equal to or greater than bottom of the single electrode.
In another aspect, the present invention features a trench MOSFET wherein the gate trenches can be implemented to have dual electrodes structure comprising a shielded electrode in a lower portion connected to a source metal, and a gate electrode in an upper portion of the gate trench, wherein the shielded electrode and the gate electrode are insulated from the epitaxial layer and insulated from each other.
Preferred embodiments include one or more of the following features: the contact metal plug is a tungsten metal layer padded by a barrier metal layer of Ti/TiN or Co/TiN or Ta/TiN; the trench MOSFET further comprises multiple trenched body contacts filled with the contact metal plugs and extending into the body regions.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment, which is illustrated in the various drawing figures.
The present invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:
In the following Detailed Description, reference is made to the accompanying drawings, which forms a part thereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top”, “bottom”, “front”, “back”, etc., is used with reference to the orientation of the Figure(s) being described. Because components of embodiments can be positioned in a number of different orientations, the directional terminology is used for purpose of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be make without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims. It is to be understood that the features of the various exemplary embodiments described herein may be combined with each other, unless specifically noted otherwise.
Please refer to
Although the present invention has been described in terms of the presently preferred embodiments, it is to be understood that such disclosure is not to be interpreted as limiting. Various alternations and modifications will no doubt become apparent to those skilled in the art after reading the above disclosure. Accordingly, it is intended that the appended claims be interpreted as covering all alternations and modifications as fall within the true spirit and scope of the invention.
Claims
1. A trench MOSFET comprising:
- a substrate of a first conductivity type;
- an epitaxial layer of said first conductivity type onto said substrate, wherein said epitaxial layer has a lower doping concentration than said substrate;
- a plurality of gate trenches starting from a top surface of said epitaxial layer and extending downward into said epitaxial layer;
- a plurality of body regions of a second conductivity type between two adjacent gate trenches;
- a plurality of source regions of said first conductivity type in an upper portion of said body regions in an active area; and
- multiple trenched source-body contacts formed between every two adjacent gate trenches in an active area, each filled with a contact metal plug and extending into said body regions, wherein said source regions only formed along channel regions near said gate trenches in said active area, not between adjacent trenched source-body contacts.
2. The trench MOSFET of claim 1 further comprising a plurality of body contact doped regions of said second conductivity type within said body regions and surrounding at least bottoms of said multiple trenched source-body contacts, wherein said body contact doped regions have a higher doping concentration than said body regions.
3. The trench MOSFET of claim 1, wherein said contact metal plug is a tungsten metal layer padded by a barrier metal layer of Ti/TiN or Co/TiN or Ta/TiN.
4. The trench MOSFET of claim 1 further comprising multiple trenched body contacts filled with said contact metal plugs and extending into said body regions near edge of said active area.
5. The trench MOSFET of claim 1, wherein said gate trenches can be implemented to have single gate structure comprising a single electrode padded by a gate oxide layer, wherein said gate oxide layer has a thickness along sidewalls equal to or greater than along bottom of said single electrode.
6. The trench MOSFET of claim 1, wherein said gate trenches can be implemented to have single gate structure comprising a single electrode padded by a gate oxide layer, wherein said gate oxide layer has a greater thickness along bottom than along sidewalls of said single electrode.
7. The trench MOSFET of claim 1, wherein said gate trenches can be implemented to have terrace gate structure comprising a single electrode padded by a gate oxide layer, wherein said single electrode further extends beyond the top surface of said epitaxial layer.
8. The trench MOSFET of claim 1, wherein said gate trenches can be implemented to have shielded gate structure comprising a shielded electrode in a lower portion connected with a source metal, and a gate electrode in an upper portion of said gate trench, wherein sidewalls and bottom of said shielded electrode are surrounded by a gate insulation layer, sidewalls of said gate electrode are surrounded by a gate oxide layer, wherein said shielded electrode and said gate electrode are insulated from each other by an inter-insulation layer.
Type: Application
Filed: Oct 12, 2012
Publication Date: Apr 17, 2014
Inventor: FU-YUAN HSIEH (New Taipei City)
Application Number: 13/650,330
International Classification: H01L 29/78 (20060101);