CIRCUIT-AND-HEAT-DISSIPATION ASSEMBLY AND METHOD OF MAKING THE SAME
Disclosed herein is a circuit-and-heat-dissipation assembly which includes: a heat sink including a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface, the heat dissipating element protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment; an insulator layer formed on the circuit-forming surface; and a patterned circuit formed on the insulator layer and having an electroless plating layer which has a patterned catalyst seed layer comprising an active metal and formed on the insulator layer, and a reduced metal layer formed on the catalyst seed layer. Also disclosed herein is a method of making the circuit-and-heat-dissipation assembly.
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This application is a divisional application of U.S. patent application Ser. No. 14/744,496, filed on Jun. 19, 2015, which claims priority of Taiwanese Patent Application No. 103121575, filed on Jun. 23, 2014. This application claims the benefits and priority of all these prior applications and incorporates by reference the contents of these prior applications in their entirety.
FIELD OF INVENTIONEmbodiments of the invention generally relate to a circuit-and-heat-dissipation assembly and a method of making the same, more particularly to a circuit-and-heat-dissipation assembly including a heat sink and a patterned circuit formed on the heat sink.
BACKGROUNDThere may be a need for providing a method of making an electronic assembly that is simple and cost effective.
SUMMARYIn certain embodiments of the disclosure, a circuit-and-heat-dissipation assembly may be provided. Such a circuit-and-heat-dissipation assembly may include: a heat sink including a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface opposite to the circuit-forming surface, the heat dissipating element being connected to and protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment; an insulator layer formed on the circuit-forming surface; and a patterned circuit formed on the insulator layer.
In certain embodiments of the disclosure, a method of making a circuit-and-heat-dissipation assembly may be provided. Such a method may include: preparing a heat sink that includes a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface, the heat dissipating element protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment; forming an insulator layer on the circuit-forming surface; and forming a patterned circuit on the insulator layer.
In certain embodiments of the disclosure, a circuit-and-heat-dissipation assembly may be provided. Such a circuit-and-heat-dissipation assembly may include: a heat sink including a circuit-forming surface; an insulator layer formed on the circuit-forming surface; a patterned circuit formed on the insulator layer, the patterned circuit including at least one pair of spaced apart conductive lines; and a heat-dissipating block formed on the circuit-forming surface and extending therefrom through the insulator layer toward the conductive lines.
Other features and advantages of the disclosure will become apparent in the following detailed description of the exemplary embodiments with reference to the accompanying drawings, of which:
It may be noted that like elements are denoted by the same reference numerals throughout the disclosure.
In these embodiments, the patterned electroless plating layer 51 alone serves as a patterned circuit 5 for direct mounting of the electronic components 6 thereon. Particularly, the patterned circuit 5 includes pairs of spaced apart conductive lines 50, each of which has an enlarged soldering end 501. Each of the electronic components 6 may be bonded or soldered to the enlarged soldering ends 501 of a corresponding pair of the conductive lines 50 using techniques, such as surface mount technology. The conductive lines 50 may have a thickness ranging from 18 μm to 20 μm and a line width ranging from 3 mm to 10 mm.
In certain embodiments, the active metal may be selected from the group consisting of palladium, rhodium, platinum, iridium, osmium, gold, nickel, iron, and combinations thereof. The reduced metal layer 42 formed from the electroless plating may contain a metallic material having a heat conductivity (K) greater than 95 W/m·K and a resistance (ρ) less than 75 nΩ·m. One Example of the metallic material may be copper (K=400 W/m·K, ρ=16.78 nΩ·m).
In certain embodiments, the heat dissipating element 22 may be in the form of a structure selected from the group consisting of fins, a heat pipe, and combinations thereof. In certain embodiments, the heat dissipating element 22 may be in the form of fins.
In certain embodiments, the heat sink 2 is a single piece. In certain embodiments, the heat sink 2 may be made from aluminum extrudate.
In certain embodiments, the insulator layer 3 may be formed on the circuit-forming surface 211 using electrophoretic deposition techniques, and may be made from a resin material, such as epoxy. The insulator layer 3 may extend continuously from the circuit-forming surface 211 to the element-forming surface 212. In certain embodiments, the insulator layer 3 may enclose an entire outer surface of the heat sink 2.
In certain embodiments, referring to
In certain embodiments, the patterned electroplating layer 52 may be made from nickel (K=99.9 W/m·K, ρ=69.3 nΩ·m).
In certain embodiments, referring to
In certain embodiments, referring to
In certain embodiments, the patterned mask 8 may be made from a material selected from the group consisting of polyethylene terephthalate and rubber.
In certain embodiments, referring to
In certain embodiments, the heat dissipating blocks 72 may be made from a thermal grease, and may be formed by coating techniques.
In certain embodiments, the holes 31 in the insulator layer 3 may be formed after formation of the patterned circuit 5 using laser ablation techniques. Alternatively, the holes 31 in the insulator layer 3 may be formed before formation of the patterned circuit 5. For instance, the method may include: forming a non-patterned catalyst seed layer (not shown) on the insulator layer 3; forming a non-patterned reduced metal layer (not shown) on the non-patterned catalyst seed layer 41; and patterning the non-patterned reduced metal layer and the non-patterned catalyst seed layer 41 and forming the holes 31 in the insulator layer 3 using laser ablation techniques.
In certain embodiments, the heat generated from the electronic components 6 may be conducted through the patterned circuit 5, the insulator layer 3 and the heat sink 2 into the atmosphere, which renders the circuit-and-heat-dissipation assembly of the certain embodiments more efficient in heat dissipation as compared to the aforesaid electronic assembly.
While the disclosure has been described in connection with what are considered the exemplary embodiments, it is understood that this disclosure is not limited to the disclosed embodiments but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.
Claims
1. A method of making a circuit-and-heat-dissipation assembly, comprising:
- preparing a heat sink that includes a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface, the heat dissipating element protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment;
- forming an insulator layer on the circuit-forming surface; and
- forming a patterned circuit on the insulator layer,
- wherein the patterned circuit is formed on the insulator layer by forming a patterned electroless plating layer on the insulator layer using electroless plating techniques, and
- wherein the patterned electroless plating layer is formed on the insulator layer by: forming a catalyst seed layer comprising an active metal on the insulator layer; and forming a reduced metal layer on the catalyst seed layer by reducing metal ions through the catalyst seed layer.
2. The method as claimed in claim 1, wherein the catalyst seed layer is a patterned catalyst seed layer.
3. The method as claimed in claim 1, wherein the catalyst seed layer is a non-patterned catalyst seed layer and is subjected to patterning.
4. The method as claimed in claim 1, wherein a patterned electroplating layer is formed on the electroless plating layer using electroplating techniques.
5. The method as claimed in claim 2, wherein the patterned catalyst seed layer is formed on the insulator layer by:
- covering the insulator layer with a patterned mask, the patterned mask being formed with a pattern of through-holes that corresponds to a pattern of the patterned catalyst seed layer; and
- applying an ink containing the active metal onto the patterned mask to fill the through-holes with the ink.
6. The method as claimed in claim 5, wherein the pattern of the patterned mask is formed by laser ablation techniques.
7. The method as claimed in claim 5, wherein the circuit-forming surface of the heat absorbing base is curved in shape, the patterned mask being flexible and conforming to the circuit-forming surface when covering the insulator layer.
8. The method as claimed in claim 1, further comprising:
- forming at least one hole in the insulator layer, such that the hole exposes a contact region of the circuit-forming surface and that the hole is aligned with a gap defined by two soldering ends of a pair of conductive lines of the patterned circuit; and
- forming a heat dissipating block on the contact region, such that the heat dissipating block extends from the contact region through the hole in the insulator layer and into the gap.
9. The method as claimed in claim 1, wherein the heat dissipating element is in the form of fins.
10. The method as claimed in claim 1, wherein the reduced metal layer is formed on the catalyst seed layer by reducing the metal ions in an electroless plating bath through the catalyst seed layer.
Type: Application
Filed: Jun 14, 2017
Publication Date: Oct 5, 2017
Applicant: Taiwan Green Point Enterprises Co., Ltd. (Taichung City)
Inventors: Pen-Yi LIAO (Taichung City), Hung-San PAN (Taichung City), Yu-Cheng CHEN (Taichung City), Hui-Ching CHUANG (Taichung City), Wen-Chia TSAI (Taichung City)
Application Number: 15/623,202