Edge Bend for Isolation Packages
In one instance, a semiconductor isolation package includes a leadframe that includes a plurality of leadframe leads. At least one of the plurality of leadframe leads includes a lead body having a first end that comprises an external pin portion and a second end. The lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion. The edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion. The first bend is in the direction of the first end on the leg portion. The edge bend assists in shielding electronic fields. Other aspects are presented.
This application claims the benefit of and priority to U.S. Provisional Application Ser. No. 62/571,091, filed Oct. 11, 2017, which is hereby fully incorporated herein by reference for all purposes.
TECHNICAL FIELDThis relates generally to semiconductor devices, and more particularly semiconductor isolation packages.
BACKGROUNDSemiconductor devices are used in many applications. In some instances, a semiconductor isolation device is used to provide isolation of a human user or equipment from a high voltage spike. These isolation devices have two main failure modes: package failure or component failure. The more common failure mode in some instances is package failure. The isolation devices are tested to demonstrate a certain voltage rating without arc failure.
SUMMARYIn one aspect, a semiconductor isolation package includes a leadframe that includes a plurality of leadframe leads. At least one of the plurality of leadframe leads includes a lead body having a first end that comprises an external pin portion and a second end, and wherein the lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion. The edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion. The first bend is in the direction of the first end on the leg portion.
According to an aspect, an isolation semiconductor package includes a leadframe that includes a plurality of leadframe leads having a first end and a second end. The first end comprises an external pin portion. At least one of the leadframe leads of the plurality of leadframe leads includes a lead body having a leg portion coupled to a central lead portion coupled to edge bend portion, and wherein a first bend is formed between the central lead portion and the edge bend portion. The first bend is formed in the direction of the first end. The isolation semiconductor package also includes a first die pad, which is a downset die pad, coupled to at least one of the plurality of leadframe leads. The central lead portion of the at least one of the leadframe leads of the plurality of leadframe leads extends along a first plane in a first direction and the first die pad is at least partially in a second plane that is parallel to the first plane. The first plane is displaced from the second plane in a second direction that is orthogonal to the first direction and is displaced towards the first end of the plurality of leadframe leads. The isolation semiconductor package also includes a component coupled to the first die pad and a mold compound substantially covering the first die pad, the component, and at least the edge bend portion of the at least one of the leadframe leads of the plurality of leads.
According to an aspect, a semiconductor isolation package includes a leadframe, and the leadframe includes a plurality of leadframe leads including a first end that forms an external pin portion and a second end. Each of the plurality of leadframe leads includes a lead body having a leg portion proximate the first end and coupled to a central lead portion that is coupled to an end portion at the second end. At least some of the plurality leadframe leads include a first internal edge on the second end and at least some of the plurality of leadframe leads include a second internal edge on the second end and that is opposed to the first internal edge. The semiconductor isolation package further includes a downset die pad positioned between the first internal edge and the second internal edge. Wherein the downset die pad is displaced from the second end of the plurality of leadframe leads in a direction towards the first end of the plurality leadframe leads. At least one of the plurality of leadframe leads is formed with a bend between the central lead portion and the end portion to form an edge bend. The bend is in a same direction as the second plane is displaced from the first plane. Other aspects are disclosed herein.
With respect to semiconductor isolation devices that are meant to protect a human user or a piece of equipment, it is desirable to minimize package failure. Package failure occurs when an arc occurs across the package. For a package under electrical stress, an electrical field develops on an interior of the package and can grow and extend outside the package. When that happens the electrical field outside is more likely to ionize air or the exterior gas or gases and increases the chances of an arc.
In one aspect, arc-failure of an isolation package is decreased by a leadframe that reduces the external electrical field that develops by containing the electrical field in the package. The electrical field is contained by shielding the area toward the closest or nearby leads by bending down an internal edge portion of the leads. The leads are bent towards the ends of the external pins and towards a downset die pad.
Referring now to the drawings, and initially and primarily to
A plurality of leadframe leads 116 include a first end 118 that comprises an external pin portion 120 and a second end 122 that comprises an edge portion 124, or inner edge or internal edge. The edge portion 124 is the end of the lead 116 that is closest to one or more die pads (e.g., die pad 102). As used herein, “plurality” means two or more. At least some of the plurality leadframe leads 116 make up a first internal edge 126 and at least some of the plurality of leadframe leads 116 make up a second, opposed internal edge 128. The die pads 102, 104, and 106 are disposed between the first internal edge 126 and the second internal edge 128. In terms of arc-failure, the location of greatest concern is where the smallest gap (compared to other gaps in the package) is formed between leadframe leads 116 and components that have the greatest potential difference, and in this illustrative arrangement, it will be appreciated that an external edge 130 (
At least one 115 of the plurality of leadframe leads 116 includes a lead body 117 having and extending between the first end 118 and the second send 122. The first end 118 forms an external pin portion. The lead body 117 has a leg portion 119 coupled to a central lead portion 121 that is coupled to the edge bend portion 138. The edge bend portion 138 is formed by a first bend 123 on the lead body 117 proximate the second end 122 between the central lead portion 121 and edge bend portion 138. The first bend 123 is in the direction of the first end 118, e.g., down in the orientation of
The edge portion 124 of the plurality of leadframe leads 116 that form the first internal edge 126 is coupled to the central lead portion 121 is in a first plane (see by analogy plane 220 in
The area generally indicated 136 in
The first ends 118 of the plurality of leadframe leads 116 on a first lateral side 140, which is shown clearly in
In this illustrative example, bond wires 148 interconnect the first die 112 with some of the plurality of leadframe leads on the first lateral side 140. Bond wires 150 interconnect the first die 112 and the component 108. Bond wires 152 interconnect the second die 114 and the component 108. Bond wires 154 interconnect the second die 114 and some of the plurality of leadframe leads 116 on the second lateral side 144. Bond wires 156 interconnect the component 108 and some of the plurality of leadframe leads 116 on the second lateral side 144. Bond wires 157 interconnect the component 108 and some of the plurality of leadframe leads 116 on the first lateral side 140.
The semiconductor isolation package 100 includes a mold compound 158 that in a completed state covers at partially the die pad 102, the component 108, and at least the edge bend portion 138 of at least one of the leadframe leads. The semiconductor isolation package 100 has the first lateral side 140 and opposing second lateral side 144, and has a first longitudinal side 160 and an opposing second longitudinal side 162.
In some arrangements, the external or outward-facing edge 130 of the downset die pad 102 may be formed with a stepped portion 164 (
While other components 108 might be used, the semiconductor isolation package 100 is shown with the component 108 in the form of the transformer 110. As shown clearly in
Referring now primarily to
The leadframe 200 includes a plurality of leadframe leads 202 that each have a first end 204 and a second end 206 of a lead body 203. In this instance each leadframe lead 202 has a leg portion 212 that has a foot portion 208 at the first end 204. The foot portion 208 extends generally in the x-direction 210 for the orientation shown. A majority of the leg portion 212 extends generally in the y-direction 214—generally upward for the orientation shown. The leg portion 212 transitions to a central lead portion 216 that is again primarily in the x-direction 210 until reaching a bend 224. A bend 221 transitions the lead body 203 from the leg portion 212 to the central lead portion 216. At the bend 224, the central lead portion 216 transitions to an end portion 225. That is, proximate leading edge 234, the bend 224 in the lead body 203 forms the edge bend 218.
The edge bend 218 is formed at the second end 206 and angles down (for the orientation shown). The central lead portion 216 is largely (a majority in this embodiment) coplanar with a first reference plane 220 and the edge bend 218 extends away from the reference plane 220. In this illustrative arrangement, the central lead portion 216 forms a unified plank member 222 that has the bend 224 of between about 20 and 60 degrees from the first plane 220 to form the edge bend 218. The angle may be determined using another reference as described in connection with
The edge bend 218 extends downwardly and may include a unified plank 224. The bend 224 is from an end of the central lead portion 216 that is in the first plane 220 towards an outer edge 224 of a downset die pad 226. A substantial or majority of a planar portion of the downset die pad 226 is partially coplanar with a second plane 228. The second plane 228 is displaced by a dimension 230 from the first plane 220 in the y-direction 214. The displacement represented by dimension 230 may vary for different applications, but in one instance is between 200 and 400 microns. In one illustrative arrangement, the displacement 230 is 75 microns. The edge 224 of the downset die pad 226 may be formed with a stepped, or inverted stepped, portion 232. The stepped portion may be formed by reducing the thickness of the die pad 226 on the edge 224.
While only a portion of the leadframe 200 is shown, it should be understood that the gap between the leading edge 234 of the edge bend 218 and the edge 224 of the downset die pad 226 represents the smallest gap of the associated package and, thus, the likely location for an electrical field to develop when a package with the leadframe 200 is under high voltage. A planar base 236 or surface of the edge bend 218 shields the foot portion 208 of the leg portion 212 of the nearby leadframe leads 202 and thereby may prevent an electric field from forming outside of a mold compound (see 158 in
A qualitative discussion of performance vis-a-vis an electrical field of an illustrative arrangement of a semiconductor isolation package 400 will now be presented in connection with
The downset die pad 318 has a component 320 that is a transformer 322. The transformer 322 has a first coil 323 and a second coil 325. A mold compound 324 is over molded to form an exterior of the package or cover at least a portion of the components therein. In the arrangement of
If a reference line 343 is drawn from the closest two portions between the internal edge 314 of the leadframe and the edge 316 of the downset die 318, that reference line 343 is one that may be used to describe an angle 336 between the reference line 334 and the edge bend 438 (as shown in
Referring now primarily to
Referring again primarily to
Continuing to refer primarily to
In one arrangement, a semiconductor package comprises a leadframe and the lead frame includes at least one lead having a first end that forms an external pin portion and a second end, and further having a central lead portion that extends between the external pin portion and an edge bend. The edge bend is formed proximate the second end. The central lead portion and the edge bend are primarily in different planes. A bend is formed between the edge bend and the central lead portion that is in the same direction as towards the external pin portion (.e.g., downward for orientation of the figures herein).
In an alternative arrangement to those previously presented, the edge bend is bent away from the leg portion (opposite direction from shown in
Modifications are possible in the described arrangements, and other arrangements are possible, within the scope of the claims. It should be understood that while certain semiconductor package types are shown herein for illustration purposes, the disclosure contemplates other semiconductor package types as well.
Claims
1. A semiconductor isolation package comprising a leadframe, the lead frame comprising:
- a plurality of leadframe leads, wherein at least one of the plurality of leadframe leads comprises: a lead body having a first end that comprises an external pin portion and a second end, wherein the lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion, wherein the edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion, and wherein the first bend is in the direction of the first end on the leg portion.
2. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 20 and 60 degrees.
3. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 30 and 55 degrees.
4. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 40 and 50 degrees.
5. The semiconductor isolation package of claim 1, wherein the first bend is formed at least 35 micrometers from the second end.
6. The semiconductor isolation package of claim 1, wherein a second bend is formed between the leg portion and central portion.
7. The semiconductor isolation package of claim 1, wherein the first bend comprises an angle that is between 30 and 50 degrees, wherein the first bend is formed at least 35 micrometers from the second end, and wherein a second bend is formed between the leg portion and central portion.
8. An isolation semiconductor package comprising:
- a leadframe comprising: a plurality of leadframe leads comprising a first end and a second end, the first end comprises an external pin portion, wherein at least one of the leadframe leads of the plurality of leadframe leads comprises a lead body having a leg portion coupled to a central lead portion coupled to edge bend portion, wherein a first bend is formed between the central lead portion and the edge bend portion and the first bend is formed in the direction of the first end, a first die pad, which is a downset die pad, coupled to at least one of the plurality of leadframe leads, and wherein the central lead portion of the at least one of the leadframe leads of the plurality of leadframe leads extends along a first plane in a first direction and wherein the first die pad is at least partially in a second plane that is parallel to the first plane, and wherein the first plane is displaced from the second plane in a second direction that is orthogonal to the first direction and is displaced towards the first end of the plurality of leadframe leads;
- a component coupled to the first die pad;
- a mold compound substantially covering the first die pad, the component, and at least the edge bend portion of the at least one of the leadframe leads of the plurality of leads.
9. The isolation semiconductor package of claim 8, wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads.
10. The isolation semiconductor package of claim 8, wherein the component comprises a transformer having a laminate, and wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads.
11. The isolation semiconductor package of claim 8, wherein the first bend is formed at least 35 micrometers from the second end.
12. The isolation semiconductor package of claim 8, wherein the edge bend portion forms an angle between a reference line and the edge bend portion; wherein the reference line extends from the second end of the at least one of the leadframe leads of the plurality of leadframes when positioned without a bend to a closest point of the first die pad; wherein the angle is between 30 and 50 degrees; and wherein the first bend is formed at least 35 micrometers from the second end.
13. The isolation semiconductor package of claim 12, wherein the angle is between 40 and 50 degrees.
14. The isolation semiconductor package of claim 12, wherein the angle is 45 degrees.
15. The isolation semiconductor package of claim 8, wherein the first die pad has an external edge closest to the second end of the plurality of leadframe leads that is formed with a stepped portion.
16. The isolation semiconductor package of claim 15, wherein a thickness of the external edge forming the stepped portion is 70% or less of a thickness of other portions of the first die pad.
17. The isolation semiconductor package of claim 8, wherein the second plane is displaced from the first plane by at least 75 micrometers.
18. The isolation semiconductor package of claim 8, wherein the component comprises a transformer having a laminate; wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads; wherein the second plane is displaced from the first plane by at least 75 micrometers; wherein the edge bend portion forms an angle between a reference line and the edge bend portion and wherein the reference line extends from the second end of the at least one of the leadframe leads of the plurality of leadframes when positioned without a bend to a closest point of the first die pad; and wherein the angle is between 30 and 50 degrees.
19. A semiconductor isolation package comprising a leadframe, the leadframe comprising:
- a plurality of leadframe leads comprising a first end that comprises an external pin portion and a second end;
- wherein each of the plurality of leadframe leads comprises a lead body having a leg portion proximate the first end and coupled to a central lead portion that is coupled to an end portion at the second end;
- wherein at least some of the plurality leadframe leads comprise a first internal edge on the second end and at least some of the plurality of leadframe leads comprise a second internal edge on the second end and that is opposed to the first internal edge;
- a downset die pad positioned between the first internal edge and the second internal edge and, wherein the downset die pad is displaced from the second end of the plurality of leadframe leads in a direction towards the first end of the plurality leadframe leads;
- wherein at least one of the plurality of leadframe leads is formed with a bend between the central lead portion and the end portion to form an edge bend, wherein the bend is in a same direction as the second plane is displaced from the first plane.
20. The semiconductor package of claim 19, wherein the bend formed between the central lead portion and end portion is between 20 and 60 degrees.
21. The semiconductor package of claim 19, wherein the bend is formed at least 35 micrometers from the second end.
22. The semiconductor package of claim 19, wherein the downset die is positioned closer to the first internal edge than to the second internal edge.
Type: Application
Filed: Jul 5, 2018
Publication Date: Apr 11, 2019
Inventors: John Paul Tellkamp (Rockwall, TX), Chang-Yen Ko (Taipei City)
Application Number: 16/028,179