SiC Device with Buried Doped Region
A SiC device with a doped buried region is provided. The doped buried region may be formed by: forming a first trench which extends into a first side of a SiC epitaxial layer of a first conductivity type, the first trench terminating at a first depth in the SiC epitaxial layer; at least partly filling the first trench with an epitaxial material of a second conductivity type opposite the first conductivity type; forming a second trench which extends into the first side of the SiC epitaxial layer so that the second trench overlaps the first trench, the second trench terminates at a second depth in the SiC epitaxial layer which is less than the first depth, and the epitaxial material in the first trench laterally extends below a bottom of the second trench; and forming a gate electrode in the second trench and electrically insulated from the SiC epitaxial layer.
Silicon technology is limited for power transistor applications, and is being replaced by SiC and GaN technologies. However, SiC behaves differently than Si during device fabrication. Also, Si power transistors often include a separate p-n junction integrated with the transistor device. The integrated p-n junction is formed by dopant implantation and annealing, and serves as a freewheeling diode during operation. For example, buried p-type regions for an n-channel power transistor function as compensation regions which shape the electric field when the device is blocking.
Unlike Si technology, annealing in SiC activates dopant elements but does not cause meaningful diffusion deeper into the crystal structure. To create a buried dopant profile such as for an integrated p-n junction, implantation typically must be performed multiple times and with relatively high energy. Implant energies in the MeV range are needed to yield an acceptable dopant profile. For such high energies, a very thick oxide mask is usually required which further increases process cost. Also, often it is not possible to implant the required dose at the required position or depth due to geometrical or process constraints, adding to the process costs while also increasing the risk of creating a large amount of crystal defects in the SiC substrate. In addition, the annealing temperature for dopant activation is very high and seldom heals crystal defects generated during implantation. These defects remain in the device, and may cause hazardous effects such as bipolar degradation during device operation. Moreover, implantation may result in a tail which causes variation/mismatch between adjacent buried doped regions. The variation/mismatch may affect the gate oxide shielding ability of the buried doped regions since the distance between adjacent doped buried regions determines shielding effectiveness.
Thus, there is a need for an improved technique for forming a buried doped region of a SiC device.
SUMMARYAccording to an embodiment of a method of forming a doped buried region of a SiC device, the method comprises: forming a first trench which extends into a first side of a SiC epitaxial layer of a first conductivity type, the first trench terminating at a first depth in the SiC epitaxial layer, at least partly filling the first trench with an epitaxial material of a second conductivity type opposite the first conductivity type; forming a second trench which extends into the first side of the SiC epitaxial layer so that the second trench overlaps the first trench, the second trench terminates at a second depth in the SiC epitaxial layer which is less than the first depth, and the epitaxial material in the first trench laterally extends below a bottom of the second trench; and forming a gate electrode in the second trench and electrically insulated from the SiC epitaxial layer.
The epitaxial material in the first trench may vertically extend along a lower part of a first sidewall of the second trench. A body region of the SiC device may adjoin the epitaxial material at the first sidewall of the second trench or may be formed in the epitaxial material. In addition or as an alternative, the body region may be connected to the epitaxial material via a contact region, such as e.g. a body contact region.
Separately or in combination, at least partly filling the first trench with the epitaxial material of the second conductivity type may comprise depositing a crystalline SiC overlayer of the second conductivity type on the first side of the SiC epitaxial layer and in the first trench. The crystalline SiC overlayer may further be planarized in a subsequent process step. By planarization, obsolete portions of the epitaxial material of the second conductivity type may be removed. Preparing a planarized surface may simplify subsequent process steps, such as, e.g., structuring or implantation by use of, e.g., photolithography, or may even be required for such a subsequent process step.
Separately or in combination, after planarizing the crystalline SiC overlayer and before forming the second trench, the method may further comprise: forming a body region of the second conductivity type in the planarized crystalline SiC overlayer; and forming a source region of the first conductivity type and a body contact region of the second conductivity type above the body region. Forming the body region, the source region and/or the body contact region may, in general, comprise implanting ions of at least one of the first conductivity type and the second conductivity type.
Separately or in combination, forming the second trench may comprise etching the second trench through the planarized crystalline SiC overlayer and into the SiC epitaxial layer.
Separately or in combination, the method may further comprise: before forming the first trench, forming a body region of the second conductivity type in the SiC epitaxial layer. If the body region is, for example, formed via implantation, forming the body region before forming the first trench may lead to reduced crystal damage from implantation in the epitaxial material in the first trench.
Separately or in combination, the method may further comprise: after forming the first trench and before forming the second trench, forming a source region of the first conductivity type and a body contact region of the second conductivity type above the body region.
Separately or in combination, after planarizing the crystalline SiC overlayer and before forming the second trench, the method may further comprise: forming a body region of the second conductivity type in the SiC epitaxial layer; and forming a source region of the first conductivity type and a body contact region of the second conductivity type above the body region. The body region may be formed near or at the first side of the SiC epitaxial layer, for example adjacent the first trench.
Separately or in combination, forming the first trench may comprise: etching the first trench to the first depth in the SiC epitaxial layer; filling a lower part of the first trench with an insulating material; widening an upper part of the first trench which is devoid of the insulating material, so that the first trench has a step transition between the upper part and the lower part; and after widening the upper part of the first trench, removing the insulating material from the lower part of the first trench. Widening the upper part may, for example, comprise an etch process.
Separately or in combination, at least partly filling the first trench with the epitaxial material of the second conductivity type may comprise: after removing the insulating material from the lower part of the first trench, depositing a crystalline SiC overlayer of the second conductivity type on the first side of the SiC epitaxial layer and in the lower part and the upper part of the first trench; and, optionally, planarizing the crystalline SiC overlayer.
Separately or in combination, forming the second trench may comprise: etching the second trench to the second depth which is below the step transition of the first trench. In other words: the second depth may be larger than a depth of the upper part.
According to an embodiment of a SiC device, the SiC device comprises: a first trench extending into a first side of a SiC epitaxial layer of a first conductivity type, the first trench terminating at a first depth in the SiC epitaxial layer; an epitaxial material of a second conductivity type opposite the first conductivity type at least partly filling the first trench; a second trench extending into the first side of the SiC epitaxial layer, the second trench overlapping the first trench, the second trench terminating at a second depth in the SiC epitaxial layer which is less than the first depth, and the epitaxial material in the first trench laterally extending below a bottom of the second trench; and a gate electrode in the second trench and electrically insulated from the SiC epitaxial layer.
The epitaxial material in the first trench may vertically extend along a lower part of a first sidewall of the second trench. A body region of the SiC device may adjoin the epitaxial material at the first sidewall of the second trench or may be formed in the epitaxial material. In addition or as an alternative, the body region may be connected to the epitaxial material via a contact region, such as e.g. a body contact region.
Separately or in combination, the SiC device may further comprise: a body region adjacent the gate electrode; and a source region above the body region and adjacent the gate electrode, the body region and the source region being electrically insulated from the gate electrode.
Separately or in combination, the first trench may comprise a lower part and an upper part, the upper part may be wider than the lower part, the epitaxial material of the second conductivity type may be in the lower part and the upper part of the first trench, and the second trench may terminate in the SiC epitaxial layer below a step transition between the lower part and the upper part of the first trench. A step transition in the first trench may help to enhance the current spread in a drift zone of the manufactured SiC device.
Separately or in combination, the SiC device may comprise a plurality of first trenches, a plurality of second trenches and a plurality of body regions of the second conductivity type. The plurality of first trenches and the plurality of body regions may be arranged in rows of the first trenches, each row of the first trenches extending lengthwise in a first direction. The plurality of second trenches may be arranged in rows of the second trenches, each row of the second trenches extending lengthwise in a second direction transverse to the first direction. In this context, “transverse” may mean that the first direction and the second direction enclose an angle of at least 10° and at most 90°. The first direction and the second direction may both run along a lateral direction of the SiC device, i.e., perpendicular to a thickness of the SiC epitaxial layer. The first direction may be transverse, e.g. perpendicular, to the first depth of the first trenches. The second direction may be transverse, e.g. perpendicular, to the second depth of the second trenches. It may be possible for the first trenches and the body regions to have a same extent along the first and/or the second direction. For example, the first trenches and the body regions are arranged in a checkerboard-like structure.
Separately or in combination, in each row of the first trenches, the first trenches may be spaced apart from one another by one of the body regions. That is to say, the first trenches and the body regions in each row of the first trenches may be arranged alternatingly. The first trenches in adjacent rows of the first trenches may be offset from one another so that a first trench in one row of the first trenches adjoins at least part of a body region of an adjacent row of the first trenches. Further, the first trenches and the body regions, in particular the first trenches and the body regions of neighbouring rows of first trenches, may be arranged alternatingly along the second direction.
Separately or in combination, the epitaxial material of the second conductivity type at least partly filling the first trench may form part of a superjunction structure, e.g. of a compensation region of a superjunction structure. A superjunction structure in general may comprise compensation regions that are arranged in a drift zone of the SiC device, said compensation regions being laterally spaced by portions of the drift zone. Said portions of the drift zone being located between adjacent compensation regions may have a higher dopant concentration than other portions of the drift zone below the compensation regions. The compensation regions and the drift zone in a superjunction structure may be fully depletable, that is to say, the compensation regions and the drift zone may be aligned with each other with regards to their geometry and/or their doping concentrations to allow for an essentially complete ionisation of the doping atoms of the compensation regions and the drift zone, without reaching a critical field strength.
Separately or in combination, the SiC device may further comprise: a body region of the second conductivity type adjacent the gate electrode; a source region of the first conductivity type above the body region and adjacent the gate electrode; and a body contact region of the second conductivity type above the body region and adjacent the source region. The body region may extend through the body region to the epitaxial material of the second conductivity type.
Separately or in combination, the body contact region may comprise: a deeper, narrower part which contacts the epitaxial material of the second conductivity type; and an upper, wider part which extends over the body region.
Separately or in combination, the epitaxial material of the second conductivity type may comprise: an upper section with a lower doping concentration; and a lower section with a higher doping concentration.
According to an embodiment of a method of forming a doped buried region of a SiC device, the method comprises: forming a trench which extends into a first side of a SiC epitaxial layer of a first conductivity type; forming an epitaxial material of a second conductivity type opposite the first conductivity type in a bottom of the trench; forming an electrode structure in the trench, the electrode structure comprising a field electrode on and in electrical contact with the epitaxial material, and a gate electrode electrically insulated from the field electrode and the SiC epitaxial layer; and forming a body region adjacent the gate electrode, and a source region above the body region and adjacent the gate electrode, the body region and the source region being electrically insulated from the gate electrode. The gate electrode may be positioned above the field electrode or may laterally surround the field electrode.
Forming the epitaxial material of the second conductivity type in the bottom of the trench may comprise: depositing a crystalline SiC overlayer of the second conductivity type on the first side of the SiC epitaxial layer and in the bottom of the trench; and removing the crystalline SiC overlayer from the first side of the SiC epitaxial layer.
According to an embodiment of a SiC device, the SiC device comprises: a trench extending into a first side of a SiC epitaxial layer of a first conductivity type; an epitaxial material of a second conductivity type opposite the first conductivity type in a bottom of the trench; an electrode structure in the trench, the electrode structure comprising a field electrode on and in electrical contact with the epitaxial material, and a gate electrode electrically insulated from the field electrode and the SiC epitaxial layer; a body region adjacent the gate electrode; and a source region above the body region and adjacent the gate electrode, wherein the body region and the source region are electrically insulated from the gate electrode.
Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.
The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. The features of the various illustrated embodiments can be combined unless they exclude each other. Embodiments are depicted in the drawings and are detailed in the description which follows.
The embodiments described herein provide a technique for forming a buried doped region of a SiC device. The buried doped region is formed as an epitaxial material deposited in a trench instead of only using implantation. Hence, it is possible that the buried doped region described herein is not prone to variation/mismatch caused by implantation tails. The buried doped region may be formed without requiring a high energy implantation process, without having to form a thick (expensive) implantation mask, and without causing crystal defects. The buried doped region may form a shielding structure for protecting a gate oxide from an excessive electric field. In other embodiments, the buried doped region may form part of a superjunction structure. For example, the thickness of the buried doped region may be in a range between 1-2 μm and a drift layer may vary from 4-5 μm (e.g. for a 650 V device) to 50-100 μm (e.g. for a 6.5-10 kV device). A superjunction drift layer in SiC may be beneficial for higher voltages such as 1.2-3.3 kV and above. The SiC devices described herein may include one or both types of buried doped regions. SiC devices with such buried doped regions are also described. These SiC devices may have been formed using at least one of the techniques described herein.
According to the embodiment illustrated in
In one embodiment, the SiC epitaxial layer 100 of the first conductivity type and the SiC substrate 102 may be 4H—SiC. In the case of an n-channel power transistor, the SiC epitaxial layer 100 has n-type conductivity. In the case of a p-channel power transistor, the SiC epitaxial layer 100 has p-type conductivity. In either case, the SiC epitaxial layer 100 may form the drift zone of a SiC power transistor. The dopant concentration of the drift zone may be set during crystal growth of the SiC epitaxial layer 100, or may be implanted after crystal growth.
In addition or as an alternative, the dopant type may be changed during epitaxial growth. For example, an upper part of the crystalline SiC overlayer 114, which may be deposited on the first side 108 of the SiC epitaxial layer 100, may be of the first conductivity type.
Before forming the body region 116, the dopant concentration of the crystalline SiC overlayer 114 in a region of the SiC overlayer 114 where the body region 116 is to be formed may be lower or higher than the dopant concentration of the to-be-formed body region 116. In the latter case of the dopant concentration being higher, counter-doping may be required for forming the body region 116. Further, the dopant concentration of the crystalline SiC overlayer 114 may be higher than the dopant concentration of the body region 116 at least in portions of the crystalline SiC overlayer 114 that are located below the to-be-formed second trench.
In the case of an n-channel device, the body region 116 may be formed by implanting p-type dopant species such as beryllium, boron, aluminium, or gallium into the planarized crystalline SiC overlayer 114. In the case of a p-channel device, the body region 116 may be formed by implanting n-type dopant species such as nitrogen or phosphorus into the planarized crystalline SiC overlayer 114. If counter-doping is required, the doping type of the implanted ions may opposite to the doping type of the channel, i.e. p-type dopants for an p-channel device and n-type dopants for an n-channel device. In either case, this separate implantation allows for precise control of the channel dopant concentration.
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First trenches 404 extend into a first side 406 of the SiC epitaxial layer 400 and have a bottom 408 which terminates at a first depth d1 in the SiC epitaxial layer 400. The first trenches 404 may be etched into the SiC epitaxial layer 400 to the first depth d1 using a standard dry etch process. The angle α of the trench sidewalls 410 may be controlled from 70° to 90°.
Similar to the embodiments shown in
The method embodiments illustrated in
The embodiments illustrated in
The rows 504 of first trenches 506 are spaced apart from one another by the p-type body regions 510. The first trenches 506 in adjacent rows 504 are offset from one another so that a first trench 506 in one row 504 adjoins a p-type body region 510 of an adjacent row 504. Two rows 504 of first trenches 506 are shown in
The SiC device manufactured according to the method illustrated in
The SiC device illustrated in
The SiC device illustrated in
The SiC device illustrated in
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Terms such as “first”, “second”, and the like, are used to describe various elements, regions, sections, etc. and are also not intended to be limiting. Like terms refer to like elements throughout the description.
As used herein, the terms “having”, “containing”, “including”, “comprising” and the like are open ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles “a”, “an” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.
Claims
1. A method of forming a doped buried region of a SiC device, the method comprising:
- forming a first trench which extends into a first side of a SiC epitaxial layer of a first conductivity type, the first trench terminating at a first depth in the SiC epitaxial layer;
- at least partly filling the first trench with an epitaxial material of a second conductivity type opposite the first conductivity type;
- forming a second trench which extends into the first side of the SiC epitaxial layer so that the second trench overlaps the first trench, the second trench terminates at a second depth in the SiC epitaxial layer which is less than the first depth, and the epitaxial material in the first trench laterally extends below a bottom of the second trench; and
- forming a gate electrode in the second trench and electrically insulated from the SiC epitaxial layer.
2. The method of claim 1, wherein the epitaxial material in the first trench vertically extends along a lower part of a first sidewall of the second trench, and wherein a body region of the SiC device adjoins the epitaxial material at the first sidewall of the second trench or is formed in the epitaxial material.
3. The method of claim 1, wherein at least partly filling the first trench with the epitaxial material of the second conductivity type comprises:
- depositing a crystalline SiC overlayer of the second conductivity type on the first side of the SiC epitaxial layer and in the first trench; and
- planarizing the crystalline SiC overlayer.
4. The method of claim 3, wherein after planarizing the crystalline SiC overlayer and before forming the second trench, the method further comprises:
- forming a body region of the second conductivity type in the planarized crystalline SiC overlayer; and
- forming a source region of the first conductivity type and a body contact region of the second conductivity type above the body region.
5. The method of claim 4, wherein forming the second trench comprises:
- etching the second trench through the planarized crystalline SiC overlayer and into the SiC epitaxial layer.
6. The method of claim 1, further comprising:
- before forming the first trench, forming a body region of the second conductivity type in the SiC epitaxial layer.
7. The method of claim 6, further comprising:
- after forming the first trench and before forming the second trench, forming a source region of the first conductivity type and a body contact region of the second conductivity type above the body region.
8. The method of claim 3, wherein after planarizing the crystalline SiC overlayer and before forming the second trench, the method further comprises:
- forming a body region of the second conductivity type in the SiC epitaxial layer adjacent the first trench; and
- forming a source region of the first conductivity type and a body contact region of the second conductivity type above the body region.
9. The method of claim 1, wherein forming the first trench comprises:
- etching the first trench to the first depth in the SiC epitaxial layer;
- filling a lower part of the first trench with an insulating material;
- widening an upper part of the first trench which is devoid of the insulating material, so that the first trench has a step transition between the upper part and the lower part; and
- after widening the upper part of the first trench, removing the insulating material from the lower part of the first trench.
10. The method of claim 9, wherein at least partly filling the first trench with the epitaxial material of the second conductivity type comprises:
- after removing the insulating material from the lower part of the first trench, depositing a crystalline SiC overlayer of the second conductivity type on the first side of the SiC epitaxial layer and in the lower part and the supper part of the first trench; and
- planarizing the crystalline SiC overlayer.
11. The method of claim 10, wherein forming the second trench comprises:
- etching the second trench to the second depth which is below the step transition of the first trench.
12. A SiC device, comprising:
- a first trench extending into a first side of a SiC epitaxial layer of a first conductivity type, the first trench terminating at a first depth in the SiC epitaxial layer;
- an epitaxial material of a second conductivity type opposite the first conductivity type at least partly filling the first trench;
- a second trench extending into the first side of the SiC epitaxial layer, the second trench overlapping the first trench, the second trench terminating at a second depth in the SiC epitaxial layer which is less than the first depth, and the epitaxial material in the first trench laterally extending below a bottom of the second trench; and
- a gate electrode in the second trench and electrically insulated from the SiC epitaxial layer.
13. The SiC device of claim 12, wherein the epitaxial material in the first trench vertically extends along a lower part of a first sidewall of the second trench, and wherein a body region of the SiC device adjoins the epitaxial material at the first sidewall of the second trench or is formed in the epitaxial material.
14. The SiC device of claim 12, further comprising:
- a body region adjacent the gate electrode; and
- a source region above the body region and adjacent the gate electrode,
- wherein the body region and the source region are electrically insulated from the gate electrode.
15. The SiC device of claim 12, wherein the first trench comprises a lower part and an upper part, wherein the upper part is wider than the lower part, wherein the epitaxial material of the second conductivity type is in the lower part and in the upper part of the first trench, and wherein the second trench terminates in the SiC epitaxial layer below a step transition between the lower part and the upper part of the first trench.
16. The SiC device of claim 12,
- wherein the SiC device comprises a plurality of first trenches, a plurality of second trenches and a plurality of body regions of the second conductivity type,
- wherein the plurality of first trenches and the plurality of body regions are arranged in rows of the first trenches, each row of the first trenches extending lengthwise in a first direction,
- wherein the plurality of second trenches are arranged in rows of the second trenches, each row of the second trenches extending lengthwise in a second direction transverse to the first direction,
- wherein in each row of the first trenches, the first trenches are spaced apart from one another by one of the body regions,
- wherein the first trenches in adjacent rows of the first trenches are offset from one another so that a first trench in one row of the first trenches adjoins at least part of a body region of an adjacent row of the first trenches,
- wherein the first trenches and the body regions are arranged alternatingly along the second direction.
17. The SiC device of claim 12, wherein part of the epitaxial material of the second conductivity type at least partly filling the first trench forms part of a superjunction structure.
18. The SiC device of claim 12, further comprising:
- a body region of the second conductivity type adjacent the gate electrode;
- a source region of the first conductivity type above the body region and adjacent the gate electrode; and
- a body contact region of the second conductivity type above the body region and adjacent the source region,
- wherein the body region extends through the body region to the epitaxial material of the second conductivity type.
19. The SiC device of claim 18, wherein the body contact region comprises:
- a deeper, narrower part which contacts the epitaxial material of the second conductivity type; and
- an upper, wider part which extends over the body region.
20. The SiC device of claim 12, wherein the epitaxial material of the second conductivity type comprises:
- an upper section with a lower doping concentration; and
- a lower section with a higher doping concentration.
21. A method of forming a doped buried region of a SiC device, the method comprising:
- forming a trench which extends into a first side of a SiC epitaxial layer of a first conductivity type;
- forming an epitaxial material of a second conductivity type opposite the first conductivity type in a bottom of the trench;
- forming an electrode structure in the trench, the electrode structure comprising a field electrode on and in electrical contact with the epitaxial material, and a gate electrode electrically insulated from the field electrode and the SiC epitaxial layer; and
- forming a body region adjacent the gate electrode, and a source region above the body region and adjacent the gate electrode, the body region and the source region being electrically insulated from the gate electrode.
22. The method of claim 21, wherein forming the epitaxial material of the second conductivity type in the bottom of the trench comprises:
- depositing a crystalline SiC overlayer of the second conductivity type on the first side of the SiC epitaxial layer and in the bottom of the trench; and
- removing the crystalline SiC overlayer from the first side of the SiC epitaxial layer.
23. A SiC device, comprising:
- a trench extending into a first side of a SiC epitaxial layer of a first conductivity type;
- an epitaxial material of a second conductivity type opposite the first conductivity type in a bottom of the trench;
- an electrode structure in the trench, the electrode structure comprising a field electrode on and in electrical contact with the epitaxial material, and a gate electrode electrically insulated from the field electrode and the SiC epitaxial layer;
- a body region adjacent the gate electrode; and
- a source region above the body region and adjacent the gate electrode,
- wherein the body region and the source region are electrically insulated from the gate electrode.
Type: Application
Filed: Aug 20, 2018
Publication Date: Feb 20, 2020
Inventors: Ravi Keshav Joshi (Klagenfurt), Rudolf Elpelt (Erlangen), Romain Esteve (Munich)
Application Number: 16/105,742