CIRCUIT BOARD

A circuit board with anti-EMI proofing for each component on the board includes a first outer wiring layer, electronic components mounted on the first outer wiring layer, and at least one electromagnetic shielding unit. Each electromagnetic shielding unit has a shielding layer and conductive posts formed on the shielding layer, the shielding layer and conductive posts defining a receiving space to house and shield one of the electronic components. An adhesive layer formed on the first outer wiring layer bonds each electromagnetic shielding unit to the first outer wiring layer.

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Description
FIELD

The subject matter herein generally relates to a circuit board and a method for manufacturing the circuit board.

BACKGROUND

A circuit board may have an electromagnetic shielding layer to reduce electromagnetic interference (EMI) in the circuit board. The sidewall of the EMI layer may include a number of mounting legs. The sidewall of the circuit board needs to define a number of receiving grooves for the mounting legs. The mounting legs are inserted into the receiving grooves to connect the electromagnetic shielding layer to the circuit board. However, the mounting legs and the receiving grooves increase the cost and the complexity of manufacturing process. Improvement in the art is desired.

BRIEF DESCRIPTION OF THE DRAWINGS

Implementations of the present technology will now be described, by way of embodiment, with reference to the attached figures.

FIG. 1 is a flowchart of an embodiment of a method for manufacturing a circuit board.

FIG. 2 is a diagrammatic view of a copper baseboard used in the method of FIG. 1.

FIG. 3 is a diagrammatic view showing a first copper layer formed on the copper baseboard of FIG. 2.

FIG. 4 is a diagrammatic view showing the first copper layer of FIG. 3 etched to form an inner wiring layer.

FIG. 5 is a diagrammatic view showing a second dielectric layer and a second copper layer formed on the inner wiring layer of FIG. 4.

FIG. 6A is a diagrammatic view showing the second copper layer and the copper foil of FIG. 5 etched to form a first outer wiring layer and a second outer wiring layer.

FIG. 6B is a plan view of FIG. 6A.

FIG. 7 is a diagrammatic view showing electronic components mounted on the first outer wiring layer of FIG. 6A.

FIG. 8 is a diagrammatic view showing conductive posts formed on an electromagnetic shielding substrate.

FIG. 9A is a diagrammatic view showing the electromagnetic shielding substrate of FIG. 8 cut to form electromagnetic shielding units.

FIG. 9B is a plan view of FIG. 9A.

FIG. 10 is a diagrammatic view showing the electromagnetic shielding units of FIG. 9A mounted on the first outer wiring layer of FIG. 7.

FIG. 11 is a diagrammatic view showing an adhesive layer formed on the first outer wiring layer of FIG. 10.

FIG. 12 is a diagrammatic view showing an intermediate product of FIG. 11 cut to form a circuit board.

DETAILED DESCRIPTION

It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.

The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.

Referring to FIG. 1, a method for manufacturing a circuit board 100 (see FIG. 12) is presented in accordance with an embodiment. The method for manufacturing the circuit board 100 is provided by way of example, as there are a variety of ways to carry out the method. The method can begin at block 11.

At block 11, referring to FIG. 2, a copper baseboard 10 is provided, which includes a first dielectric layer 102, a copper foil 101 formed on the first dielectric layer 102, and a first protection layer 103 formed on the copper foil 101.

The copper baseboard 10 is a single-sided copper baseboard. In other embodiments, the copper baseboard 10 may be a double-sided copper baseboard.

The first dielectric layer 102 is made of a dielectric material such as resin or glass. In at least one embodiment, the first dielectric layer 102 is made of a resin selected from a group consisting of polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and any combination thereof.

The first protection layer 103 prevents the copper foil 101 from being oxidized.

At block 12, referring to FIG. 3, a first copper layer 11 is formed on the first dielectric layer 102.

In at least one embodiment, the first copper layer 11 is formed by electroplating. Before forming the first copper layer 11, at least two blind holes (not labeled) are defined in the first dielectric layer 102. The first copper layer 11 fills in the blind holes to form first conductive vias 10a that electrically connect the first copper layer 11 and the copper foil 101 to each other.

The blind holes can be formed by drilling or laser etching. The blind holes pass through the first dielectric layer 102, and do not pass through the copper foil 101.

In at least one embodiment, after defining the blind holes in the first dielectric layer 102, each blind hole is chemically plated to form a conductive layer (not shown) at the inner wall of the blind hole. The first copper layer 11 fills in each blind hole with the conductive layer.

At block 13, referring to FIG. 4, the first copper layer 11 is etched to form an inner wiring layer 11a.

The inner wiring layer 11a is formed by lithographic exposure and development. In at least one embodiment, a first photosensitive layer (not shown) is formed on the first copper layer 11. The first photosensitive layer is patterned to form hollow patterns through exposure and development. The first copper layer 11 is etched through the patterned first copper layer 11 to form the inner wiring layer 11a. Then, the patterned first copper layer 11 is removed.

At block 14, referring to FIG. 5, a second dielectric layer 12 and a second copper layer 13 are formed on the inner wiring layer 11a.

In at least one embodiment, before forming the second copper layer 13, at least two blind holes (not labeled) are defined in the second dielectric layer 12. The second copper layer 13 further fills in the blind holes to form at least two second conductive vias 12a that electrically connect the second copper layer 13 to the inner wiring layer 11a. A distance between two adjacent second conductive vias 12a can be more than a distance between two adjacent first conductive vias 10a.

In at least one embodiment, the second dielectric layer 12 is made of polypropylene.

At block 15, referring to FIGS. 6A and 6B, the first protection layer 103 is removed. The second copper layer 13 and the copper foil 101 are etched to form a first outer wiring layer 13a and a second outer wiring layer 101a respectively. A first solder mask layer 20 is formed on the second outer wiring layer 101a, thereby obtaining a circuit baseboard 1.

The circuit baseboard 1 includes a number of circuit units A1 spaced apart from each other and arranged in a matrix.

At block 16, referring to FIG. 7, a number of electronic components 2 are mounted on the first outer wiring layer 13a. The first outer wiring layer 13a includes a number of solder pads 131 that electrically connect to the inner wiring layer 11a through the second conductive vias 12a.

The electronic components 2 can be resistors, capacitors, or others. In at least one embodiment, each of the electronic components 2 includes at least two electrodes 21. Each of the electrodes 21 is connected to one of the solder pads 131 through a soldering ball 3. The soldering ball 3 can be made of solder paste, conductive silver paste, or conductive copper paste.

At block 17, referring to FIG. 8, an electromagnetic shielding substrate 40 is provided. The electromagnetic shielding substrate 40 includes an electromagnetic shielding layer 41 and a second protection layer 43 formed on the electromagnetic shielding layer 41. A third dielectric layer 403 is formed on a surface of the electromagnetic shielding layer 41 facing away from the second protection layer 43. A number of blind holes (not labeled) are defined in the third dielectric layer 403. Conductive paste or electroplated copper is filled in the blind holes to form a number of conductive posts 42.

In at least one embodiment, the electromagnetic shielding layer 41 is made of steel, aluminum, or copper.

At block 18, referring to FIGS. 9A and 9B, the third dielectric layer 403 is removed, and the electromagnetic shielding substrate 40 is cut to form a number of electromagnetic shielding units 4.

The electromagnetic shielding units 4 are arranged in a matrix. Each of the electromagnetic shielding units 4 includes the electromagnetic shielding layer 41, the second protection layer 43 formed on the electromagnetic shielding layer 41, and at least two of the conductive posts 42 formed on the surface of the electromagnetic shielding layer 41 facing away from the second protection layer 43. The conductive posts 42 can be adjacent to the edges of the electromagnetic shielding layer 41. The electromagnetic shielding layer 41 and the conductive posts 42 cooperatively define a receiving space 40a.

Each of the conductive posts 42 can be in a shape of a regular or elliptical cylinder, or a prism. The conductive posts 42 can be regularly or randomly arranged. The density of the conductive posts 42 may be adjusted according to the wavelengths of electromagnetic waves to be emitted by the electronic components 2. To achieve an optimal shielding effect, the distance between adjacent conductive posts 42 should be smaller than the wavelengths of the anticipated electromagnetic waves.

At block 19, referring to FIG. 10, each of the electromagnetic shielding units 4 is mounted on the solder pads 131 through the conductive posts 42 and covers one of the electronic components 2.

At block 20, referring to FIG. 11, an adhesive layer 5 is formed on the first outer wiring layer 13a that connects each of the electromagnetic shielding units 4 to the first outer wiring layer 13a, thereby forming an intermediate product 6. The adhesive layer 5 fills in the receiving space 40a of each of the electromagnetic shielding units 4 (that is, the gaps between each electromagnetic shielding unit 4 and the electronic component 2 covered by the electromagnetic shielding unit 4) and the gaps between each two adjacent electromagnetic shielding units 4. The adhesive layer 5 can be flush with the electromagnetic shielding layer 41.

At block 21, referring to FIG. 12, the intermediate product 6 is cut along gaps between every two adjacent electromagnetic shielding units 4. The second protection layer 43 is removed, and a second solder mask layer 22 is formed on the electromagnetic shielding layer 41, thereby forming a number of the circuit boards 100. The second solder mask layer 22 can further cover the adhesive layer 5.

In the circuit board 100, the electronic component generates electromagnetic waves which are reflected or absorbed by the electromagnetic shielding units 4. The circuit board 100 of the present disclosure has a number of electromagnetic shielding units 4, and cutting the intermediate product 6 forms a number of circuit boards 100. Thus, the method can simplify the process and reduce the manufacturing cost. Furthermore, the flexibility for manufacturing the circuit board can be improved. The electromagnetic shielding units are connected to the inner wiring layer through the conductive posts, and the electronic components are received in their own electromagnetic shielding units. The conductive continuity of the electromagnetic shielding units is improved, which also improves the electromagnetic shielding effect. Furthermore, by infilling adhesive between the inner wiring layer and the electromagnetic shielding units and embedding the electronic components in the circuit board, the electromagnetic shielding effect is further enhanced.

Although the circuit board 100 of the embodiment includes only three wiring layers, the number of the wiring layers can also be varied according to need.

Referring to FIG. 12, the present disclosure further provides an embodiment of a circuit board 100. The circuit board 100 includes an inner wiring layer 11a, a first dielectric layer 102, and a second dielectric layer 12. The first dielectric layer 102 and the second dielectric layer 12 are formed on opposite surfaces of the inner wiring layer 11a.

The circuit board 100 further includes a first outer wiring layer 13a and a second outer wiring layer 101a. The second outer wiring layer 101a is formed on the first dielectric layer 102, and the first outer wiring layer 13a is formed on the second dielectric layer 12. At least one electronic component 2 is mounted on the first outer wiring layer 13a. The first outer wiring layer 13a includes a number of solder pads 131. A first solder mask layer 20 is formed on the second outer wiring layer 101a.

In at least one embodiment, each of the electronic components 2 includes at least two electrodes 21. Each of the electrodes 21 is connected to one of the solder pads 131 through a soldering ball 3. The soldering ball 3 can be made of solder paste, conductive silver paste, or conductive copper paste.

In at least one embodiment, the first dielectric layer 102 defines at least one first conductive via 10a that electrically connects the second outer wiring layer 101a and the inner wiring layer 11a. The second dielectric layer 12 defines at least one second conductive via 12a that electrically connects the first outer wiring layer 13a and the inner wiring layer 11a to each other. A distance between two adjacent second conductive vias 12a can be more than a distance between two adjacent first conductive vias 10a, causing a density of the inner wiring layer 11a to be less than a density of the first outer wiring layer 13a.

The circuit board 100 further includes at least one electromagnetic shielding unit 4. The electromagnetic shielding unit 4 includes an electromagnetic shielding layer 41 and at least two conductive posts 42 formed on the electromagnetic shielding layer 41. The electromagnetic shielding layer 41 and the conductive posts 42 cooperatively define a receiving space 40a. The electromagnetic shielding unit 4 is mounted on the solder pads 131 through the conductive posts 42 and covers one of the electronic components 2. That is, the electronic component 2 is received in the receiving space 40a. An adhesive layer 5 is formed on the first outer wiring layer 13a that connects each of the electromagnetic shielding units 4 to the first outer wiring layer 13a. The adhesive layer 5 fills in the receiving space 40a of each of the electromagnetic shielding units 4 (that is, space between each electromagnetic shielding unit 4 and the electronic components 2 covered by the electromagnetic shielding unit 4). A second solder mask layer 22 is formed on the electromagnetic shielding layer 41. The second solder mask layer 22 can further cover the adhesive layer 5.

Even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only. Changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the plain meaning of the terms in which the appended claims are expressed.

Claims

1. A circuit board comprising:

a first outer wiring layer;
at least one electronic component mounted on the first outer wiring layer;
at least one electromagnetic shielding unit, each of the electromagnetic shielding unit comprising an electromagnetic shielding layer and at least two conductive posts formed on the electromagnetic shielding layer, the electromagnetic shielding layer and the conductive posts cooperatively defining a receiving space, the electromagnetic shielding unit mounted on the first outer wiring layer through the conductive posts, causing each of the electronic component to be received in the receiving space of a corresponding one of the electromagnetic shielding unit; and
an adhesive layer formed on the first outer wiring layer which connects each of the electromagnetic shielding unit to the first outer wiring layer.

2. The circuit board of claim 1, wherein the first outer wiring layer comprises at least two solder pads, the conductive posts are connected to the solder pads.

3. The circuit board of claim 2, wherein each electronic component comprises at least two electrodes, each of the electrodes is connected to one of the solder pads through a soldering ball.

4. The circuit board of claim 3, wherein the soldering ball is made of solder paste, conductive silver paste, or conductive copper paste.

5. The circuit board of claim 1, further comprising:

an inner wiring layer;
a first dielectric layer;
a second dielectric layer, the first dielectric layer and the second dielectric layer formed on opposite surfaces of the inner wiring layer; and
a second outer wiring layer formed on the first dielectric layer;
wherein the first outer wiring layer is formed on the second dielectric layer;

6. The circuit board of claim 5, further comprising:

a first solder mask layer formed on the second outer wiring layer.

7. The circuit board of claim 5, further comprising:

a second solder mask layer formed on the electromagnetic shielding layer.

8. The circuit board of claim 5, further comprising:

at least one first conductive via defined in the first dielectric layer, the first conductive via electrically connecting the second outer wiring layer and the inner wiring layer to each other.

9. The circuit board of claim 5, further comprising:

at least one second conductive via defined in the second dielectric layer, the second conductive via electrically connecting the first outer wiring layer and the inner wiring layer to each other.

10. The circuit board of claim 5, wherein a density of the inner wiring layer is less than a density of the first outer wiring layer.

Patent History
Publication number: 20200413529
Type: Application
Filed: Apr 21, 2020
Publication Date: Dec 31, 2020
Inventors: YONG-CHAO WEI (Qinhuangdao), LIN-JIE GAO (Shenzhen), HAN-PEI HUANG (Hsinchu)
Application Number: 16/854,009
Classifications
International Classification: H05K 1/02 (20060101); H05K 3/02 (20060101); H05K 3/46 (20060101);