FAULT DETECTION IN A THREE-PHASE DAB CONVERTER
A system and method of fault detection based on a detailed waveform analysis is presented for transient and steady-state fault operation of 3-Φ DAB converter. Main symptoms of the converter during normal and fault conditions have been identified and a unique pattern in DC bias of phase currents under fault mode is noted. The logic-based fault diagnosis scheme is used to detect the fault and identify the faulty transistor.
This application claims the benefit under 35 U.S.C. § 119 of Provisional Application Ser. No. 63/198,284, filed Oct. 8, 2020; Provisional Application Ser. No. 63/143,768, filed Jan. 29, 2021; and Provisional Application Ser. No. 63/220,884, filed Jul. 12, 2021, each of which is incorporated herein by reference.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCHThis invention was made with U.S. government support under contract or award No. DE-EE0006521 awarded by the Department of Energy. The Government has certain rights in the invention. The award subrecipient, John Deere Electronic Solutions, Inc., of the aforementioned contract or award elects title to any and all subject inventions set forth in this disclosure for U.S. and any European patent filings.
BACKGROUND OF THE INVENTIONThe present disclosure relates generally to power converters. More specifically, the disclosure relates to a method and system for detecting open-circuit faults in three-phase Dual Active Bridge (DAB) converters. With wide-scale adoption of power electronic converters, their reliability has become increasingly important. One popular DC-DC converter topology is the DAB, as it provides bidirectional power transfer and galvanic isolation between the input/output terminals. The three-phase DAB (3-Φ DAB) topology has shown great promise for higher power applications.
Constant increase in energy demand requires systems to be more efficient and reliable. The DAB DC-DC converter is known to provide benefits in terms of efficiency, power density, and bidirectional power transfer, as it operates with inherent soft switching (zero voltage switching) and high-frequency link. The three-phase variant of the DAB converter has potential for the higher power applications like DC grid connections and heavy-duty vehicles. For given semiconductor ratings, the 3-Φ DAB results in reduced filtering requirements, reduced AC-link current harmonics and higher power transfer capability when compared to the single-phase DAB converter (1-Φ DAB).
With a DAB converter, an open-circuit fault may occur due to semiconductor device failure or gate drive circuit failure. A survey on reliability of power electronics reported that 15% of component failures are related to gate drive and 31% are related to the semiconductor device. Both these failures can stop the switching of the device and lead to an open-circuit fault. Further, with the adoption of wide-bandgap semiconductor devices, the rate of failure changes with 19% of component failures related to the gate drive and 57% related to the semiconductor device. In some prior work, the open-circuit fault mode operation, detection, and fault-tolerant strategies were discussed for 1-Φ DAB. The post detection fault tolerant strategies were reported for 3-Φ DAB in other works. However, these studies assume that the fault location is known and do not provide strategies to detect and identify the location of the fault.
Therefore, it would be advantageous to develop a system and method for detecting a fault condition to prevent damage to the converter.
BRIEF SUMMARYIn this disclosure, a detailed waveform analysis is presented for transient and steady-state fault operation of 3-Φ DAB. Main symptoms of the converter during normal and fault conditions have been identified and a unique pattern in DC bias of phase currents under fault mode is noted. A logic-based fault diagnosis method is disclosed to detect the fault and identify the faulty transistor.
Three-Phase DAB: Normal Operation Vs Fault Mode Operation
The topology of three-phase dual active bridge (3-Φ DAB) converter 101 is shown in
Normal Operation
The 3-Φ DAB 101 is typically operated with 50% duty cycle for each phase-leg ‘χ’ i.e. Tχ1 and Tχ2 are ON for 50% time period (Ts) and are complementary to each other. The gate signals for different phase-legs in a bridge are shifted by 120° with respect to each other.
The power transfer of the 3-Φ DAB 101 is dependent on the phase-shift angle (ø) between the input and output bridge. The converter can have two modes of operation 0≤ø≤π/3 and π/3<ø≤π/2. The power transfer equations for 3-Φ DAB 101 are given by (1), where D=nVo/Vin. For reverse power transfer, the phase shift (ø) is negative.
Under normal operation, there is no DC bias in the phase currents, and they are 120 shifted with respect to each other. Assuming no dead-time between the top and the bottom switches, the switching time period (Ts) under normal operation can be divided into 18 states based on the conducting devices. For 0≤ø≤π/3, the AC phase current waveforms are shown in
Fault Mode Operation
Any component failure in the gate drive circuit of the transistor, or the failing of the transistor itself can lead to an open-circuit fault. Following assumptions are made to simplify the analysis.
1. Only one transistor fails open (stops switching).
2. The diode corresponding to the faulty transistor is functional; in case of (a) semiconductor or gate-drive failure in the insulated-gate bipolar transistor (IGBT)-based system with anti-parallel diode, and (b) gate-drive failure in the system comprising of MOSFET, SiC-FET or GaN-HeMT without the anti-parallel diodes.
3. The waveforms are shown for 0≤ø≤π/3 for positive power flow. However, the diagnosis scheme is valid for full range (0≤ø≤π/2), and the results are symmetric for the reverse power flow.
4. The reverse conduction in the device is considered to be through the diode and represented as a separate state. This allows the study to be valid for all types of semiconductor devices (IGBT, MOSFET, SiC-FET or GaN-HeMT).
Primary Fault (TA1):
Secondary Fault (Ta1):
In similar manner, the DC bias pattern can be obtained for all the transistor failures and are shown in Table I. The DC bias pattern among the top and bottom transistors of each leg is reversed, and the pattern is cyclic among the three phases. Each fault mode has a unique signature which has been exploited to develop a fault identification scheme.
Fault Diagnosis Scheme
All the fault conditions listed in Table I produce a DC bias in the phase currents. This DC bias can cause the magnetic elements (inductors and transformers 113) to saturate. It can also cause device failure and extra losses. Therefore, it is of interest to detect the fault as soon as possible and take corrective action. The devices usually handle high currents for a small amount of time. If the response is fast enough to prevent the transformer 113 from saturating (order of milliseconds), corrective action can be taken before catastrophic failure.
The fault diagnosis consists of three steps. First, detecting that a fault has occurred. Second, identifying the side of the fault. Third, identifying exactly which transistor has failed.
Step 2 is shown in
Results
The identification scheme for 3-Φ DAB open-circuit fault was tested according to the rated specification listed in Table II. 1200 V Silicon Carbide three-phase modules were used for both primary and secondary side active bridges 111/112. Three single-phase hand-wound transformers 113 were connected in star-star configuration and external inductors were used to realize the phase inductances.
For experiments, a fault is introduced by blocking the gate pulse of the target transistor and the corresponding results are provided in this section.
One-Side Current Sensing
The ability to sense current on one side provides a cost and design benefit especially in high-power and high-gain converters. The high-current and high-frequency current sensors are very costly compared to the low-current and high-frequency sensors. The results in
Note that the DC bias will eventually shift to the magnetizing current and risk transformer saturation if corrective measures are not taken. However, the results indicate that the magnetizing current (iA−nia) rises much slower (order of milliseconds). Therefore, the detection scheme is capable of detecting the faults much before the risk of saturation.
Primary Side Fault Mode Operation
Secondary Side Faut Mode Operation
A comparison of
Fault Identification
The detection method can be implemented via an electronic controller 120 which may include one or more of the following: an electronic data processor, an interface 121, a data bus, a data storage device, a data port, and a user interface (e.g., electronic display). The electronic data processor and the data storage device may be coupled to the data bus to facilitate communication of data messages among the electronic data processor, the data storage device, the data port, and the user interface. In some embodiments, each of the primary switches of the DAB 101 has a unique corresponding identifier and each of the secondary switches has a unique corresponding identifier. The electronic data processor comprises one or more of the following: a microprocessor, a microcontroller, a programmable logic device, a programmable gate array, an arithmetic logic unit, a Boolean logic unit, an electronic logic circuit or system, a digital circuit, a digital signal processor (DSP), and application specific integrated circuit (ASIC), or another data processing device. In one embodiment, the electronic data processor can execute software instructions stored in the data storage device.
In this disclosure, a diagnosis scheme has been described which identifies a faulty transistor in an open-circuit fault in a 3-Φ DAB converter 101. The AC-link current waveform is systematically analyzed in normal operating and fault conditions, and the DC bias patterns unique to individual transistor failure are identified. The logic-based scheme requires only three low-bandwidth current sensors, with no additional circuit modification.
Additional consideration can be given to the magnitude of DC bias with respect to the fault location, the design of hysteresis in DC bias detection and saturation of transformer-inductor arrangement. In addition, the manner in which the DC bias in the secondary side current is reflected on to the primary side sensors can be evaluated. Stated differently, the pronounced effect of fault in the output currents of the primary converter 111 of the 3-Φ DAB converter 101 causes excessive rise in the magnetizing current of the isolation transformer 113. The three-phase currents supplied by the primary converter 111 have a significant DC component. The fault detection method can be used to promptly shuts down the converter 101 well before the DC/DC power conversion system could destroy itself upon occurrence of an open circuit fault in the primary converter 111. Additionally, should the open circuit fault occur in the secondary converter 112, the method serves as a watch-dog or monitoring system to keep the converter 101 operational without any need for power derating. Therefore, the fault detection system and method could serves as a watchdog when the DC/DC power conversion system needs to work under limp-home mode and keep vehicle auxiliaries functional until next opportunity for maintenance.
The invention may broadly consist in the parts, elements, steps, examples and/or features referred to or indicated in the specification individually or collectively in any and all combinations of two or more said parts, elements, steps, examples and/or features. In particular, one or more features in any of the embodiments described herein may be combined with one or more features from any other embodiment(s) described herein.
Protection may be sought for any features disclosed in any one or more published documents referenced herein in combination with the present disclosure.
Although certain example embodiments of the invention have been described, the scope of the appended claims is not intended to be limited solely to these embodiments. The claims are to be construed literally, purposively, and/or to encompass equivalents.
Claims
1. A method of detecting an open-circuit fault in a three-phase dual active bridge converter comprising:
- detecting that a fault has occurred;
- identifying whether the fault occurred on a primary side or a secondary side of the dual active bridge converter; and
- identifying exactly which transistor has failed.
2. The method of claim 1, wherein detecting that a fault has occurred comprises:
- sensing a phase current; and
- identifying a DC bias in a phase current.
3. The method of claim 2, further comprising:
- passing the sensed phase current through a low-pass filter.
4. The method of claim 2, further comprising:
- calculating the moving average of the sensed currents over a switching period.
5. The method of claim 2, further comprising:
- identifying the DC bias as positive or negative.
6. The method of claim 1, wherein identifying whether the fault occurred on a primary side or a secondary side of the dual active bridge converter comprises:
- identifying the fault on the primary side if all phase currents show DC bias; and
- identifying the fault on the secondary side if some but not all phase currents show DC bias.
7. The method of claim 1, wherein identifying exactly which transistor has failed comprises:
- identifying a faulty transistor based on a table of known DC biases for a fault.
8. The method of claim 1, wherein detecting that a fault has occurred comprises:
- identifying a threshold on the input DC current.
9. The method of claim 8, wherein the threshold is 15% to identify a fault on the primary side.
10. The method of claim 8, wherein the threshold is 7% to identify a fault on the secondary side.
11. A system for detecting a fault in a three-phase dual active bridge converter, the system comprising:
- a dual active bridge converter comprising a primary side converter, a secondary side converter, and a transformer;
- an interface for measuring a current at an output terminal of the primary side converter, the interface coupled to an input of a low-pass filter;
- the low-pass filter configured to isolate a DC signal component derived from the measured current at the output terminal of the primary side converter;
- a controller adapted to perform the followings steps: detect polarity states of a DC signal component in each phase of the output terminal during one or more successive sampling intervals; compare the polarity states to a bias pattern; and matching the polarity states to a corresponding fault of the bias pattern during one or more sampling intervals.
12. The system according to claim 11, wherein detecting the polarity states of the DC signal further comprises comparing an input to an input coupled to a DC reference voltage.
Type: Application
Filed: Aug 8, 2021
Publication Date: Apr 14, 2022
Patent Grant number: 11870358
Inventors: Sagar K. Rastogi (Raleigh, NC), Brij N. Singh (West Fargo, ND)
Application Number: 17/396,739