Method of producing a semiconductor device

- Casio

A method of preparing a semiconductor device, comprising: forming an amorphous silicon layer on a substrate, and applying shots of an excimer laser beam to the amorphous silicon layer to convert the amorphous silicon layer into a polysilicon layer having a plurality of silicon grains, each of the grains having a grain size and including a crystallite having a crystallite size on the (111) plane, an average value of the crystallite sizes on the (111) plane of the crystallites included in the polysilicon layer being sixty percent or greater of an average value of the grain size.

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Claims

1. A method of producing a semiconductor device, comprising:

(a) forming an amorphous silicon layer on a substrate, and
(b) applying a plurality of shots of an excimer laser beam to a region of the amorphous silicon layer to convert the amorphous silicon layer into a polysilicon layer having a plurality of silicon grains, each of the grains having a grain size and including a crystallite having a crystallite size on the (111) plane, an average value of the crystallite sizes on the (111) plane of the crystallites included in the polysilicon layer being sixty percent or greater of an average value of the grain size.

2. The method according to claim 1, wherein the average value of the crystallite sizes on the (111) plane is 180 nm or greater.

3. The method according to claim 2, wherein the average value of the grain sizes of the silicon grains is greater than 200 nm.

4. The method according to claim 1, wherein the excimer layer beams are applied to the amorphous silicon layer twice.

5. The method according to claim 1, wherein the polysilicon layer has a thickness of 500 to 1500.ANG..

6. The method according to claim 1, wherein the amorphous silicon layer is formed by chemical vapor deposition.

7. The method according to claim 1, wherein the substrate is quartz.

8. The method according to claim 1, wherein the amorphous silicon layer is formed on the substrate at a temperature of 550.degree. C.

9. The method according to claim wherein 1, the excimer laser beams were applied to the amorphous silicon layer at a temperature of about 250.degree. C. and at an energy density of 300 mJ/cm.sup.2.

10. The method according to claim 4, wherein the amorphous silicon layer is formed by chemical vapor deposition, the polysilicon layer has a thickness of 500 to 1500.ANG., and the substrate is quartz.

11. A method of producing a semiconductor device, comprising:

(i) forming an amorphous silicon layer on a substrate, and
(ii) applying a plurality of shots of an excimer laser beam to a region of the amorphous silicon layer to convert the amorphous silicon layer into a polysilicon layer having a plurality of silicon grains, each of the grains having a grain size and including a crystallite having a crystallite size on the (111) plane, an average value of the crystallite sizes on the (111) plane of the crystallites included in the polysilicon layer being 100 nm to 300 nm, and being sixty percent or greater of an average value of the grain size.

12. The method according to claim 11, wherein the average value of the crystallite size of the (111) plane is 200 nm to 300 nm.

Referenced Cited
U.S. Patent Documents
4625224 November 25, 1986 Nakagawa et al.
4649624 March 17, 1987 Reedy
4693759 September 15, 1987 Noguchi et al.
5145808 September 8, 1992 Sameshima et al.
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5200846 April 6, 1993 Hiroki et al.
5365875 November 22, 1994 Asai et al.
5366926 November 22, 1994 Mei et al.
Foreign Patent Documents
2 573 916 May 1986 FRX
Other references
  • Einspruch, Norman, VLSI Handbook, pp. 181-185 (1985) no month. Roth, et al, "Effects of Impurities on the Kinetics of Nucleation and Growth in Amorphous Silicon" (1986) pp. 319-325, Materials Research Society, (No Month). Kumomi, et al, "Manipulation of Nucleation Sites in Solid-state Si Crystallization" (1991) pp. 3565-3567, Applied Physics Letters, 59, No. 27 (No Month). Patent Abstracts of Japan, vol. 007, No. 045 (E-160), Feb. 1983 of JP-A-57 194 517 (Tokyo Shibaura Denki KK) Nov. 1982. Patent Abstracts of Japan, vol. 013, No. 123 (E-773) Mar. 1989 of JP-A-63 292 618 (NEC Corp) Nov. 1988. Kobayashi, et al, "Recrystallization of Polycrystalline Silicon Islands on Fused Silica" (1983) pp. 35-38, Japanese Journal of Applied Physics, Supplements (No Month). Patent Abstracts of Japan, 014, No. 396 (E-0970) (1990) of JP-A-02 148 831 (Hitachi Ltd) Jun. 1990. Teruo Katoh, "Characteristics of MOSFET's on Large Grain Polysilicon Films" (1988), pp. 923-928, IEEE Transactions on Electron Devices, 35, No. 7 (No Month).
Patent History
Patent number: 5904550
Type: Grant
Filed: Nov 19, 1996
Date of Patent: May 18, 1999
Assignee: Casio Computer Co., Ltd. (Tokyo)
Inventor: Michiya Yamaguchi (Akishima)
Primary Examiner: Charles Bowers
Assistant Examiner: Matthew Whipple
Law Firm: Frishauf, Holtz, Goodman, Langer & Chick, P.C.
Application Number: 8/752,062
Classifications