Detection of shorted output pins
The rates of change and difference between signals sensed at adjacent electronic module output ports are determined and compared to criteria to determine whether the output ports are shorted.
Latest Kelsey-Hayes Company Patents:
This application claims the benefit of U.S. Provisional Application No. 61/072,257, filed Mar. 28, 2008, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTIONThis invention relates in general to testing of electronic modules and in particular to detection of shorted output pins on an inertial sensor package.
Electronic brake control systems for vehicles are becoming increasing sophisticated. Such braking systems usually include an Anti-Lock Brake System (ABS) and a Traction Control (TIC) System. Additionally, a Vehicle Stability Control (VSC) System may be provided. A VSC System typically monitors vehicle motion parameters and is operable to selectively activate the vehicle wheel brakes and/or modify engine performance to avoid potential unwanted vehicle motions, such as, for example, a vehicle roll-over. A plurality of motion sensors, such as accelerometers and angular rate sensors are utilized to sense vehicle motion. The signals generated by the motion sensor elements are typically modified by a signal conditioning circuit and then provided to a microprocessor in an Electronic Control Unit (ECU) of the electronic brake control system. The ECU microprocessor utilizes a stored algorithm to monitor the vehicle motion parameters, and, upon detecting a potential vehicle stability problem, the microprocessor initiates corrective action.
The motion sensors are typically packaged with supporting circuitry, with the package containing one or more accelerometers and/or one or more angular rate sensors. The sensor packages may also include signal conditioning circuitry. Key to successful operation of the VSC system is proper functioning of the motion sensors and signal conditioning circuitry. Typically, the output pins for the motion sensors are physically located to next to one another. Thus, there is a potential for the output pins to short out, either internally or externally. If the pins are shorted, an output signal will continue to be produced, but the output signal would be inaccurate. Accordingly, sensor modules are tested prior to installation in a vehicle subsystem and subjected to further testing with Built In Tests (BIT's) during operation subsequent to installation for potential output pin shorting. However, such BIT's may be limited. Therefore, it would be desirable to provide additional testing to assure that the output pins have not been shorted together.
SUMMARY OF THE INVENTIONThis invention relates to detection of shorted output pins on an inertial sensor package.
The invention contemplates a method for detecting shorted output pins on an electronic module that includes providing an electronic module having at least two output pins and sampling an output signal on each of the two output pins at a predetermined rate over a period of time. The difference between the output signals and a rate of change with respect to time for each of the output signals is calculated at each of the sampling times. A ratio of the rates of change is also calculated. The method then selects at least one of the calculated parameters for comparison to a decision criteria to determine whether or not a shorted output pin error flag should be set.
Various objects and advantages of this invention will become apparent to those skilled in the art from the following detailed description of the preferred embodiment, when read in light of the accompanying drawings.
The present invention contemplates a test method that includes sampling the output pins, or ports, for a motion sensor module, or package, that are being tested. The rates of change of the signals appearing at the sampled output pins are calculated and a ratio of the rates of change also is calculated. Additionally the difference between the output pin signals is computed. Selected ones of these calculated values are then compared to corresponding thresholds to determine whether or not the pins are shorted together. If the comparison fails, an error flag is set. The method also contemplates an optional feature that would require that the error condition continue for a period of time before the error flag is set.
Referring now to the drawings, there is illustrated in
The motion sensor module 10 includes two methods for output of the final acceleration signals. Analog signals are available at two analog signal output pins that are labeled 28 and 30 and are connected through the sensor signal conditioning circuitry to the X and Y acceleration sensors, respectively. Alternately, the analog output signals pass through an Analog to Digital (A/D) converter 34 and the resulting digital signals are then supplied to a Serial Peripheral Interface (SPI) 36 for digital communication. The SPI 36 may be utilized to provide synchronous serial communication between the sensor module 10 and the electronic brake system microprocessor (not shown). Use of the SPI 36 allows the microprocessor to control multiple modules, such as the sensor module 10 in a master-slave configuration.
The SPI 36 shown in
The sensor module 10 does not include a self test input pin, but the module does include an Auxiliary Input pin labeled “Aux in”. The Auxiliary Input pin is intended to utilize the Analog to Digital converter 34 in the sensor module 10 to reduce the Analog to Digital signal conversion load on the master microprocessor. For example, a digital accelerometer, such as the module 10, could receive an analog output signal from a rotational rate sensor (not shown), convert it to a digital signal and send the converted signal in a serial data format with the digital accelerometer data to the microprocessor over a digital bus (not shown). While the sensor module 10 is illustrated in block diagram form in
An algorithm that is in accordance with the invention that utilizes the derivatives of the output signals to detect shorted output pin conditions is illustrated by the flow chart shown in
The rates of change are compared in functional block 46. The invention contemplates utilizing one of three criteria for determining whether a shorted output pin condition exists. The criteria are shown next to the “COMPARE RATES OF CHANGE” functional box 46. The criteria include
-
- (1) Is the ratio of the rates of change greater than zero;
- (2) Is the product of the rates of change greater than zero; or
- (3) Are the signs of the rates of change the same?
Meeting any one of the above three criteria is indicative of the derivatives of the rates of change tracking together. Only one of the three criteria would be applied, hence, the flow chart shown inFIG. 5 represents three different embodiments of the invention.
The algorithm then advances to decision block 48 where it is determined whether or not the output pins are shorted together. If the pins are not shorted together, the algorithm transfers back to functional block 42 to begin another iteration of the algorithm. If the pins are indicated to be shorted together, the algorithm transfers to decision block 50.
In decision block 50, it is determined whether or not the shorted pin condition has continued to exist for a predetermined number of consecutive algorithm iterations. Thus, the intention of including decision block 50 is to avoid setting an error flag due to erroneous conditions existing on the output pins that may cause a false indication of shorted pins, such as noise causing a false reading. It is contemplated that a counter that is incremented when shorted pins are detected in decision block 48 may be utilized. The counter value would then be compared to a threshold to determine whether the fault has been present for the predetermined time. However, other methods also may be used. Additionally, if such a counter is used, it would be necessary to reset the counter upon a fault not being present in decision block 48 (not shown). If, in decision block 50, the shorted condition has not been present for the predetermined time period, the algorithm transfers back to functional block 42 to begin another iteration of the algorithm. If, on the other hand, the shorted condition has been present for the predetermined time period, the algorithm transfers to functional block 52 where an error flag is set. The algorithm then exits through block 54.
It is noted that decision block 50 is optional and that the invention also may be practiced without decision block 50; however, omission of decision block 50 will trigger the setting of an error flag upon a single occurrence of one of the shorted pin criteria.
In
In
Another embodiment of the invention is shown in
Yet another embodiment of the invention is illustrated by the flow charts shown in
In decision block 62 the status of the shorted output error flag is checked. If the error flag is set, the algorithm transfers back to functional block 42 in
In decision block 66, the contents of the timer, or counter, is compared to a timer threshold Tt. If the contents of the counter is less than or equal to the timer threshold Tt, the fault condition has not existed long enough to set the error flag and the algorithm transfers back to functional block 42 in
Returning now to decision 60, if both error conditions are not met, the algorithm advances along the right branch shown in
In decision block 76, the content of the counter is compared to zero. If the content of the counter is not equal to zero, the counter has not been zeroed and the algorithm transfers back to functional block 42 in
As described above and illustrated in
It will be appreciated that the flow charts described above are intended to be exemplary and that the invention also may be practiced with algorithms described by flow charts other than the ones shown in
In accordance with the provisions of the patent statutes, the principle and mode of operation of this invention have been explained and illustrated in its preferred embodiment. However, it must be understood that this invention may be practiced otherwise than as specifically explained and illustrated without departing from its spirit or scope.
Claims
1. A method for detecting shorted output pins on an electronic module, the method comprising:
- (a) providing an electronic module having at least two output pins;
- (b) sampling an output signal on each of the two electronic module output pins at a predetermined rate over a period of time;
- (c) calculating a rate of change with respect to time for each of the output signals sensed in step (b) at each of the sampling times;
- (d) calculating a ratio of the rates of change for each of the output signals at each of the sampling times;
- (e) calculating the difference between the output signals at each of the sampling times; and
- (f) selecting at least one of the calculated parameters for comparison to a decision criteria over the period of time to determine whether an error flag is to be set to indicate that a short circuit exists between the electronic module output pins sampled in step (b).
2. The method according to claim 1 wherein the decision criteria in step (f) includes a ratio threshold and a difference threshold and further wherein step (f) includes the following sub-steps:
- (f1) comparing the ratio of the rates of change for each of the output signals calculated in step (d) to the ratio threshold; and
- (f2) upon the ratio of the rates of change being greater than the ratio threshold, comparing the difference of the output signals calculated in step (e) to the difference threshold; and
- (f3) upon the differences of the output signals remaining less than the difference threshold for the period of time, setting the error flag.
3. The method according to claim 2 wherein the time period is a first time period and further wherein, upon the ratio of the rates of change calculated in step (c) remaining one of less than and equal to the difference threshold for a second time period, the error flag is reset.
4. The method according to claim 1 wherein the decision criteria in step (f) includes a difference threshold and a ratio threshold and further wherein step (f) includes the following sub-steps:
- (f1) deferring steps (c) and (d) until after the differences of the output signals calculated in step (e) have remained less than the difference threshold for the period of time; and
- (f2) calculating the rates of change and the ratio of the rates of change for each of the output signals at the end of the period of time; and
- (f3) comparing the ratio of the rates of change to the ratio threshold; and
- (f4) setting the error flag upon the ratio of the rates of change being greater than the ratio threshold.
5. The method according to claim 4 wherein the time period is a first time period and further wherein, upon the differences of the output signals calculated in step (e) remaining one of greater than and equal to the difference threshold for a second time period, the error flag is reset.
6. The method according to claim 1 wherein the decision criteria in step (f) includes a ratio threshold and a difference threshold and further wherein step (f) includes the following sub-steps:
- (f1) deferring step (e) until after the ratios of the rates of change for each of the output signals calculated in step (c) have remained greater than the ratio threshold for the period of time; and
- (f2) calculating the difference of the output signals at the end of the period of time; and
- (f3) comparing the difference to the output signals to the difference threshold; and
- (f4) setting the error flag upon the difference of the output signals being less than the difference threshold.
7. The method according to claim 6 wherein the time period is a first time period and further wherein, upon the ratio of the rates of change calculated in step (c) remaining one of less than and equal to the ratio threshold for a second time period, the error flag is reset.
8. The method according to claim 1 wherein the decision criteria in step (f) includes a difference threshold and further wherein step (f) includes the following sub-steps:
- (f1) comparing the ratio of the rates of change for each of the output signals for at least one sign change during the period of time; and
- (f2) upon the sign of the ratio of the rates of change changing, comparing the difference of the output signals calculated in step (e) to the difference threshold; and
- (f3) upon the differences of the output signals remaining less than the difference threshold for the period of time, setting the error flag.
9. A method for detecting shorted output pins on an electronic module, the method comprising:
- (a) providing an electronic module having at least two output pins;
- (b) sampling an output signal on each of the two output pins at a predetermined rate over a period of time;
- (c) calculating a rate of change with respect to time for each of the output signals sensed in step (b) at each of the sampling times;
- (d) calculating a ratio of the rates of change for each of the output signals at each of the sampling times;
- (e) calculating the difference between the output signals at each of the sampling times; and
- (f) comparing the difference of the output signals calculated in step (e) to a difference threshold;
- (g) comparing the ratio of the rates of change for each of the output signals calculated in step (d) to the ratio threshold upon the difference of the output signals being less than the difference threshold; and
- (h) setting an error flag upon the ratio of the rates of change remaining greater than a ratio threshold for the period of time.
10. The method according to claim 9 wherein the time period is a first time period and further wherein, upon the difference of the output signals calculated in step (e) remaining one of greater than and equal to the difference threshold for a second time period, the error flag is reset.
11. The method for detection according to claim 10 wherein the difference of the output signals is determined in step (e) only if either of the output signals is greater than an output signal threshold.
12. The method for detection according to claim 11 wherein the output signals are filtered before determining the difference of the output signals.
13. The method for detection according to claim 12 wherein the first period of time is a function of the length of time that the rate of change associated with one of the output pins exceeds zero.
14. The method according to claim 13 wherein the electronic module is a sensor module and further wherein each of the output pins is connected to a motion sensor.
15. A method for detecting shorted output pins on an electronic module, the method comprising:
- (a) providing an electronic module having at least two output pins;
- (b) sampling an output signal on each of the two output pins at a predetermined rate over a period of time;
- (c) calculating a rate of change with respect to time for each of the output signals sensed in step (b) at each of the sampling times;
- (d) multiplying the rates of change for each of the output signals calculated in step (c) together; and
- (e) monitoring the sign of the resulting product of the rates of change; and
- (f) calculating the difference of the output signals at the end of the period of time if the signs of the product of the rates of change have remained the same over the period of time; and
- (g) comparing the difference of the output signals to a difference threshold and,
- (h) setting an error flag upon the difference of the output signals being less than the difference threshold.
16. The method according to claim 15 wherein the time period is a first time period and further wherein, upon the signs of the product of the rates of change changing relative to one another at least once over a second time period, the error flag is reset.
17. A method for detecting shorted output pins on an electronic module, the method comprising:
- (a) providing an electronic module having at least two output pins;
- (b) sampling an output signal on each of the two electronic module output pins at a predetermined rate;
- (c) calculating a rate of change with respect to time for each of the output signals sensed in step (b) at each of the sampling times;
- (d) calculating a ratio of the rates of change for each of the output signals at each of the sampling times;
- (e) the ratio of the rates of change is compared to a decision criteria over the period of time to determine whether an error flag is to be set to indicate that a short circuit exists between the electronic module output pins sampled in step (b).
18. The method according to claim 17 in which the output signals are sampled in step (b) over a period of time and, in step (e), the ratio of the rates of change is compared to the decision criteria over the period of time to determine whether an error flag is to be set.
6051979 | April 18, 2000 | Chandler et al. |
6940299 | September 6, 2005 | Lim et al. |
7049842 | May 23, 2006 | Lopezdenava |
7075307 | July 11, 2006 | Williamson |
7106097 | September 12, 2006 | Whetsel |
20050134301 | June 23, 2005 | Lopezdenava |
20090277244 | November 12, 2009 | Doll et al. |
Type: Grant
Filed: Sep 3, 2008
Date of Patent: Aug 9, 2011
Assignee: Kelsey-Hayes Company (Livonia, MI)
Inventors: Wendy Zhang (Farmington Hills, MI), Arnold H. Spieker (Commerce Township, MI)
Primary Examiner: Bryan Bui
Attorney: MacMillan, Sobanski & Todd, LLC
Application Number: 12/203,585
International Classification: G01R 31/28 (20060101); H03K 19/173 (20060101);