Semiconductor device
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Description
The ornamental design of the present disclosure is a semiconductor device forming a case that may accommodate a plurality of semiconductor modules arranged in a line.
Claims
The ornamental design for a semiconductor device, as shown and described.
Referenced Cited
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Patent History
Patent number: D706232
Type: Grant
Filed: Jun 21, 2013
Date of Patent: Jun 3, 2014
Assignee: Fuji Electric Co., Ltd. (Kawasaki-shi, Kanagawa)
Inventor: Hideyo Nakamura (Kawasaki)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/458,663
Type: Grant
Filed: Jun 21, 2013
Date of Patent: Jun 3, 2014
Assignee: Fuji Electric Co., Ltd. (Kawasaki-shi, Kanagawa)
Inventor: Hideyo Nakamura (Kawasaki)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/458,663
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)