Door latch for semiconductor manufacturing equipment

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Description

FIG. 1 is a front, top and right side perspective view of a door latch for semiconductor manufacturing equipment showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a left side elevational view thereof;

FIG. 4 is a right side elevational view thereof;

FIG. 5 is a top plan view thereof;

FIG. 6 is a bottom plan view thereof.

FIG. 7 is a rear elevational view thereof;

FIG. 8 is a cross-sectional view take along line 8-8 in FIG. 2 thereof; and,

FIG. 9 is a perspective illustration indicating the state that a lock was opened.

The broken lines are included for the purpose of illustrating portions of the article that form no part of the claimed design.

Claims

We claim the ornamental design for a door latch for semiconductor manufacturing equipment, as shown and described.

Referenced Cited
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Foreign Patent Documents
3052630 December 1995 CN
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Patent History
Patent number: D918011
Type: Grant
Filed: Jun 10, 2019
Date of Patent: May 4, 2021
Assignee: KOKUSAI ELECTRIC CORPORATION (Tokyo)
Inventors: Makoto Sambu (Toyama), Satoshi Fujii (Toyama)
Primary Examiner: Keli L Hill
Assistant Examiner: Sara S Sahneh
Application Number: 29/694,323
Classifications
Current U.S. Class: D8/331