Using An Energy Beam Or Field, A Particle Beam Or Field, Or A Plasma (e.g., Mbe) Patents (Class 117/108)
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Publication number: 20140239307Abstract: A rare earth oxide gate dielectric on III-N material grown on a silicon substrate includes a single crystal stress compensating template positioned on a silicon substrate. The stress compensating template is substantially crystal lattice matched to the surface of the silicon substrate. A GaN structure is positioned on the surface of the stress compensating template and substantially crystal lattice matched thereto. An active layer of single crystal III-N material is grown on the GaN structure and substantially crystal lattice matched thereto. A single crystal rare earth oxide dielectric layer is grown on the active layer of III-N material.Type: ApplicationFiled: February 22, 2013Publication date: August 28, 2014Inventors: RYTIS DARGIS, ROBIN SMITH, ANDREW CLARK, ERDEM ARKUN, MICHAEL LEBBY
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Publication number: 20140230724Abstract: A method for depositing a magnesium oxide thin film on a substrate by a laser abrasion method using a sintered body or single crystal of magnesium oxide as a target. In this method, a flat processed film made of magnesium oxide having a (111) plane as its front surface is prepared, using a substrate made of strontium titanate having a (111) plane as its principal surface or yttria-stabilized zirconia having a (111) plane as its principal surface, by directly depositing a film on the principal surface of the substrate and epitaxially growing the film.Type: ApplicationFiled: March 9, 2012Publication date: August 21, 2014Applicant: JAPAN SCIENCE AND TECHNOLOGY AGENCYInventors: Tomofumi Susaki, Hideo Hosono, Tadahiro Fujihashi, Yoshitake Toda
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Patent number: 8803194Abstract: Semiconductor structures are provided comprising a substrate and a epitaxial layer formed over the substrate, wherein the epitaxial layer comprises B; and one or more element selected from the group consisting of Zr, Hf and Al and has a thickness greater than 50 nm. Further, methods for integrating Group III nitrides onto a substrate comprising, forming an epitaxial buffer layer of a diboride of Zr, Hf, Al, or mixtures thereof, over a substrate; and forming a Group III nitride layer over the buffer layer, are provided which serve to thermally decouple the buffer layer from the underlying substrate, thereby greatly reducing the strain induced in the semiconductor structures upon fabrication and/or operation.Type: GrantFiled: January 4, 2008Date of Patent: August 12, 2014Assignee: Arizona Board of Regents, a body corporate of the State of Arizona Acting for and on Behalf of Arizona State UniversityInventors: John Kouvetakis, Radek Roucka
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Publication number: 20140217554Abstract: A crystal laminate structure, in which crystals can be epitaxially grown on a ?-Ga2O3-based substrate with high efficiency to produce a high-quality ?-Ga2O3-based crystal film on the substrate; and a method for producing the crystal laminate structure are provided. The crystal laminate structure includes: a ?-Ga2O3-based substrate, of which the major face is a face that is rotated by 50 to 90° inclusive with respect to face; and a ?-Ga2O3-based crystal film which is formed by the epitaxial crystal growth on the major face of the ?-Ga2O3-based substrate.Type: ApplicationFiled: August 2, 2012Publication date: August 7, 2014Applicant: TAMURA CORPORATIONInventor: Kohei Sasaki
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Publication number: 20140212671Abstract: Growth of single- and few-layer macroscopically continuous graphene films on Co3O4(111) by molecular beam epitaxy (MBE) has been characterized using low energy electron diffraction (LEED), Auger electron spectroscopy (AES) and x-ray photoelectron spectroscopy (XPS). MBE of Co on sapphire(0001) at 750 K followed by annealing in UHV (1000 K) results in ˜3 monolayers (ML) of Co3O4(111) due to O segregation from the bulk. Subsequent MBE of C at 1000 K from a graphite source yields a graphene LEED pattern incommensurate with that of the oxide, indicating graphene electronically decoupled from the oxide, as well as a sp2 C(KVV) Auger lineshape, and ???* C(1s) XPS satellite. The data strongly suggest the ability to grow graphene on other structurally similar magnetic/magnetoelecric oxides, such as Cr2O3(111)/Si for spintronic applications.Type: ApplicationFiled: July 13, 2012Publication date: July 31, 2014Inventor: Jeffry Kelber
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Patent number: 8758510Abstract: A method is used for producing an SiC volume monocrystal by sublimation growth. During growth, by sublimation of a powdery SiC source material and by transport of the sublimated gaseous components into the crystal growth region, an SiC growth gas phase is produced there. The SiC volume monocrystal grows by deposition from the SiC growth gas phase on the SiC seed crystal. The SiC seed crystal is bent during a heating phase before such that an SiC crystal structure with a non-homogeneous course of lattice planes is adjusted, the lattice planes at each point have an angle of inclination relative to the direction of the center longitudinal axis and peripheral angles of inclination at a radial edge of the SiC seed crystal differ in terms of amount by at least 0.05° and at most by 0.2° from a central angle of inclination at the site of the center longitudinal axis.Type: GrantFiled: December 28, 2011Date of Patent: June 24, 2014Assignee: SiCrystal AktiengesellschaftInventors: Thomas Straubinger, Michael Vogel, Andreas Wohlfart
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Publication number: 20140158943Abstract: A method of producing at least one of microscopic and submicroscopic particles includes providing a template that has a plurality of discrete surface portions, each discrete surface portion having a surface geometry selected to impart a desired geometrical property to a particle while being produced; depositing a constituent material of the at least one of microscopic and submicroscopic particles being produced onto the plurality of discrete surface portions of the template to form at least portions of the particles; separating the at least one of microscopic and submicroscopic particles comprising the constituent material from the template into a fluid material, the particles being separate from each other at respective discrete surface portions of the template; and processing the template for subsequent use in producing additional at least one of microscopic and submicroscopic particles.Type: ApplicationFiled: September 12, 2013Publication date: June 12, 2014Applicant: The Regents of the University of CaliforniaInventor: Thomas G. Mason
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Patent number: 8728586Abstract: In large area plasma processing systems, process gases may be introduced to the chamber via the showerhead assembly which may be driven as an RF electrode. The gas feed tube, which is grounded, is electrically isolated from the showerhead. The gas feed tube may provide not only process gases, but also cleaning gases from a remote plasma source to the process chamber. The inside of the gas feed tube may remain at either a low RF field or a zero RF field to avoid premature gas breakdown within the gas feed tube that may lead to parasitic plasma formation between the gas source and the showerhead. By feeding the gas through an RF choke, the RF field and the processing gas may be introduced to the processing chamber through a common location and thus simplify the chamber design.Type: GrantFiled: July 11, 2008Date of Patent: May 20, 2014Assignee: Applied Materials, Inc.Inventors: Jozef Kudela, Carl A. Sorensen, John M. White
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Patent number: 8728235Abstract: A manufacturing method for three-dimensional GaN epitaxial structure comprises a disposing step, in which a substrate of LiAlO2 and a source metal of Ga are disposed inside an vacuum chamber. An exposing step is importing N ions in plasma state and generated by a nitrogen source into the chamber. A heating step is heating up the source metal to generate Ga vapor. A growing step is forming a three-dimensional GaN epitaxial structure with hexagonal micropyramid or hexagonal rod having a broadened disk-like surface on the substrate by reaction between the Ga vapor and the plasma state of N ions.Type: GrantFiled: September 28, 2009Date of Patent: May 20, 2014Assignee: National Sun Yat-Sen UniversityInventors: I-Kai Lo, Chia-Ho Hsieh, Yu-Chi Hsu, Wen-Yuan Pang, Ming-Chi Chou
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Patent number: 8685165Abstract: Atomic layer deposition (ALD) type processes for producing titanium containing oxide thin films comprise feeding into a reaction space vapor phase pulses of titanium alkoxide as a titanium source material and at least one oxygen source material, such as ozone, capable of forming an oxide with the titanium source material. In preferred embodiments the titanium alkoxide is titanium methoxide.Type: GrantFiled: September 28, 2007Date of Patent: April 1, 2014Assignee: ASM International N.V.Inventors: Antti Rahtu, Raija Matero, Markku Leskela, Mikko Ritala, Timo Hatanpaa, Timo Hanninen, Marko Vehkamaki
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Patent number: 8673254Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.Type: GrantFiled: March 4, 2011Date of Patent: March 18, 2014Assignee: Nippon Steel & Sumitomo Metal CorporationInventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
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Publication number: 20140065368Abstract: This disclosure relates to methods that include depositing a first component and a second component to form a film including a plurality of nanostructures, and coating the nanostructures with a hydrophobic layer to render the film superhydrophobic. The first component and the second component can be immiscible and phase-separated during the depositing step. The first component and the second component can be independently selected from the group consisting of a metal oxide, a metal nitride, a metal oxynitride, a metal, and combinations thereof. The films can have a thickness greater than or equal to 5 nm; an average surface roughness (Ra) of from 90 to 120 nm, as measured on a 5 ?m×5 ?m area; a surface area of at least 20 m2/g; a contact angle with a drop of water of at least 120 degrees; and can maintain the contact angle when exposed to harsh conditions.Type: ApplicationFiled: August 28, 2012Publication date: March 6, 2014Applicant: UT-BATTELLE, LLCInventors: Tolga AYTUG, Mariappan Parans PARANTHAMAN, John T. SIMPSON, Daniela Florentina BOGORIN
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Patent number: 8647434Abstract: An apparatus and process for fast epitaxial deposition of compound semiconductor layers includes a low-energy, high-density plasma generating apparatus for plasma enhanced vapor phase epitaxy. The process provides in one step, combining one or more metal vapors with gases of non-metallic elements in a deposition chamber. Then highly activating the gases in the presence of a dense, low-energy plasma. Concurrently reacting the metal vapor with the highly activated gases and depositing the reaction product on a heated substrate in communication with a support immersed in the plasma, to form a semiconductor layer on the substrate. The process is carbon-free and especially suited for epitaxial growth of nitride semiconductors at growth rates up to 10 nm/s and substrate temperatures below 1000° C. on large-area silicon substrates. The process requires neither carbon-containing gases nor gases releasing hydrogen, and in the absence of toxic carrier or reagent gases, is environment friendly.Type: GrantFiled: February 28, 2006Date of Patent: February 11, 2014Assignee: Sulzer Metco AGInventor: Hans Von Kaenel
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Patent number: 8647436Abstract: Isotopically-enriched graphene and isotope junctions are epitaxially grown on a catalyst substrate using a focused carbon ion beam technique. The focused carbon ion beam is filtered to pass substantially a single ion species including a single desired carbon isotope. The ion beam and filtering together provide a means to selectively isotopically-enrich the epitaxially-grown graphene from given carbon precursor and to selectively deposit graphene enriched with different carbon isotopes in different regions.Type: GrantFiled: October 20, 2010Date of Patent: February 11, 2014Assignees: Raytheon Company, The Arizona Board of RegentsInventors: Delmar L. Barker, William R. Owens, John Warren Beck
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Patent number: 8628615Abstract: An apparatus and methods of forming the apparatus include a film of transparent conductive titanium-doped indium oxide for use in a variety of configurations and systems. The film of transparent conductive titanium-doped indium oxide may be structured as one or more monolayers. The film of transparent conductive titanium-doped indium oxide may be formed using atomic layer deposition.Type: GrantFiled: September 14, 2012Date of Patent: January 14, 2014Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Publication number: 20130333611Abstract: A lattice matching layer for use in a multilayer substrate structure comprises a lattice matching layer. The lattice matching layer includes a first chemical element and a second chemical element. Each of the first and second chemical elements has a hexagonal close-packed structure at room temperature that transforms to a body-centered cubic structure at an ?-? phase transition temperature higher than the room temperature. The hexagonal close-packed structure of the first chemical element has a first lattice parameter. The hexagonal close-packed structure of the second chemical element has a second lattice parameter. The second chemical element is miscible with the first chemical element to form an alloy with a hexagonal close-packed structure at the room temperature. A lattice constant of the alloy is approximately equal to a lattice constant of a member of group III-V compound semiconductors.Type: ApplicationFiled: March 11, 2013Publication date: December 19, 2013Applicant: Tivra CorporationInventors: Indranil De, Francisco Machuca
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Publication number: 20130313603Abstract: A wavelength converter for an LED is described that comprises a substrate of monocrystalline garnet having a cubic crystal structure, a first lattice parameter and an oriented crystal face. An epitaxial layer is formed directly on the oriented crystal face of the substrate. The layer is comprised of a monocrystalline garnet phosphor having a cubic crystal structure and a second lattice parameter that is different from the first lattice parameter wherein the difference between the first lattice parameter and the second lattice parameter results in a lattice mismatch within a range of ±15%. The strain induced in the phosphor layer by the lattice mismatch shifts the emission of the phosphor to longer wavelengths when a tensile strain is induced and to shorter wavelengths when a compressive strain is induced. Preferably, the wavelength converter is mounted on the light emitting surface of a blue LED to produce an LED light source.Type: ApplicationFiled: January 31, 2012Publication date: November 28, 2013Applicant: OSRAM SYLVANIA INC.Inventors: Darshan Kundaliya, Madis Raukas, Adam M. Scotch, David Hamby, Kailash Mishra, Matthew Stough
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Patent number: 8591650Abstract: It is an object to provide a method for forming a crystalline semiconductor film in which a transition layer is not formed or which includes a thinner transition layer than that in a crystalline semiconductor film which is formed by conventional method, and a method for manufacturing a thin film transistor to which the above method is applied. A semiconductor film including hydrogen is formed over a substrate or over an insulating film formed over a substrate. The semiconductor film including hydrogen undergoes surface wave plasma treatment, which is performed in a gas including hydrogen and/or a rare gas, to generate a crystal nucleus in the semiconductor film including hydrogen. The crystal nucleus is grown to form a crystalline semiconductor film by employing a plasma CVD method.Type: GrantFiled: November 25, 2008Date of Patent: November 26, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Satoshi Toriumi
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Patent number: 8591653Abstract: A compound semiconductor single-crystal manufacturing device (1) is furnished with: a laser light source (6) making it possible to sublime a source material by directing a laser beam onto the material; a reaction vessel (2) having a laser entry window (5) through which the laser beam output from the laser light source (6) can be transmitted to introduce the beam into the vessel interior, and that is capable of retaining a starting substrate (3) where sublimed source material is recrystallized; and a heater (7) making it possible to heat the starting substrate (3). The laser beam is shone on, to heat and thereby sublime, the source material within the reaction vessel (2), and compound semiconductor single crystal is grown by recrystallizing the sublimed source material onto the starting substrate (3); afterwards the laser beam is employed to separate the compound semiconductor single crystal from the starting substrate (3).Type: GrantFiled: March 6, 2009Date of Patent: November 26, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Issei Satoh, Naho Mizuhara, Keisuke Tanizaki, Michimasa Miyanaga, Takashi Sakurada, Hideaki Nakahata
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Patent number: 8585820Abstract: Methods for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, or for wafers. The equipment and methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. The method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber to form the semiconductor material; removing exhaust gases including unreacted Group III precursor, unreacted Group V component and reaction byproducts; and heating the exhaust gases to a temperature sufficient to reduce condensation thereof and enhance manufacture of the semiconductor material. Advantageously, the exhaust gases are heated to sufficiently avoid condensation to facilitate sustained high volume manufacture of the semiconductor material.Type: GrantFiled: November 15, 2007Date of Patent: November 19, 2013Assignee: SoitecInventors: Chantal Arena, Christiaan Werkhoven
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Patent number: 8574528Abstract: A method of growing an epitaxial layer on a substrate is generally provided. According to the method, the substrate is heated in a chemical vapor deposition chamber to a growth temperature in the presence of a carbon source gas, then the epitaxial layer is grown on the substrate at the growth temperature, and finally the substrate is cooled in a chemical vapor deposition chamber to at least about 80% of the growth temperature in the presence of a carbon source gas. Substrates formed from this method can have a carrier lifetime between about 0.25 ?s and about 9.9 ?s.Type: GrantFiled: September 7, 2010Date of Patent: November 5, 2013Assignee: University of South CarolinaInventors: Tangali S. Sudarshan, Amitesh Srivastava
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Patent number: 8545627Abstract: Semiconductor structures are provided comprising a substrate and a epitaxial layer formed over the substrate, wherein the epitaxial layer comprises B; and one or more element selected from the group consisting of Zr, Hf and Al and has a thickness greater than 50 nm. Further, methods for integrating Group III nitrides onto a substrate comprising, forming an epitaxial buffer layer of a diboride of Zr, Hf, Al, or mixtures thereof, over a substrate; and forming a Group III nitride layer over the buffer layer, are provided which serve to thermally decouple the buffer layer from the underlying substrate, thereby greatly reducing the strain induced in the semiconductor structures upon fabrication and/or operation.Type: GrantFiled: April 12, 2011Date of Patent: October 1, 2013Assignee: Arizona Board of RegentsInventors: John Kouvetakis, Radek Roucka
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Patent number: 8540817Abstract: There are provided a method for manufacturing a Si(1-v-w-x)CwAlxNv substrate having a reduced number of cracks and high processability, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer (0<v<1, 0<w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate at a temperature below 550° C.Type: GrantFiled: April 17, 2009Date of Patent: September 24, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Issei Satoh, Michimasa Miyanaga, Shinsuke Fujiwara, Hideaki Nakahata
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Publication number: 20130240876Abstract: The present invention relates to a method for growing a novel non-polar (13 40) plane epitaxy layer of wurtzite structure, which comprises the following steps: providing a single crystal oxide with perovskite structure; using a plane of the single crystal oxide as a substrate; and forming a non-polar (13 40) plane epitaxy layer of wurtzite semiconductors on the plane of the single crystal oxide by a vapor deposition process. The present invention also provides an epitaxy layer having non-polar (13 40) plane obtained according to the aforementioned method.Type: ApplicationFiled: March 13, 2013Publication date: September 19, 2013Applicant: NATIONAL CHIAO TUNG UNIVERSITYInventors: Li CHANG, Yen-Teng HO
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Publication number: 20130177995Abstract: An oxygen sensor includes an epitaxial oxide thin film double perovskite oxygen sensor formed on a single crystal oxide substrate. The thin film includes a lanthanide element, barium, cobalt, and oxygen.Type: ApplicationFiled: December 4, 2012Publication date: July 11, 2013Applicant: BOARD OF REGENTS OF THE UNIVERSITY OF TEXAS SYSTEMInventor: Board Of Regents Of The University Of Texas System
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Patent number: 8449671Abstract: A method of fabricating an SiC single crystal includes (a) physical vapor transport (PVT) growing a SiC single crystal on a seed crystal in the presence of a temperature gradient, wherein an early-to-grow portion of the SiC single crystal is at a lower temperature than a later-to-grow portion of the SiC single crystal. Once grown, the SiC single crystal is annealed in the presence of a reverse temperature gradient, wherein the later-to-grow portion of the SiC single crystal is at a lower temperature than the early-to-grow portion of the SiC single crystal.Type: GrantFiled: June 26, 2008Date of Patent: May 28, 2013Assignee: II-VI IncorporatedInventors: Ping Wu, Ilya Zwieback, Avinesh K. Gupta, Edward Semenas
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Patent number: 8444765Abstract: A method for large-scale manufacturing of gallium nitride includes a process for reducing and/or minimizing contamination in the crystals, for solvent addition to an autoclave, for improving or optimizing the solvent atmosphere composition, for removal of the solvent from the autoclave, and for recycling of the solvent. The method is scalable up to large volumes and is cost effective.Type: GrantFiled: September 6, 2011Date of Patent: May 21, 2013Assignee: Soraa, Inc.Inventor: Mark P. D'Evelyn
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Patent number: 8410478Abstract: A p-type MgxZn1-xO-based thin film (1) is formed on a substrate (2) made of a ZnO-based semiconductor. The p-type MgxZn1-xO-based thin film (1) is composed so that X as a ratio of Mg with respect to Zn therein can be 0?X<1, preferably 0?X?0.5. In the p-type MgZnO thin film (1), nitrogen as p-type impurities which become an acceptor is contained at a concentration of approximately 5.0×1018 cm?3 or more. The p-type MgZnO thin film (1) is composed so that n-type impurities made of a group IV element such as silicon that becomes a donor can have a concentration of approximately 1.0×1017 cm?3 or less. The p-type MgZnO thin film (1) is composed so that n-type impurities made of a group III element such as boron and aluminum which become a donor can have a concentration of approximately 1.0×1016 cm?3 or less.Type: GrantFiled: August 1, 2008Date of Patent: April 2, 2013Assignee: Rohm Co., Ltd.Inventors: Ken Nakahara, Hiroyuki Yuji, Kentaro Tamura, Shunsuke Akasaka, Masashi Kawasaki, Akira Ohtomo, Atsushi Tsukazaki
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Patent number: 8409351Abstract: A method to grow a boule of silicon carbide is described. The method may include flowing a silicon-containing precursor and a carbon-containing precursor proximate to a heated filament array and forming the silicon carbide boule on a substrate from reactions of the heated silicon-containing and carbon-containing precursors. Also, an apparatus for growing a silicon carbide boule is described. The apparatus may include a deposition chamber to deposit silicon carbide on a substrate, and a precursor transport system for introducing silicon-containing and carbon-containing precursors into the deposition chamber. The apparatus may also include at least one filament or filament segment capable of being heated to a temperature that can activate the precursors, and a substrate pedestal to hold a deposition substrate upon which the silicon carbide boule is grown. The pedestal may be operable to change the distance between the substrate and the filament as the silicon carbide boule is grown.Type: GrantFiled: August 5, 2008Date of Patent: April 2, 2013Assignee: SiC Systems, Inc.Inventors: Joshua Robbins, Michael Seman
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Patent number: 8394197Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.Type: GrantFiled: July 11, 2008Date of Patent: March 12, 2013Assignee: Sub-One Technology, Inc.Inventors: Andrew W. Tudhope, Thomas B. Casserly, Karthik Boinapally, Deepak Upadhyaya, William J. Boardman
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Patent number: 8377205Abstract: The present disclosure relates to an apparatus for producing silicon nanocrystals, which can minimize plasma diffusion by finely adjusting a plasma region created by an ICP coil. The apparatus includes a reactor having an ICP coil wound around an outer wall thereof and a tube inserted into the reactor, wherein a primary gas for forming silicon nanocrystals and a secondary gas for surface reaction of the silicon nanocrystals are separately supplied to the reactor through an inner side and an outer side of the tube, respectively.Type: GrantFiled: October 26, 2009Date of Patent: February 19, 2013Assignee: Korea Institute of Energy ResearchInventors: Bo-Yun Jang, Chang-Hyun Ko, Jeong-Chul Lee, Joon-Soo Kim, Joo-Seok Park
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Patent number: 8328936Abstract: A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.Type: GrantFiled: October 18, 2011Date of Patent: December 11, 2012Assignee: Nippon Telegraph and Telephone CorporationInventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
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Publication number: 20120260851Abstract: A method of manufacturing a zinc oxide-based thin film for a transparent electrode and a zinc oxide-based thin film manufactured using the method, in which both conductivity and transmittance can be improved. The method includes the step of forming a transparent oxide thin film doped with a dopant on a transparent substrate, and the step of rapidly heat-treating the transparent oxide thin film.Type: ApplicationFiled: April 17, 2012Publication date: October 18, 2012Applicant: SAMSUNG CORNING PRECISION MATERIALS CO., LTD.Inventors: YoungZo Yoo, SeoHyun Kim, JeongWoo Park, Taejung Park, Gun Sang Yoon
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Patent number: 8268076Abstract: SOI wafers are manufactured by forming on a silicon substrate a monocrystalline first, cubic 1a-3 metal or mixed metal oxide layer whose lattice constant differs from that of the substrate by 5% or less; forming a second cubic 1a-3 mixed metal oxide layer having a lattice constant within 2% of the lattice constant of the first metal or mixed metal oxide layer, and having a graded metal content to vary the lattice content in the second mixed metal oxide layer from that of the first layer, and thermally treating the layered product in an oxygen atmosphere to form an amorphous interlayer between the substrate and the first metal or mixed metal oxide layer.Type: GrantFiled: May 13, 2010Date of Patent: September 18, 2012Assignee: Siltronic AGInventors: Thomas Schroeder, Peter Storck, Hans Joachim Muessig
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Patent number: 8268075Abstract: A method of producing a zinc oxide-based semiconductor crystal, including: introducing at least zinc and oxygen on a surface of a substrate; and growing a zinc oxide-based semiconductor crystal on the substrate, wherein a total or partial portion of the zinc is ionized in a vacuum atmosphere of 1×10?4 Torr or less and is introduced to the surface of the substrate to grow the ZnO based semiconductor crystal. As a result, it is possible to provide a method of producing a zinc oxide based semiconductor crystal capable of growing a zinc oxide semiconductor crystal having excellent surface flatness and crystallinity and including an extremely small amount of impurities at a high growth rate.Type: GrantFiled: June 22, 2007Date of Patent: September 18, 2012Assignees: Fujikura Ltd., Chiba UniversityInventors: Koji Omichi, Yoshikazu Kaifuchi, Munehisa Fujimaki, Akihiko Yoshikawa
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Patent number: 8262796Abstract: A thin-film single crystal growing method includes preparing a substrate, irradiating an excitation beam on a metallic target made of a pure metal or an alloy in a predetermined atmosphere, and combining chemical species including any of atoms, molecules, and ions released from the metallic target by irradiation of the excitation beam with atoms contained in the predetermined atmosphere to form a thin film on the substrate.Type: GrantFiled: March 15, 2010Date of Patent: September 11, 2012Assignee: Waseda UniversityInventors: Noboru Ichinose, Kiyoshi Shimamura, Kazuo Aoki, Encarnacion Antonia Garcia Villora
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Patent number: 8252112Abstract: A method and apparatus for the unusually high rate deposition of thin film materials on a stationary or continuous substrate. The method includes delivery of a pre-selected precursor intermediate to a deposition chamber and formation of a thin film material from the intermediate. The intermediate is formed outside of the deposition chamber and includes a metastable species such as a free radical. The intermediate is pre-selected to include a metastable species conducive to the formation of a thin film material having a low defect concentration. By forming a low defect concentration material, deposition rate is decoupled from material quality and heretofore unprecedented deposition rates are achieved. In one embodiment, the pre-selected precursor intermediate is SiH3.Type: GrantFiled: September 12, 2008Date of Patent: August 28, 2012Assignee: Ovshinsky Innovation, LLCInventor: Stanford R. Ovshinsky
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Patent number: 8226767Abstract: “Super-hetero-epitaxial” combinations comprise epitaxial growth of one material on a different material with different crystal structure. Compatible crystal structures may be identified using a “Tri-Unity” system. New bandgap engineering diagrams are provided for each class of combination, based on determination of hybrid lattice constants for the constituent materials in accordance with lattice-matching equations. Using known bandgap figures for previously tested materials, new materials with lattice constants that match desired substrates and have the desired bandgap properties may be formulated by reference to the diagrams and lattice matching equations. In one embodiment, this analysis makes it possible to formulate new super-hetero-epitaxial semiconductor systems, such as systems based on group IV alloys on c-plane LaF3; group IV alloys on c-plane langasite; Group III-V alloys on c-plane langasite; and group II-VI alloys on c-plane sapphire.Type: GrantFiled: October 20, 2008Date of Patent: July 24, 2012Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Yeonjoon Park, Sang H. Choi, Glen C. King, James R. Elliott
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Patent number: 8221548Abstract: A process for producing a diamond thin-film includes forming a diamond crystal thin-film on a substrate and firing the diamond crystal thin-film at a sufficient temperature under high pressure under which a diamond is stable. A diamond single-crystal substrate having a diamond single-crystal thin-film formed thereon is placed in an ultra-high-pressure and high-temperature firing furnace to anneal the diamond single-crystal thin-film under the conditions of 1200° C. and 6 GPa.Type: GrantFiled: January 31, 2008Date of Patent: July 17, 2012Assignee: Nippon Telegraph and Telephone CorporationInventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
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Publication number: 20120177902Abstract: Multiferroic articles including highly resistive, strongly ferromagnetic strained thin films of BiFe0.5Mn0.5O3 (“BFMO”) on (001) strontium titanate and Nb-doped strontium titanate substrates were prepared. The films were tetragonal with high epitaxial quality and phase purity. The magnetic moment and coercivity values at room temperature were 90 emu/cc (H=3 kOe) and 274 Oe, respectively. The magnetic transition temperature was strongly enhanced up to approximately 600 K, which is approximately 500 K higher than for pure bulk BiMnO3.Type: ApplicationFiled: September 1, 2011Publication date: July 12, 2012Inventors: Judith L. Driscoll, Quanxi Jia
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Patent number: 8216368Abstract: A method of forming an epitaxially grown layer, preferably by providing a region of weakness in a support substrate and transferring a nucleation portion to the support substrate by bonding. A remainder portion of the support substrate is detached at the region of weakness and an epitaxial layer is grown on the nucleation portion. The remainder portion is separated or otherwise removed from the support portion.Type: GrantFiled: September 3, 2009Date of Patent: July 10, 2012Assignee: SoitecInventors: Bruce Faure, Fabrice Letertre
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Patent number: 8216367Abstract: A method for producing a silicon carbide layer on a surface of a silicon substrate includes the step of irradiating the surface of the silicon substrate heated in a high vacuum at a temperature in a range of from 500° C. to 1050° C. with a hydrocarbon-based gas as well as an electron beam to form a cubic silicon carbide layer on the silicon substrate surface.Type: GrantFiled: May 23, 2006Date of Patent: July 10, 2012Assignee: Showa Denko K.K.Inventor: Takashi Udagawa
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Patent number: 8197596Abstract: A crystal growth process comprising providing a reactor having a crucible with an injector apparatus and a seed holder. The injector apparatus has an inner gas conduit and an outer gas conduit wherein an inert gas is introduced into the outer conduit. The injector apparatus has an upper injector and a lower injector and a gap therebetween. The upper injector temperature is maintained at a higher temperature than the lower injector.Type: GrantFiled: July 27, 2007Date of Patent: June 12, 2012Assignee: Pronomic Industry ABInventors: Olof Claes Erik Kordina, Shailaja Rao
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Publication number: 20120112320Abstract: A production process for a nitride semiconductor crystal, comprising growing a semiconductor layer on a seed substrate to obtain a nitride semiconductor crystal, wherein the seed substrate comprises a plurality of seed substrates made of the same material, at least one of the plurality of seed substrates differs in the off-angle from the other seed substrates, and a single semiconductor layer is grown by disposing the plurality of seed substrates in a semiconductor crystal production apparatus, such that when the single semiconductor layer is grown on the plurality of seed substrates, the off-angle distribution in the single semiconductor layer becomes smaller than the off-angle distribution in the plurality of seed substrates.Type: ApplicationFiled: December 1, 2011Publication date: May 10, 2012Applicant: MITSUBISHI CHEMICAL CORPORATIONInventors: Shuichi KUBO, Kenji Shimoyama, Kazumasa Kiyomi, Kenji Fujito, Yutaka Mikawa
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Publication number: 20120098102Abstract: A method of reducing threading dislocation densities in non-polar such as a-{11-20} plane and m-{1-100} plane or semi-polar such as {10-1n} plane III-Nitrides by employing lateral epitaxial overgrowth from sidewalls of etched template material through a patterned mask. The method includes depositing a patterned mask on a template material such as a non-polar or semi polar GaN template, etching the template material down to various depths through openings in the mask, and growing non-polar or semi-polar III-Nitride by coalescing laterally from the tops of the sidewalls before the vertically growing material from the trench bottoms reaches the tops of the sidewalls. The coalesced features grow through the openings of the mask, and grow laterally over the dielectric mask until a fully coalesced continuous film is achieved.Type: ApplicationFiled: April 25, 2011Publication date: April 26, 2012Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Bilge M. Imer, James S. Speck, Steven P. DenBaars
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Patent number: 8163086Abstract: A physical vapor transport growth technique for silicon carbide is disclosed. The method includes the steps of introducing a silicon carbide powder and a silicon carbide seed crystal into a physical vapor transport growth system, separately introducing a heated silicon-halogen gas composition into the system in an amount that is less than the stoichiometric amount of the silicon carbide source powder so that the silicon carbide source powder remains the stoichiometric dominant source for crystal growth, and heating the source powder, the gas composition, and the seed crystal in a manner that encourages physical vapor transport of both the powder species and the introduced silicon-halogen species to the seed crystal to promote bulk growth on the seed crystal.Type: GrantFiled: August 29, 2007Date of Patent: April 24, 2012Assignee: Cree, Inc.Inventors: Stephan G. Mueller, Hudson M. Hobgood, Valeri F. Tsvetkov
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Piezoelectric substrate, piezoelectric element, liquid discharge head and liquid discharge apparatus
Patent number: 8137461Abstract: A piezoelectric substrate of a perovskite-type oxide is expressed by a general formula of ABO3 having a laminate structure of a single crystal structure or a uniaxial crystal structure expressed by (Pb1-xMx)xm(ZryTi1-y)O3 (where M represents an element selected from La, Ca, Ba, Sr, Bi, Sb and W). The laminate structure has a first crystal phase layer having a crystal structure selected from a tetragonal structure, a rhombohedral structure, a pseudocubic structure and a monoclinic structure, a second crystal phase layer having a crystal structure different from the crystal structure of said first crystal phase layer and a boundary layer arranged between the first crystal phase layer and the second crystal phase layer with a crystal structure gradually changing in a thickness direction of the layer. The thicknesses of the first and second crystal phase layer differ.Type: GrantFiled: September 4, 2009Date of Patent: March 20, 2012Assignee: Canon Kabushiki KaishaInventors: Takanori Matsuda, Toshihiro Ifuku -
Patent number: 8137459Abstract: The inventive method for producing nanoparticles for ferrofluids by electron-beam evaporation and condensation in vacuum, consists in evaporating an initial solid material and in fixing nanoparticles to a cooled substrate by means of a solidifiable carrier during vapour condensation, wherein a solid inorganic material, which is selected from a group containing metals, alloys or oxides thereof, is used as an initial material and a solid liquid-soluble material is used as a magnetic carrier material for fixing nanoparticles. The method also consists in simultaneously evaporating the initial material and the carrier composition by electron-beam heating. The vapour is deposited on the substrate, the temperature which is lower than the melting point of the carrier material, and the condensate of the magnetic material nanoparticles, which have a size and are fixed in the carrier, is produced. The particle size is adjusted by setting the specified temperature of the substrate during vapour deposition.Type: GrantFiled: August 22, 2007Date of Patent: March 20, 2012Assignee: State Enterprise “International Center For Electron Beam Technologies of E.O. Paton Electric Welding Institute of National Academy of Sciences of Ukraine”Inventors: Boris Paton, Boris Movchan, Iurii Kurapov
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Patent number: 8137458Abstract: A ZnO crystal growth method has the steps of (a) preparing a substrate having a surface capable of growing ZnO crystal exposing a Zn polarity plane; (b) supplying Zn and O above the surface of the substrate by alternately repeating a Zn-rich condition period and an O-rich condition period; and (c) supplying conductivity type determining impurities above the surface of the substrate while Zn and O are supplied at the step (b).Type: GrantFiled: February 8, 2008Date of Patent: March 20, 2012Assignee: Stanley Electric Co., Ltd.Inventors: Hiroyuki Kato, Michihiro Sano
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Patent number: 8123859Abstract: A method and apparatus for producing bulk single crystals of AlN having low dislocation densities of about 10,000 cm?2 or less includes a crystal growth enclosure with Al and N2 source material therein, capable of forming bulk crystals. The apparatus maintains the N2 partial pressure at greater than stoichiometric pressure relative to the Al within the crystal growth enclosure, while maintaining the total vapor pressure in the crystal growth enclosure at super-atmospheric pressure. At least one nucleation site is provided in the crystal growth enclosure, and provision is made for cooling the nucleation site relative to other locations in the crystal growth enclosure. The Al and N2 vapor is then deposited to grow single crystalline low dislocation density AlN at the nucleation site. High efficiency ultraviolet light emitting diodes and ultraviolet laser diodes are fabricated on low defect density AlN substrates, which are cut from the low dislocation density AlN crystals.Type: GrantFiled: July 22, 2010Date of Patent: February 28, 2012Assignee: Crystal IS, Inc.Inventors: Leo J. Schowalter, Glen A. Slack, J. Carlos Rojo