With A Step Of Measuring, Testing, Or Sensing Patents (Class 117/85)
  • Patent number: 6923859
    Abstract: Disclosed are an apparatus for manufacturing GaN substrate and a manufacturing method thereof enabling to prevent micro-cracks or bending of a GaN substrate by separating a substrate and a GaN layer from each other after growing the GaN layer on the substrate in the same chamber. The present invention includes a chamber for loading a substrate therein, a heating means heating the chamber, a Ga boat installed inside the chamber to receive a Ga molecule producing material, an injection pipe injecting a nitrogen molecule producing gas in the chamber, the nitrogen molecule producing gas reacting chemically on the Ga molecule producing material to form a GaN layer on the substrate, and a transparent window at a circumference of the chamber to apply a laser beam to the substrate.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: August 2, 2005
    Assignee: LG Electronics Inc.
    Inventor: Chin Kyo Kim
  • Patent number: 6881259
    Abstract: Analysis of residual gases from a process for depositing a film containing silicon on a crystalline silicon surface to determine partial pressure of hydrogen evolved during deposition develops a signature which indicates temperature and/or concentration of germanium at the deposition surface. Calibration and collection of hydrogen partial pressure data at a rate which is high relative to film deposition rate allows real-time, in-situ, non-destructive determination of material concentration profile over the thickness of the film and/or monitoring the temperature of a silicon film deposition process with increased accuracy and resolution to provide films of a desired thickness with high accuracy.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: April 19, 2005
    Assignee: International Business Machines Corporation
    Inventors: David C. Ahlgren, Jack Oon Chu, Basanth Jagannathan, Ryan W. Wuthrich
  • Patent number: 6860138
    Abstract: A method of preventing the scrapping of semiconductor substrates due to improper deposition of thin films in a thin film vaporization system is disclosed. This is accomplished by providing a method of self-calibrating and testing the flow of liquid precursors in the vaporization system prior to the start of the deposition process. The vaporization of the liquid precursor in the deposition chamber and the concomitant pressure change in the chamber are correlated. This correlation is then used as a real time monitoring mechanism for self-calibrating and testing the flow of liquid precursors through the vaporization system. That the pressure change due to vaporization in the chamber is used as the key parameter, the thin film deposition is hence monitored by that parameter which directly predicts the film deposition characteristics. Consequently, each thin film run is assured of a successful run.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: March 1, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chung-Ju Hsieh, Hsi-Wen Liao, Kai-Hsin Liu, Tsu-Kuang Hou
  • Patent number: 6836532
    Abstract: A biological crystal formation screening apparatus uses an x-ray diffraction technique to analyze the sample containers of a sample tray for the presence of crystal formation. An x-ray source is directed toward a sample under investigation, and a two-dimensional x-ray detector is located to receive any diffracted x-ray energy. A positioning apparatus allows the different sample containers of a tray to be sequentially aligned with the source and detector, allowing each to be examined. The sample container is arranged such that a sample is located relative to the well solution so that the x-ray beam is directed to the sample without being incident on the well solution.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: December 28, 2004
    Assignee: Bruker AXS, Inc.
    Inventors: Roger D. Durst, Bob Baoping He
  • Patent number: 6726767
    Abstract: Layer processing to grow a layer structure upon a substrate surface comprises supplying a vapor mixture stream to the substrate (28) to deposit constituents, monitoring growth with an ellipsometer (12) and using its output in real-time growth control of successive pseudo-layers. A Bayesian algorithm is used to predict a probability density function for pseudo-layer growth parameters from initial surface composition, growth conditions and associated growth probabilities therewith, the function comprising discrete samples. Weights are assigned to the samples representing occurrence likelihoods based on most recent sensor output. A subset of the samples is chosen with selection likelihood weighted in favor of samples with greater weights. The subset provides a subsequent predicted probability density function and associated pseudo-layer growth parameters for growth control, and becomes a predicted probability density function for a further iteration of pseudo-layer growth.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: April 27, 2004
    Assignee: QinetiQ Limited
    Inventors: Alan D Marrs, Allister W. E. Dann, John L Glasper, Christopher Pickering, David J Robbins, John Russell
  • Patent number: 6716284
    Abstract: An apparatus and process for atomic layer deposition that minimizes mixing of the chemicals and reactive gases is disclosed. The first precursor and second precursor are only mixed with other chemicals and reactive gases when and where desired by installing and monitoring a dispensing fore-line. Also, independent and dedicated chamber outlets, isolation valves, exhaust fore-lines, and exhaust pumps are provided that are activated for the specific gas when needed.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: April 6, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Philip H. Campbell, David J. Kubista
  • Patent number: 6685772
    Abstract: Computer programs and computer-implemented methods for predicting from first principles the behavior of dopants and defects in the processing of electronic materials. The distribution of dopant and defect components in a substrate lattice is predicted based on external conditions and fundamental data for a set of microscopic processes that can occur during material processing operations. The concentration behavior of one or more fast components is calculated in two stages, by solving a first relationship for a time period before the fast component reaches a pseudo steady state at which the concentration of the fast component is determined by concentrations of one or more second components, and by solving a second relationship for a time period after the first component reaches the pseudo steady state. Application of these methods to modeling ultrashallow junction processing is also described.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: February 3, 2004
    Assignee: California Institute of Technology
    Inventors: William A. Goddard, III, Gyeong S. Hwang
  • Patent number: 6679946
    Abstract: A method and apparatus for determining substrate temperature and the mirror center of a film structure formed on the substrate utilizes a transmission intensity spectrum of light to determine mirror center and a normalized transmission intensity spectrum of light to determine substrate temperature. White light is transmitted through the substrate and the film structure during the film structure formation process. Also during the film formation process, a reflected light intensity spectrum is obtained using the same or another light source, for light reflected by the film structure. Substrate temperature and mirror center may be determined during formation of the film structure and, based on the measured temperature and mirror center, the mirror center may be adjusted by changing film formation conditions during the film formation process to vary the thickness of the films being formed.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: January 20, 2004
    Assignee: Optical Communication Products, Inc.
    Inventors: Andrew William Jackson, Mark J. Dalberth
  • Patent number: 6521042
    Abstract: Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of mass spectrometer (204) signals based on a process model. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: February 18, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Francis G. Celii, Alan J. Katz, Yung-Chung Kao, Theodore S. Moise
  • Patent number: 6447605
    Abstract: Disclosed is a method for preparing heteroepitaxial thin films which are free of island structures which have a bad influence on the photoelectric properties and interfacial reactivity of the thin films. These heteroepitaxial thin films are deposited on grooved or curved surfaces of substrates. The use of grooved substrates relieves the coherent elastic strain from the thin films, thereby inhibiting the surface roughening and the island structure formation in the heteroepitaxial thin films. The method can be applied to all of the thin films that show island structures, including GaAs/Si and SiGe/Si typically used in semiconductor devices and various electronic parts, enabling the thin films to be flatly deposited at a significant thickness on various substrates without additionally processing.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: September 10, 2002
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sung Yoon Chung, Suk Pil Kim, Byung Sung Kang, Si Kyung Choi, Suk Joong Kang
  • Patent number: 6417013
    Abstract: A method for controlling a variable parameter during a processing of a semiconductor device includes selecting a beginning and an ending value; selecting a function governing how the parameter is to be transitioned; initializing the parameter to the beginning value; and automatically transitioning the parameter according to the selected function. Another method includes selecting a criterion; determining a beginning value; receiving an input; determining from the input whether the parameter needs to be modified; and modifying the parameter. The methods can control the parameters of a Bosch process such that the steps of etching and plasma deposition are performed alternatingly while keeping the transition points arbitrarily small and providing increased control over the process and the resulting trench wall profile. The method applies to other types of semiconductor processing, including without limitation, other deposition and etching applications or processes.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: July 9, 2002
    Assignee: Plasma-Therm, Inc.
    Inventors: Michael J. Teixeira, Mike Devre, Wade Dawson, Dave Johnson
  • Patent number: 6409828
    Abstract: A method and apparatus are disclosed for achieving a desired thickness profile in a semiconductor device (44) using a flow-flange reactor (10), by adjusting input flow ratios in the flow-flange (12) of the reactor (10). A target thickness profile is established. A first set of optimum input flow ratios are then determined in response to the target thickness profile, based upon a first plurality of sample thickness profiles and a first plurality of sets of sample input flow ratios, wherein each of the sample thickness profiles corresponds to one of the first plurality of sets of sample input flow ratios. The input flow ratios of the reactor (10) are then adjusted in response to the first optimum set of input flow ratios.
    Type: Grant
    Filed: September 12, 1995
    Date of Patent: June 25, 2002
    Assignee: Texas Instruments Incorporated
    Inventor: Tae S. Kim
  • Patent number: 6372041
    Abstract: A method and apparatus for homoepitaxial growth of freestanding, single bulk crystal Gallium Nitride (GaN) are provided, wherein a step of nucleating GaN in a reactor results in a GaN nucleation layer having a thickness of a few monolayers. The nucleation layer is stabilized, and a single bulk crystal GaN is grown from gas phase reactants on the GaN nucleation layer. The reactor is formed from ultra low oxygen stainless steel.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: April 16, 2002
    Assignee: GAN Semiconductor Inc.
    Inventors: Hak Dong Cho, Sang Kyu Kang
  • Patent number: 6358313
    Abstract: A method of manufacturing a crystalline silicon base semiconductor thin film on a substrate, includes the steps of forming a thin film primarily made of silicon on the substrate by forming plasma of a film material gas containing at least a silicon base gas at the vicinity of the substrate; and crystallizing the silicon in the thin film primarily made of the silicon by emitting excited particles produced from an excited particle material gas to the substrate. At least one of the film material gas and the excited particle material gas contains an impurity gas for forming the silicon semiconductor, and thereby the crystalline silicon base semiconductor thin film is formed on the substrate.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: March 19, 2002
    Assignees: Sharp Kabushiki Kaisha, Nissin Electric Co., Ltd.
    Inventors: Shuhei Tsuchimoto, Hirohisa Tanaka, Kiyoshi Ogata, Hiroya Kirimura
  • Publication number: 20010052316
    Abstract: An apparatus for reduced-pressure gaseous phase epitaxial growth by suppressing contamination upon the machine parts constituting the rotary mechanical portion and suppressing contamination upon the semiconductor wafer by maintaining the pressure in the rotary mechanical portion to lie within a particular range, and a method of controlling the above apparatus.
    Type: Application
    Filed: May 16, 2001
    Publication date: December 20, 2001
    Applicant: TOSHIBA CERAMICS CO., LTD
    Inventors: Katsuyuki Iwata, Tadashi Ohashi, Shuji Tobashi, Shinichi Mitani, Hideki Arai, Hideki Ito
  • Patent number: 6306668
    Abstract: A process and system for use during the growth of a thin film upon the surface of a substrate by exposing the substrate surface to vaporized material in a high vacuum (HV) facility involves the directing of an electron beam generally toward the surface of the substrate as the substrate is exposed to vaporized material so that electrons are diffracted from the substrate surface by the beam and the monitoring of the pattern of electrons diffracted from the substrate surface as vaporized material settles upon the substrate surface. When the monitored pattern achieves a condition indicative of the desired condition of the thin film being grown upon the substrate, the exposure of the substrate to the vaporized materials is shut off or otherwise adjusted. To facilitate the adjustment of the crystallographic orientation of the film relative to the electron beam, the system includes a mechanism for altering the orientation of the surface of the substrate relative to the electron beam.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: October 23, 2001
    Assignee: UT-Battelle, LLC
    Inventors: Rodney A. McKee, Frederick J. Walker
  • Patent number: 6235543
    Abstract: In a method of evaluating a semiconductor wafer to provide an index as to whether slip generation is likely or not, the in-plane temperature distribution of the wafer is varied at a prescribed temperature and the condition of the temperature distribution at which slip line generation occurs is detected. The temperature distribution is varied using plural concentric heaters and is measured using a radiation thermometer. The temperature distribution is correlated to thermal stress in the wafer. In this manner, a range of tolerable thermal stress is specified, at which a slip line will not be generated. Dependent on the applied temperature distribution and the determination of whether a slip line has been generated in connection with that temperature distribution, it is determined whether the periphery of the wafer has a tangential residual stress that is compressive or tensile.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: May 22, 2001
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Makoto Kiyama
  • Patent number: 6217651
    Abstract: In the process of thin film growth, actual temperature of a substrate is measured and corrected with low cost in short time. With first thin film growth equipment of which a difference between set temperature of a heating source and an actual temperature of the substrate (hereinafter, referred to as temperature characteristic) is known, a first calibration curve representing “thin film growth rate vs. substrate actual temperature” is prepared. Next, thin film growth is conducted at one set temperature T2 with use of second thin film growth equipment whose temperature characteristic is unknown, where a difference from a set temperature T1 reading from the first calibration curve in correspondence to a thin film growth rate G resulting from the thin film growth process is determined.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: April 17, 2001
    Assignee: Shin-Etsu Handotai, Co., Ltd.
    Inventors: Hisashi Kashino, Koichi Kanaya
  • Patent number: 6126744
    Abstract: A method to prepare thermal reactors for operation after installation, modification, upgrade and routine preventive maintenance operations. Variations in reaction rate across a wafer surface are used to determine corresponding variations in surface temperature across the wafer surface. Surface temperature variations results in thickness variations of a chemically deposited layer. For selected thicknesses, a chemically deposited layer is transparent and exhibits color variations corresponding to the thickness variations that result from the surface temperature variations. These color variations are then correlated to surface temperature variations to enable wafer heating adjustments to reduce surface temperature variations.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: October 3, 2000
    Assignee: ASM America, Inc.
    Inventors: Mark Richard Hawkins, Robert Michael Vyne, Cornelius Alexander van der Jeugd
  • Patent number: 6123766
    Abstract: A method for controlling the temperature of a substrate in a processing chamber. The processing chamber employs a heating control over at least two heating zones. Each heating zone is independently controllable according to a measured signal corresponding to the substrate temperature and a user-definable offset.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: September 26, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Meredith J. Williams, David S. Ballance, Benjamin Bierman, Paul Deaton, Brian Haas, Nobuyuki Takahashi, James V. Tietz
  • Patent number: 6121051
    Abstract: This invention provides an inexpensive, noninvasive optical method of quantitatively determining the volume fraction of anisotropic material in a mixture of anisotropic and isotropic material, and more particularly for determining the volume fraction of noncubic crystalline material in a mixed-phase specimen having noncubic crystalline material intermixed with cubic crystalline material. Polarized light is impinged on the specimen and the reflectance or transmission difference between two orthogonal polarization directions is measured. In cubic regions the reflectance or transmission is the same along both polarization directions so the contributions to the difference cancel, leaving a signal only from the noncubic regions. The optical difference can be measured as a function of wavelength and critical points in the band structure, including the band gap, can be profiled. From the band structure the film composition can be determined.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: September 19, 2000
    Assignee: The United States of America as represented by the Secretary of Commerce
    Inventor: Kristine A. Bertness
  • Patent number: 6113690
    Abstract: A method of preparing crystalline alkaline earth metal oxides on a Si substrate wherein a Si substrate with amorphous silicon dioxide on a surface is provided. The substrate is heated to a temperature in a range of 700.degree. C. to 800.degree. C. and exposed to a beam of alkaline earth metal(s) in a molecular beam epitaxy chamber at a pressure within approximately a 10.sup.-9 -10.sup.-10 Torr range. During the molecular beam epitaxy the surface is monitored by RHEED technique to determine a conversion of the amorphous silicon dioxide to a crystalline alkaline earth metal oxide. Once the alkaline earth metal oxide is formed, additional layers of material, e.g. additional thickness of an alkaline earth metal oxide, single crystal ferroelectrics or high dielectric constant oxides on silicon for non-volatile and high density memory device applications.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: September 5, 2000
    Assignee: Motorola, Inc.
    Inventors: Zhiyi Jimmy Yu, Jerald A. Hallmark, Jonathan K. Abrokwah, Corey D. Overgaard, Ravi Droopad
  • Patent number: 6087242
    Abstract: A method of improving the bonding characteristics of a previously bonded silicon on insulator (SOI) structure is provided. The improvement in the bonding characteristics is achieved in the present invention by, optionally, forming an oxide cap layer on the silicon surface of the bonded SOI structure and then annealing either the uncapped or oxide capped structure in a slightly oxidizing ambient at temperatures greater than 1200.degree. C. Also provided herein is a method for detecting the bonding characteristics of previously bonded SOI structures. According to this aspect of the present invention, a pico-second laser pulse technique is employed to determine the bonding imperfections of previously bonded SOI structures.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: July 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Humphrey John Maris, Devendra Kumar Sadana
  • Patent number: 6074485
    Abstract: A STM drive mechanism capable of moving a scanning tunneling microscope (STM) incorporated with a molecular beam epitaxy (MBE) device in the MBE device under vacuum and a substrate holder with a wide clearance formed between a substrate heating system and the substrate holder are provided. The STM is protected by a heat insulating shield from high vapor pressure atmosphere and radiant heat according to substrate heating.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: June 13, 2000
    Assignee: National Research Institute for Metals
    Inventors: Shiro Tsukamoto, Nobuyuki Koguchi
  • Patent number: 6024794
    Abstract: By applying the method, the critical film thickness of a compound semiconductor layer is determined, and a semiconductor device having a compound semiconductor layer with an optimized film thickness excellent in emitting performance is manufactured.The relationship between film thickness of a compound semiconductor layer and photoluminescence (PL) corresponding to the film thickness is obtained by measurement, the film thickness where PL exhibits a peak is designated as critical film thickness. The semiconductor layer comprises II-VI group compound semiconductor layer containing at least cadmium. The relationship between the critical film thickness and cadmium composition ratio is obtained by measurement. An equation which approximates the relationship between the critical film thickness and cadmium composition ratio is formulated.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: February 15, 2000
    Assignee: Sony Corporation
    Inventors: Koshi Tamamura, Hironori Tsukamoto, Masaharu Nagai
  • Patent number: 5985025
    Abstract: Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of mass spectrometer (204) signals based on a process model. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
    Type: Grant
    Filed: February 1, 1995
    Date of Patent: November 16, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Francis G. Celii, Alan J. Katz, Yung-Chung Kao, Theodore S. Moise
  • Patent number: 5966625
    Abstract: A single crystal silicon wafer is sliced off so as to have a slant surface that is inclined from plane (001) such that the normal of the slant surface is inclined by 0.01.degree. to 0.2.degree. from direction [001] toward direction [110]. After being cleaned, the silicon wafer is heat-treated at 600-1,300.degree. C. for not less than 1 minute in an ultrapure argon or hydrogen atmosphere containing nitrogen at not more than 0.1 ppm, to thereby cause the slant surface to have a stepped crystal surface structure. The stepped crystal surface structure is constituted of step walls Sa and Sb when it has been formed by a heat treatment in an argon atmosphere, and substantially all of its step walls are of a type Sb when it has been formed by a heat treatment in a hydrogen atmosphere.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: October 12, 1999
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Lei Zhong, Norihiro Shimoi, Yoshio Kirino
  • Patent number: 5961719
    Abstract: Method and apparatus are disclosed for growing diamond films on a non-diamond substrate, such as a silicon wafer. The substrate surface is subjected to nucleation by means of a microwave-generated plasma while applying an electrical bias to the substrate and while an electrode is positioned adjacent to but spaced from the substrate surface. After the nucleation step, crystalline diamond is deposited on the nucleated surface from a carbon-containing plasma.
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: October 5, 1999
    Assignee: Kabushiki Kaisha Kobe Seiko Sho
    Inventors: David Stephen Buhaenko, Carolyn Elizabeth Beer, Peter John Ellis
  • Patent number: 5951755
    Abstract: A manufacturing method for manufacturing a semiconductor substrate has first annealing step for annealing silicon single crystal to permit oxygen embryos or oxygen precipitations grown from the oxygen embryos precipitating in a predetermined region and a second annealing step for permitting said oxygen embryos or said oxygen precipitations to contract using a second temperature range higher than the first temperature range, said second temperature range being high enough to contract said oxygen embryos and low enough to prevent redistribution of boron from affecting to device characteristics, to form a denuded zone in said predetermined region at the principal surface. An inspection method for inspecting a semiconductor substrate further has measuring step, subsequent to said first and second annealing steps for measuring the density of oxygen embryos grown into oxygen precipitations among those precipitated in said silicon single crystal.
    Type: Grant
    Filed: February 14, 1997
    Date of Patent: September 14, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Moriya Miyashita, Masanobu Ogino, Tadahide Hoshi, Masanori Numano, Shuichi Samata, Akiko Sekihara, Keiko Akita
  • Patent number: 5891242
    Abstract: An apparatus for and a method of determining the epitaxial layer thickness and transition width in epitaxial single crystal silicon wafers are provided. The apparatus provides an epitaxial single crystal silicon wafer comprising an isotopically enriched doped substrate. The method involves a process of applying Second Ion Mass Spectrometry (SIMS) to the isotopically enriched doped wafer for determining its epitaxial layer thickness and transition width.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: April 6, 1999
    Assignee: Seh America, Inc.
    Inventors: William Charles Pesklak, Bruce Laurence Colburn
  • Patent number: 5876497
    Abstract: The conventional fabrication processes of SOI substrate employed wet etching for removing a porous single-crystal Si region, but wet etching involved difficulties in management of concentration for fabricating SOI substrates in high volume, which caused reduction in productivity.Therefore, provided is a fabrication process of SOI substrate comprises a step of forming a non-porous single-crystal Si region on a surface of a porous single-crystal Si region of a single-crystal Si substrate having at least the porous single-crystal Si region, a step of bonding a support substrate through an insulating region to a surface of the non-porous single-crystal Si region, and a step of removing the porous single-crystal Si region, wherein the step of removing the porous single-crystal Si region comprises a step of performing dry etching in which an etch rate of the porous single-crystal Si region is greater than that of the non-porous single-crystal Si region.
    Type: Grant
    Filed: December 9, 1996
    Date of Patent: March 2, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tadashi Atoji
  • Patent number: 5872016
    Abstract: Optoelectronic devices such as photodetectors, modulators and lasers with improved optical properties are provided with an atomically smooth transition between the buried conductive layer and quantum-well-diode-containing intrinsic region of a p-i-n structure. The buried conductive layer is grown on an underlying substrate utilizing a surfactant-assisted growth technique. The dopant and dopant concentration are selected, as a function of the thickness of the conductive layer to be formed, so that a surface impurity concentration of from 0.1 to 1 monolayer of dopant atoms is provided. The presence of the impurities promotes atomic ordering at the interface between the conductive layer and the intrinsic region, and subsequently results in sharp barriers between the alternating layers comprising the quantum-well-diodes of the intrinsic layer.
    Type: Grant
    Filed: June 18, 1996
    Date of Patent: February 16, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Keith Wayne Goossen, William Young Jan, Michael D. Williams
  • Patent number: 5865888
    Abstract: A semiconductor device epitaxial layer lateral growth rate control method using CBr.sub.4 gas involves regulating an epitaxial layer lateral growth rate in accordance with the CBr.sub.4 amount doped into the epitaxial layer during the epitaxial layer growth occurring on a patterned GaAs substrate by means of a metalorganic chemical vapor deposition (MOCVD) process. The lateral growth rate may be regulated by varying the growth temperature and the V/III doping ratio.
    Type: Grant
    Filed: July 22, 1996
    Date of Patent: February 2, 1999
    Assignee: Korea Institute of Science and Technology
    Inventors: Suk-Ki Min, Moo sung Kim, Seong-Il Kim
  • Patent number: 5849076
    Abstract: Barrel reactor apparatus for chemical vapor deposition of a material on a semiconductor wafer having a cooling system which protects the semiconductor wafers from metals contamination caused by degradation of metallic surfaces of the barrel reactor. Degradation is caused by water reacting with other substances (e.g., HCl) in the barrel reactor. The cooling system has a controller which monitors the operational state of the barrel reactor and selects an operating setpoint based on the detected operational condition. As a result, the metallic surfaces of the barrel reactor are kept cool during operation to retard corrosive chemical reaction rates, and kept warmer than would be otherwise possible when the barrel reactor is not operating to prevent adsorption of water by and condensation of water onto the metallic surfaces.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: December 15, 1998
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Eric Lee Gaylord, Charles Herman Mueller
  • Patent number: 5830829
    Abstract: The invention relates to a process for producing textured high-temperature superconducting solid shaped parts, which comprises solid shaped parts made of oxide-ceramic superconducting material of a phase mixture of the substance class YBCO first being molded, pressed and sintered, a zonewise thermal treatment then being carried out along their longitudinal axis. Heating is first carried out, in a first zone, to a temperature in the range of from 50 to 200 K below the peritectic melting temperature of the phase mixture initially present in the shaped part, the temperature then is raised, in a second zone having a temperature gradient in the range of from 10 to 250 K/cm, then, in a third zone, a temperature of up to 50 K above the peritectic melting temperature of the phase mixture initially present in the shaped part is maintained, cooling then being carried out, in a fourth zone having a temperature gradient in the range of from 10 to 250 K/cm.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: November 3, 1998
    Assignee: Hoechst Aktiengesellschaft
    Inventors: Markus Brand, Gunter Brommer, Steffen Elschner, Stephan Gauss, Wolf Assmus
  • Patent number: 5782974
    Abstract: A temperature measurement system for use in a thin film deposition system is based on optical pyrometry on the backside of the deposition substrate. The backside of the deposition substrate is viewed through a channel formed in the susceptor of the deposition system. Radiation from the backside of the deposition substrate passes through an infrared window and to an infrared detector. The signal output by the infrared detector is coupled to electronics for calculating the temperature of the deposition substrate in accordance with blackbody radiation equations. A tube-like lightguide shields the infrared detector from background radiation produced by the heated susceptor.
    Type: Grant
    Filed: May 16, 1996
    Date of Patent: July 21, 1998
    Assignee: Applied Materials, Inc.
    Inventors: Carl A. Sorensen, Wendell T. Blonigan
  • Patent number: 5772758
    Abstract: Methods and apparatus are provided for monitoring deposition and pre-deposition characteristics such as the growth rates, oxide desorption, surface reconstruction, anion surface exchange reaction and smoothness of the surface of rotating substrates in near real-time during molecular beam epitaxy by processing the data in the time domain and for controlling a deposition apparatus in near real-time.
    Type: Grant
    Filed: February 15, 1996
    Date of Patent: June 30, 1998
    Assignee: California Institute of Technology
    Inventors: Douglas A. Collins, Thomas C. McGill, George O. Papa
  • Patent number: 5755877
    Abstract: In an extremely thin hetero-epitaxial growth film less than 1 .mu.m, the thin film can be grown at high precision by controlling the growth conditions. The method of growing a thin film on a semiconductor substrate comprises the steps of: forming a semiconductor thin film on a surface of a semiconductor substrate; allowing X-rays to be incident upon the thin film now being grown; measuring fluorescent X-rays emitted from the thin film now being grown in accompany with the application of the X-rays; and controlling growth conditions of the thin film on the basis of the measured values.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: May 26, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takanobu Kamakura, Norihiko Tsuchiya
  • Patent number: 5735950
    Abstract: A process for manufacturing precise alloy compositions in nonlinear alloy systems. The invention implements a new quadratic fitting function that relates alloy composition c.sub.A for a variable A to input fluxes f.sub.A and f.sub.B, as c.sub.A =f.sub.A.sup.2 /(f.sub.A.sup.2 +/.beta.f.sub.B.sup.2). .beta. is a parameter that is used to modify the incorporation of the Group V input variable B. This modification is necessary because of different surface populations of Group V dimer species. This new fitting function precisely predicts alloy compositions in nonlinear systems, such as the GaAs.sub.l-y P.sub.y system, where y is set equal to the composition c.sub.A.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: April 7, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Keith Wayne Goossen
  • Patent number: 5705403
    Abstract: A method of sensing the concentration of a doped impurity on a semiconductor in real time and a method of sensing the change of its growth rate dependent on time among the changes of the growing conditions due to doping by using a real time analysis apparatus in growing a heterostructured semiconductor by a MOCVD method. A reflecting signal during the growth by means of a real time analysis apparatus has a periodic property, an amplitude change of a reflecting signal is dependent on an absorption coefficient when an absorption exists on an epitaxial layer, an impurity concentration can be obtained by using the relation of an absorption coefficient and an impurity concentration. In addition, if each peak is independently analyzed, the respective growth rate dependent on time are measured individually, so that the reduced growth rate dependent on time of the growth rate is sensed in a carbon doped AlAs layer.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: January 6, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong-Hyeob Baek, Bun Lee, Jin-Hong Lee, Sung-Woo Choi
  • Patent number: 5695556
    Abstract: By applying the method, the critical film thickness of a compound semiconductor layer is determined, and a semiconductor device having a compound semiconductor layer with an optimized film thickness excellent in emitting performance is manufactured.The relationship between film thickness of a compound semiconductor layer and photoluminescence (PL) corresponding to the film thickness is obtained by measurement, the film thickness where PL exhibits a peak is designated as critical film thickness. The semiconductor layer comprises II-VI group compound semiconductor layer containing at least cadmium. The relationship between the critical film thickness and cadmium composition ratio is obtained by measurement. An equation which approximates the relationship between the critical film thickness and cadmium composition ratio is formulated.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: December 9, 1997
    Assignee: Sony Corporation
    Inventors: Koshi Tamamura, Hironori Tsukamoto, Masaharu Nagai, Masao Ikeda
  • Patent number: 5690744
    Abstract: An apparatus and method for precisely calibrating the transfer arm of a multiple station wafer processing system without breaking vacuum and with a minimum of system downtime is provided. A system of determining and properly aligning the crystallographic orientation of the wafers before processing as well as monitoring the orientation of individual wafers during wafer transfer between processing stations is also provided.
    Type: Grant
    Filed: October 10, 1996
    Date of Patent: November 25, 1997
    Assignee: Varian Associates, Inc.
    Inventor: Richard F. Landau
  • Patent number: 5614435
    Abstract: A process for production of self-assembled quantum dots is described which does not entail any processing steps before or after growth of the quantum dots. The process uses in situ formation of three dimensional islands which occurs during epitaxy of material with a different lattice parameter than the substrate. Further deposition of the substrate material then produces single or multiple buried two dimensional layers of randomly distributed or selectively positioned and substantially uniform sized quantum dots. These layers are free of defects and interface states. The lateral dot diameters vary between 140 to 300 Angstroms by appropriate choice of deposition parameters.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: March 25, 1997
    Assignee: The Regents of the University of California
    Inventors: Pierre Petroff, Devin Leonard, Mohan Krishnamurthy
  • Patent number: 5598260
    Abstract: An apparatus and method for optically monitoring the output of an effusion cell during the MBE process where resonant radiation is guided through an optical radiation guide across the output orifice of the effusion cell to determine the atomic flux according to the concentration and absorbance of the resonant radiation at the output orifice of the effusion cell.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 28, 1997
    Assignee: Hughes Aircraft Company
    Inventors: Peter D. Brewer, Gregory L. Olson
  • Patent number: 5582646
    Abstract: A method of, and system for, applying light beam producing systems such as ellipsometers, polarimeters, polarized light reflectance and functionally similar systems, such that a beam of light produced thereby is caused to be incident upon a process element at an angle in excess of an associated Brewster angle while enabling the production of a signal sufficiently sensitive to changes in process element parameters, for use in "real-time" process element process monitoring and control, is disclosed. In addition a process element processing system and electron beam producing system and light beam producing system combination system is taught, wherein the electron beam producing and light beam producing systems are mounted to the process element processing system, (typically a (MBE) system), by input and output interface systems present at a location appropriate for conventional Reflection High Energy Electron Diffraction (RHEED) systems.
    Type: Grant
    Filed: October 21, 1994
    Date of Patent: December 10, 1996
    Assignee: J.A. Woollam Co. Inc.
    Inventors: John A. Woollam, Blaine D. Johs, Peter P. Chow
  • Patent number: 5580380
    Abstract: A method for making a field emitter comprising the steps of providing a projection; electrically biasing the projection; and exposing the electrically biased projection to a hydrocarbon containing plasma to form a layer of diamond nuclei on the projection. The diamond nuclei are relatively inert and have a high nucleation density. The projection is preferably a material capable of forming a carbide, such as (111) oriented silicon. Refractory metals may also be used for the projection. The electrical biasing is preferably at a voltage in a range of about -150 to -250 volts. The hydrocarbon containing plasma preferably comprises a plasma including about 2 to 5% by weight of methane in hydrogen. An intervening carbide layer is preferably formed at a surface of the projection and underlying the layer of diamond nuclei. The field emitter produced by the method and having a relatively high diamond nucleation density is also disclosed.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: December 3, 1996
    Assignee: North Carolina State University
    Inventors: Jiang Liu, Scott Wolter, Michael T. McClure, Brian R. Stoner, Jeffrey T. Glass, John J. Hren
  • Patent number: 5556462
    Abstract: Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of integrated mass spectormeter (204) signals. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: September 17, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Francis G. Celii, Yung-Chung Kao, Andrew J. Purdes
  • Patent number: 5552327
    Abstract: Deposition or etching of a layer on a substrate is monitored by impinging P-polarized light on the layer during deposition at an angle which is approximately the Brewster's angle for the substrate, and detecting radiation which is reflected from the structure during deposition. In heterodeposition, a quarter wavelength interference signal having a predetermined periodicity is monitored. Maxima and/or minima in the quarter wavelength ratio are monitored and an amplitude modulated fine signal which is superimposed on the quarter wavelength interference signal is also monitored. The deposition process is controlled based on the monitored quarter wavelength interference signal, ratio of the maxima and/or minima, fine signal, fine signal amplitude modulation and/or combinations thereof by comparing the signals to a reference derived from mathematical models or empirical data. A heterodeposition or etching can also be used to calibrate a homodeposition or etching.
    Type: Grant
    Filed: August 26, 1994
    Date of Patent: September 3, 1996
    Assignee: North Carolina State University
    Inventors: Klaus J. Bachmann, Nikolaus Dietz, Amy E. Miller
  • Patent number: 5477325
    Abstract: In a method for evaluating thickness of a semiconductor layer epitaxially growing on a main surface of a substrate, a parallel stripe-shaped ridges extending are formed on the surface of the substrate, and a semiconductor layer is epitaxially grown on the surface of the substrate including the stripe-shaped ridges while irradiating the stripe-shaped ridges with light and monitoring from the stripe-shaped ridges to evaluate the thickness of the epitaxially growing semiconductor layer. The thickness of the epitaxial layer is evaluated with high precision during the epitaxial growth process.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: December 19, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Motoharu Miyashita, Nobuyoshi Ogasawara, Tadashi Kimura
  • Patent number: 5471947
    Abstract: A method is disclosed for producing an oriented diamond film on a single crystal silicon substrate which comprises preconditioning the surface of the substrate by exposing the surface of the substrate to a carbon-containing plasma, subjecting the preconditioned surface to electrical bias to effect nucleation of the substrate surface for oriented diamond crystal growth while monitoring the completion of nucleation over the surface of the substrate and depositing crystalline diamond on the nucleated surface from a carbon-containing plasma. The resulting structure comprises a crystalline diamond film on the silicon substrate characterised by oriented columnar diamond crystals which form a substantially uniform tessellated pattern. In practice, the columnar crystals normally have a generally quadrilateral shape whose sides are mutually aligned.
    Type: Grant
    Filed: August 19, 1993
    Date of Patent: December 5, 1995
    Assignee: Kabushiki Kaisha Kobe Seiko Sho
    Inventors: Paul Southworth, David S. Buhaenko, Peter J. Ellis, Carolyn E. Jenkins, Brian R. Stoner