With A Chemical Reaction (except Ionization) In A Disparate Zone To Form A Precursor Patents (Class 117/91)
  • Patent number: 11814300
    Abstract: A novel process provides for the preparation of the chlorinated, uncharged substance tetrakis(trichlorosilyl)germane, and for the use thereof.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: November 14, 2023
    Assignee: Evonik Operations GmbH
    Inventors: Matthias Wagner, Julian Teichmann, Hans-Wolfram Lerner
  • Patent number: 11713517
    Abstract: A group-III nitride substrate includes: a first region having a first impurity concentration in a polished surface; and a second region having a second impurity concentration lower than the first impurity concentration in the polished surface, wherein a first dislocation density of the first region is lower than a second dislocation density of the second region.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: August 1, 2023
    Assignee: PANASONIC HOLDINGS CORPORATION
    Inventors: Yusuke Mori, Masashi Yoshimura, Masayuki Imanishi, Akira Kitamoto, Junichi Takino, Tomoaki Sumi, Yoshio Okayama
  • Patent number: 10373725
    Abstract: In a method of chemical vapor deposition (CVD) growth of a polycrystalline diamond film in a CVD reactor, a gas mixture of gaseous hydrogen and a gaseous hydrocarbon is introduced into the CVD reactor. A plasma formed from the gas mixture is maintained above a surface of a conductive substrate disposed in the CVD reactor and causes a polycrystalline diamond film to grow on the surface of the conductive substrate. A temperature T at the center of the polycrystalline diamond film is controlled during growth of the polycrystalline diamond film. The CVD grown polycrystalline diamond film includes diamond crystallites that can have a percentage of orientation along a [110] diamond lattice direction?70% of the total number of diamond crystallites forming the polycrystalline diamond film.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: August 6, 2019
    Assignee: II-VI Incorporated
    Inventors: Wen-Qing Xu, Chao Liu, Charles J. Kraisinger, Charles D. Tanner, Ian Currier, David Sabens, Elgin E. Eissler, Thomas E. Anderson
  • Patent number: 9824890
    Abstract: A reactor for growing or depositing semiconductor films or devices. The reactor may be designed for inline production of III-V materials grown by hydride vapor phase epitaxy (HVPE). The operating principles of the HVPE reactor can be used to provide a completely or partially inline reactor for many different materials. An exemplary design of the reactor is shown in the attached drawings. In some instances, all or many of the pieces of the reactor formed of quartz, such as welded quartz tubing, while other reactors are made from metal with appropriate corrosion resistant coatings such as quartz or other materials, e.g., corrosion resistant material, or stainless steel tubing or pipes may be used with a corrosion resistant material useful with HVPE-type reactants and gases. Using HVPE in the reactor allows use of lower-cost precursors at higher deposition rates such as in the range of 1 to 5 ?m/minute.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: November 21, 2017
    Assignees: Alliance for Sustainable Energy, LLC, Wisconsin Alumni Research Foundation
    Inventors: David L. Young, Aaron Joseph Ptak, Thomas F. Kuech, Kevin Schulte, John D. Simon
  • Patent number: 9726436
    Abstract: A vapor chamber having no gas discharging protrusion includes: a lower shell member, formed with an upper surface divided into an inner zone and an outer zone and an outer peripheral wall formed with a planar surface, the inner zone is formed with capillary channels, the outer zone is formed with a recess, and one thereof is communicated with at least one of the capillary channels and the other end thereof penetrates the planar surface; and an upper shell member, engaged with the upper surface and sealed with the lower shell member, and a gas discharging hole is formed between the recess and the upper shell member. Accordingly, a conventional gas discharging protrusion is not required on the vapor chamber thereby advantages of small and thin in volume and compact in structure being provided.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: August 8, 2017
    Assignee: CHAUN-CHOUNG TECHNOLOGY CORP.
    Inventors: Shih-Ming Wang, Pang-Hung Liao, Cheng-Tu Wang
  • Patent number: 9721810
    Abstract: Methods of doping a semiconductor film are provided. The methods comprise epitaxially growing the III-V semiconductor film in the presence of a dopant, a surfactant capable of acting as an electron reservoir, and hydrogen, under conditions that promote the formation of a III-V semiconductor film doped with the p-type dopant. In some embodiments of the methods, the epitaxial growth of the doped III-V semiconductor film is initiated at a first hydrogen partial pressure which is increased to a second hydrogen partial pressure during the epitaxial growth process.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: August 1, 2017
    Assignee: University of Utah Research Foundation
    Inventors: Feng Liu, Gerald Stringfellow, Junyi Zhu
  • Patent number: 9281180
    Abstract: According to the invention, there is provided a method for producing a gallium trichloride gas, the method including: a first step of reacting a metallic gallium and a chlorine gas to produce a gallium monochloride gas; and a second step of reacting the produced gallium monochloride gas and a chlorine gas to produce a gallium trichloride gas.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: March 8, 2016
    Assignee: National University Corporation Tokyo University of Agriculture
    Inventors: Akinori Koukitu, Yoshinao Kumagai
  • Patent number: 8945304
    Abstract: A system and method A method of growing an elongate nanoelement from a growth surface includes: a) cleaning a growth surface on a base element; b) providing an ultrahigh vacuum reaction environment over the cleaned growth surface; c) generating a reactive gas of an atomic material to be used in forming the nanoelement; d) projecting a stream of the reactive gas at the growth surface within the reactive environment while maintaining a vacuum of at most 1×10?4 Pascal; e) growing the elongate nanoelement from the growth surface within the environment while maintaining the pressure of step c); f) after a desired length of nanoelement is attained within the environment, stopping direction of reactive gas into the environment; and g) returning the environment to an ultrahigh vacuum condition.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: February 3, 2015
    Assignee: The Board of Regents of the Nevada System of Higher Education on behalf of the University of Nevada, Las Vegas University of Nevada
    Inventors: Biswajit Das, Myung B. Lee
  • Patent number: 8936681
    Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: January 20, 2015
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8888913
    Abstract: A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: November 18, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuhiro Narahara, Hirotaka Kato, Koichiro Hayashida
  • Patent number: 8882909
    Abstract: Relaxed germanium buffer layers can be grown economically on misoriented silicon wafers by low-energy plasma-enhanced chemical vapor deposition. In conjunction with thermal annealing and/or patterning, the buffer layers can serve as high-quality virtual substrates for the growth of crack-free GaAs layers suitable for high-efficiency solar cells, lasers and field effect transistors.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: November 11, 2014
    Assignee: Dichroic Cell S.R.L.
    Inventor: Hans Von Kaenel
  • Patent number: 8858708
    Abstract: This invention provides a process for producing high-purity dense polycrystalline III-nitride slabs. A vessel which contains a group III-metal such as gallium or an alloy of group III-metals of shallow depth is placed in a reactor. The group III-metal or alloy is heated until a molten state is reached after which a halide-containing source mixed with a carrier gas and a nitrogen-containing source is flowed through the reactor vessel. An initial porous crust of III-nitride forms on the surface of the molten III-metal or alloy which reacts with the nitrogen-containing source and the halide-containing source. The flow rate of the nitrogen-containing source is then increased and flowed into contact with the molten metal to produce a dense polycrystalline III-nitride. The products produced from the inventive process can be used as source material for III-nitride single crystal growth which material is not available naturally.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: October 14, 2014
    Assignee: The United States of America As represented by the Secretary of the Air Force
    Inventors: Michael J. Callahan, Buguo Wang, John S. Bailey
  • Patent number: 8821635
    Abstract: Si—Ge materials are grown on Si(100) with Ge-rich contents (Ge>50 at. %) and precise stoichiometries SiGe, SiGe2, SiGe3 and SiGe4. New hydrides with direct Si—Ge bonds derived from the family of compounds (H3Ge)xSiH4-x (x=1-4) are used to grow uniform, relaxed, and highly planar films with low defect densities at unprecedented low temperatures between about 300-450° C. At about 500-700° C., SiGex quantum dots are grown with narrow size distribution, defect-free microstructures and highly homogeneous elemental content at the atomic level. The method provides for precise control of morphology, composition, structure and strain. The grown materials possess the required characteristics for high frequency electronic and optical applications, and for templates and buffer layers for high mobility Si and Ge channel devices.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: September 2, 2014
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: John Kouvetakis, Ignatius S. T. Tsong, Changwu Hu, John Tolle
  • Patent number: 8778078
    Abstract: A process for producing a doped III-N bulk crystal, wherein III denotes at least one element of the main group III of the periodic system, selected from Al, Ga and In, wherein the doped crystalline III-N layer or the doped III-N bulk crystal is deposited on a substrate or template in a reactor, and wherein the feeding of at least one dopant into the reactor is carried out in admixture with at least one group III material. In this manner, III-N bulk crystals and III-N single crystal substrates separated therefrom can be obtained with a very homogeneous distribution of dopants in the growth direction as well as in the growth plane perpendicular thereto, a very homogeneous distribution of charge carriers and/or of the specific electric resistivity in the growth direction as well as in the growth plane perpendicular thereto, and a very good crystal quality.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: July 15, 2014
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Ferdinand Scholz, Peter Brückner, Frank Habel, Gunnar Leibiger
  • Patent number: 8663389
    Abstract: A method and apparatus for depositing III-V material is provided. The apparatus includes a reactor partially enclosed by a selectively permeable membrane 12. A means is provided for generating source vapors, such as a vapor-phase halide of a group III element (IUPAC group 13) within the reactor volume 10, and an additional means is also provided for introducing a vapor-phase hydride of a group V element (IUPAC group 15) into the volume 10. The reaction of the group III halide and the group V hydride on a temperature-controlled substrate 18 within the reactor volume 10 produces crystalline III-V material and hydrogen gas. The hydrogen is preferentially removed from the reactor through the selectively permeable membrane 12, thus avoiding pressure buildup and reaction imbalance. Other gases within the reactor are unable to pass through the selectively permeable membrane.
    Type: Grant
    Filed: May 21, 2011
    Date of Patent: March 4, 2014
    Inventor: Andrew Peter Clarke
  • Patent number: 8585822
    Abstract: The present invention discloses a new testing method of group III-nitride wafers. By utilizing the ammonothermal method, GaN or other Group III-nitride wafers can be obtained by slicing the bulk GaN ingots. Since these wafers originate from the same ingot, these wafers have similar properties/qualities. Therefore, properties of wafers sliced from an ingot can be estimated from measurement data obtained from selected number of wafers sliced from the same ingot or an ingot before slicing. These estimated properties can be used for product certificate of untested wafers. This scheme can reduce a significant amount of time, labor and cost related to quality control.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: November 19, 2013
    Assignee: Sixpoint Materials, Inc.
    Inventors: Tadao Hashimoto, Masanori Ikari, Edward Letts
  • Patent number: 8551246
    Abstract: A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: October 8, 2013
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Fumio Tahara, Tsuyoshi Ohtsuki, Takatoshi Nagoya, Kiyoshi Mitani
  • Patent number: 8470090
    Abstract: Affords large-diametric-span AlN crystals, applicable to various types of semiconductor devices, with superior crystallinity, a method of growing the AlN crystals, and AlN crystal substrates. The AlN crystal growth method is a method in which an AlN crystal (4) is grown by vapor-phase epitaxy onto a seed crystal substrate (2) placed inside a crystal-growth compartment (24) within a crystal-growth vessel (12) provided within a reaction chamber, and is characterized in that during growth of the crystal, carbon-containing gas is supplied to the inside of the crystal-growth compartment (24).
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: June 25, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naho Mizuhara, Michimasa Miyanaga, Tomohiro Kawase, Shinsuke Fujiwara
  • Patent number: 8394197
    Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 12, 2013
    Assignee: Sub-One Technology, Inc.
    Inventors: Andrew W. Tudhope, Thomas B. Casserly, Karthik Boinapally, Deepak Upadhyaya, William J. Boardman
  • Patent number: 8361551
    Abstract: In a method of forming a target layer having a uniform composition of constituent materials, a first precursor including a first central atom and a ligand is chemisorbed on a first reaction site of an object. The ligand or the first central atom is then removed to form a second reaction site. A second precursor including a second central atom is then chemisorbed on the second reaction site.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: January 29, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheol Lee, Ki-Yeon Park, Jun-Noh Lee
  • Patent number: 8357242
    Abstract: Methods of depositing thin film materials having crystalline content are provided. The methods use plasma enhanced chemical vapor deposition. According to one embodiment of the present invention, microcrystalline silicon films are obtained. According to a second embodiment of the present invention, crystalline films of zinc oxide are obtained. According to a third embodiment of the present invention, crystalline films of iron oxide are obtained.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: January 22, 2013
    Inventors: Russell F. Jewett, Steven F. Pugh, Paul Wickboldt
  • Patent number: 8349076
    Abstract: A method of fabricating a freestanding gallium nitride (GaN) substrate includes: preparing a GaN substrate within a reactor; supplying HCl and NH3 gases into the reactor to treat the surface of the GaN substrate and forming a porous GaN layer; forming a GaN crystal growth layer on the porous GaN layer; and cooling the GaN substrate on which the GaN crystal growth layer has been formed and separating the GaN crystal growth layer from the substrate. According to the fabrication method, the entire process including forming a porous GaN layer and a thick GaN layer is performed in-situ within a single reactor. The method is significantly simplified compared to a conventional fabrication method. The fabrication method enables the entire process to be performed in one chamber while allowing GaN surface treatment and growth to be performed using HVPE process gases, thus resulting in a significant reduction in manufacturing costs.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: January 8, 2013
    Assignee: Samsung Corning Precision Materials Co., Ltd.
    Inventors: In-Jae Song, Jai-yong Han
  • Patent number: 8323407
    Abstract: The invention relates to a method and system for epitaxial deposition of a Group III-V semiconductor material that includes gallium. The method includes reacting an amount of a gaseous Group III precursor having one or more gaseous gallium precursors as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber; and supplying sufficient energy to the gaseous gallium precursor(s) prior to their reacting so that substantially all such precursors are in their monomer forms. The system includes sources of the reactants, a reaction chamber wherein the reactants combine to deposit Group III-V semiconductor material, and one or more heating structures for heating the gaseous Group III precursors prior to reacting to a temperature to decompose substantially all dimers, trimers or other molecular variations of such precursors into their component monomers.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: December 4, 2012
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Patent number: 8252112
    Abstract: A method and apparatus for the unusually high rate deposition of thin film materials on a stationary or continuous substrate. The method includes delivery of a pre-selected precursor intermediate to a deposition chamber and formation of a thin film material from the intermediate. The intermediate is formed outside of the deposition chamber and includes a metastable species such as a free radical. The intermediate is pre-selected to include a metastable species conducive to the formation of a thin film material having a low defect concentration. By forming a low defect concentration material, deposition rate is decoupled from material quality and heretofore unprecedented deposition rates are achieved. In one embodiment, the pre-selected precursor intermediate is SiH3.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: August 28, 2012
    Assignee: Ovshinsky Innovation, LLC
    Inventor: Stanford R. Ovshinsky
  • Patent number: 8226767
    Abstract: “Super-hetero-epitaxial” combinations comprise epitaxial growth of one material on a different material with different crystal structure. Compatible crystal structures may be identified using a “Tri-Unity” system. New bandgap engineering diagrams are provided for each class of combination, based on determination of hybrid lattice constants for the constituent materials in accordance with lattice-matching equations. Using known bandgap figures for previously tested materials, new materials with lattice constants that match desired substrates and have the desired bandgap properties may be formulated by reference to the diagrams and lattice matching equations. In one embodiment, this analysis makes it possible to formulate new super-hetero-epitaxial semiconductor systems, such as systems based on group IV alloys on c-plane LaF3; group IV alloys on c-plane langasite; Group III-V alloys on c-plane langasite; and group II-VI alloys on c-plane sapphire.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: July 24, 2012
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Yeonjoon Park, Sang H. Choi, Glen C. King, James R. Elliott
  • Patent number: 8197597
    Abstract: The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and equipment for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber under conditions sufficient to provide sustained high volume manufacture of the semiconductor material on one or more substrates, with the gaseous Group III precursor continuously provided at a mass flow of 50 g Group III element/hour for at least 48 hours.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: June 12, 2012
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Patent number: 8128749
    Abstract: An SOI substrate has a gettering layer of silicon-germanium (SiGe) with 5-10% Ge, and a thickness of approximately 50-1000 nm. Carbon (C) may be added to SiGe to stabilize the dislocation network. The SOI substrate may be a SIMOX SOI substrate, or a bonded SOI substrate, or a seeded SOI substrate. The gettering layer may disposed under a buried oxide (BOX) layer. The gettering layer may be disposed on a backside of the substrate.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: March 6, 2012
    Assignee: International Business Machines Corporation
    Inventors: Junedong Lee, Devendra K. Sadana, Dominic J. Schepis
  • Patent number: 8092596
    Abstract: Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth, for example to achieve n-, i-, or p-type conductivity.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: January 10, 2012
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A Dmitriev
  • Patent number: 8092597
    Abstract: Method for producing a III-N (AlN, GaN, AlxGa(1-x)N) crystal by Vapor Phase Epitaxy (VPE), the method comprising: providing a reactor having: a growth zone for growing a III-N crystal; a substrate holder located in the growth zone that supports at least one substrate on which to grow the III-N crystal; a gas supply system that delivers growth material for growing the III-N crystal to the growth zone from an outlet of the gas supply system; and a heating element that controls temperature in the reactor; determining three growth sub-zones in the growth zone for which a crystal grown in the growth sub-zones has respectively a concave, flat or convex curvature; growing the III-N crystal on a substrate in a growth region for which the crystal has a by desired curvature.
    Type: Grant
    Filed: January 22, 2011
    Date of Patent: January 10, 2012
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Vladimir A. Dmitriev, Yuri V. Melnik
  • Patent number: 8048224
    Abstract: Embodiments of the invention relate to a process for producing a III-N bulk crystal, wherein III denotes at least one element selected from group III of the periodic system, selected from Al, Ga and In, wherein the III-N bulk crystal is grown by vapor phase epitaxy on a substrate, and wherein the growth rate is measured in real-time. By actively measuring and controlling the growth rate in situ, i.e. during the epitaxial growth, the actual growth rate can be maintained essentially constant. In this manner, III-N bulk crystals and individualized III-N single crystal substrates separated therefrom, which respectively have excellent crystal quality both in the growth direction and in the growth plane perpendicular thereto, can be obtained.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: November 1, 2011
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Gunnar Leibiger, Frank Habel, Stefan Eichler
  • Patent number: 8002892
    Abstract: Affords a Group-III nitride crystal substrate that is of low dislocation density and is inexpensive to manufacture, a method of manufacturing such a substrate, and Group-III nitride semiconductor devices that incorporate the Group-III nitride crystal substrate. The Group-III nitride crystal substrate manufacturing method includes: a step of growing, by liquid-phase epitaxy, a first Group-III nitride crystal (2) onto a base substrate (1); and a step of growing, by vapor-phase epitaxy, a second Group-III nitride crystal (3) onto the first Group-III nitride crystal (2). The Group-III nitride crystal substrate, produced by such a manufacturing method, has a dislocation density of 1×107 dislocations/cm2.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: August 23, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryu Hirota, Seiji Nakahata, Masaki Ueno
  • Patent number: 7804019
    Abstract: A substrate is provided including a growth surface that is offcut relative to a plane defined by a crystallographic orientation of the substrate at an offcut angle of about 5 degrees to about 45 degrees. A thermoelectric film is epitaxially grown on the growth surface. A crystallographic orientation of the thermoelectric film may be tilted about 5 degrees to about 30 degrees relative to the growth surface. The growth surface of the substrate may also be patterned to define a plurality of mesas protruding therefrom prior to epitaxial growth of the thermoelectric film. Related methods and thermoelectric devices are also discussed.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: September 28, 2010
    Assignee: Nextreme Thermal Solutions, Inc.
    Inventors: Jonathan Pierce, Robert P. Vaudo
  • Patent number: 7799377
    Abstract: Provided is a method for depositing an organic/inorganic thin film. The method includes: i) heating a source vessel containing an organic material and an inorganic material; ii) transferring a deposition gas to a process chamber; iii) distributing the deposition gas onto a substrate disposed in the process chamber; iv) purging the process chamber; v) heating an activating agent source vessel; vi) transferring a heat initiator gas phase to the process chamber; vii) distributing the heat initiator gas phase onto the organic or inorganic material monomer deposited on the substrate through the process chamber, and forming an organic/inorganic thin film; and viii) exhausting the heat initiator gas phase and purging the process chamber. Depositing the organic/inorganic thin film in a time-division manner, the thickness of the thin film can be accurately adjusted and the deposition can be uniformly performed when the thin film is deposited on a large-scale substrate.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: September 21, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Deok Ahn, Seung Youl Kang, Chul Am Kim, Ji Young Oh, In Kyu You, Gi Heon Kim, Kyu Ha Baek, Kyung Soo Suh
  • Patent number: 7758697
    Abstract: Methods for depositing a silicon-containing film are described. The methods may include delivering a silicon compound to a surface or a substrate, and reacting the silicon compound to grow the silicon-containing film. The silicon compound may be one or more compounds having a formula selected from the group Si4X8, Si4X10, Si5X10, and Si5X12, where X is independently a hydrogen or halogen.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: July 20, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Paul B. Comita, Lance A. Scudder, David K. Carlson
  • Patent number: 7727333
    Abstract: Hydride phase vapor epitaxy (HVPE) growth apparatus, methods and materials and structures grown thereby. A HVPE growth apparatus includes generation, accumulation and growth zones. A first reactive gas reacts with an indium source inside the generation zone to produce a first gas product having an indium-containing compound. The first gas product is transported to the accumulation zone where it cools and condenses into a source material having an indium-containing compound. The source material is collected in the accumulation zone and evaporated. Vapor or gas resulting from evaporation of the source material forms reacts with a second reactive gas in the growth zone for growth of ternary and quaternary materials including indium gallium nitride, indium aluminum nitride, and indium gallium aluminum nitride.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: June 1, 2010
    Assignee: Technologies and Devices International, Inc.
    Inventors: Alexander L. Syrkin, Vladimir Ivantsov, Alexander Usikov, Oleg Kovalenkov, Vladimir A. Dmitriev
  • Patent number: 7645340
    Abstract: A method for growing a crystal of an Al-containing III-V group compound semiconductor by the conventional HVPE method, characterized in that it comprises a step of reacting Al with hydrogen halide at a temperature of 700° C. or lower to form a halide of Al. The method has allowed the suppression of the formation of aluminum chloride (AlCl) or aluminum bromide (AlBr) reacting violently with quartz, which is the material of a reaction vessel for the growth, resulting in the achievement of the vapor phase growth of an Al-containing III-V group compound semiconductor at a rate of 100 microns/hr or more, which has lead to the mass-production of a substrate and a semiconductor element having satisfactory resistance to adverse environment.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: January 12, 2010
    Assignee: Tokyo University Agriculture and Technology TLO Co., Ltd.
    Inventors: Akinori Koukitu, Yoshinao Kumagai, Tomohiro Marui
  • Patent number: 7628856
    Abstract: There is disclosed a method for producing a substrate for single crystal diamond growth, comprising at least a step of preliminarily subjecting a substrate before single crystal diamond growth to a bias treatment for forming a diamond nucleus thereon by a direct-current discharge in which an electrode in a substrate side is a cathode, and wherein in the treatment, at least, a temperature of the substrate from 40 sec after an initiation of the bias treatment to an end of the bias treatment is held in a range of 800° C.±60° C. There can be provided a method for producing a substrate for single crystal diamond growth, by which a single crystal diamond can be grown more certainly.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: December 8, 2009
    Assignees: Shin-Etsu Chemical Co., Ltd., AGD Material Co.
    Inventors: Atsuhito Sawabe, Hitoshi Noguchi, Shintaro Maeda
  • Patent number: 7608539
    Abstract: A method and an apparatus for executing efficient and cost-effective Atomic Layer Deposition (ALD) at low temperatures are presented. ALD films such as oxides and nitrides are produced at low temperatures under controllable and mild oxidizing conditions over substrates and devices that are moisture- and oxygen-sensitive. ALD films, such as oxides, nitrides, semiconductors and metals, are efficiently and cost-effectively deposited from conventional metal precursors and activated nonmetal sources. Additionally, substrate preparation methods for optimized ALD are disclosed.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: October 27, 2009
    Assignee: Sundew Technologies, LLC
    Inventor: Ofer Sneh
  • Patent number: 7566364
    Abstract: Provided may be a method of fabricating nanowires and a method of fabricating a transistor having the same. The method may include: forming a template layer on a substrate, the template layer having a first lateral surface and a second lateral surface facing the first surface; forming pores in the template layer, the pores disposed between the first lateral surface and the second lateral surface in the template layer and having first apertures in the first lateral surface; forming a single-crystalline material layer contacting the first apertures disposed in the first lateral surface of the template layer; forming second apertures connecting pores disposed in the second lateral surface; supplying gaseous crystal growth materials through the second apertures; and forming crystalline nanowires in the pores by crystal growth from the single-crystalline material layer. The nanowires may be made of crystalline materials, e.g., Si or SiGe, and may be formed parallel to the substrate.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: July 28, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wenxu Xianyu, Young-Soo Park, Takashi Noguchi, Hans S. Cho, Xiaoxin Zhang, Huaxiang Yin
  • Patent number: 7556688
    Abstract: A method for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth to achieve n-, i-, or p-type conductivity. In order to have growth cycles of sufficient duration, preferably an extended Ga source is used in which a portion of the Ga source is maintained at a relatively high temperature while most of the Ga source is maintained at a temperature close to, and just above, the melting temperature of Ga. To grow large boules of AlGaN, preferably multiple Al sources are used, the Al sources being sequentially activated to avoid Al source depletion and excessive degradation.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: July 7, 2009
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
  • Patent number: 7553369
    Abstract: The invention relates to a process for modifying the properties of a thin layer (1) formed on the surface of a support (2) forming a substrate (3) utilised in the field of microelectronics, nanoelectronics or microtechnology, nanotechnology, characterised in that it consists of: forming at least one thin layer (1) on a nanostructured support with specific upper surface (2), and treating the nanostructured support with specific upper surface (2) to generate internal strains in the support causing its deformation at least in the plane of the thin layer so as to ensure corresponding deformation of the thin layer to modify its properties.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: June 30, 2009
    Assignee: Universite Claude Bernard Lyon 1
    Inventors: Olivier Marty, Volodymyr Lysenko
  • Patent number: 7501023
    Abstract: A method and apparatus for growing low defect, optically transparent, colorless, crack-free, substantially flat, single crystal Group III nitride epitaxial layers with a thickness of at least 10 microns is provided. These layers can be grown on large area substrates comprised of Si, SiC, sapphire, GaN, AlN, GaAs, AlGaN and others. In one aspect, the crack-free Group III nitride layers are grown using a modified HVPE technique. If desired, the shape and the stress of Group III nitride layers can be controlled, thus allowing concave, convex and flat layers to be controllably grown. After the growth of the Group III nitride layer is complete, the substrate can be removed and the freestanding Group III nitride layer used as a seed for the growth of a boule of Group III nitride material. The boule can be sliced into individual wafers for use in the fabrication of a variety of semiconductor structures (e.g., HEMTs, LEDs, etc.).
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: March 10, 2009
    Assignee: Technologies and Devices, International, Inc.
    Inventors: Vladimir A. Dmitriev, Yuri V. Melnik
  • Patent number: 7488385
    Abstract: The invention concerns the preparation of gallium nitride films by epitaxy with reduced defect density levels. It concerns a method for producing a gallium nitride (GaN) film by epitaxial deposition of GaN. The invention is characterized in that it comprises at least a step of epitaxial lateral overgrowth and in that it comprises a step which consists in separating part of the GaN layer from its substrate by embrittlement through direct ion implantation in the GaN substrate. The invention also concerns the films obtainable by said method as well as the optoelectronic and electronic components provided with said gallium nitride films.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: February 10, 2009
    Assignee: Lumilog
    Inventors: Hacène Lahreche, Gilles Nataf, Bernard Beaumont
  • Patent number: 7481881
    Abstract: Affords a method of manufacturing GaN crystal substrate in which enlargement of pit size in the growing of GaN crystal is inhibited to enable GaN crystal substrate with a high substrate-acquisition rate to be produced. The method of manufacturing GaN crystal substrate includes a step of growing GaN crystal (4) by a vapor growth technique onto a growth substrate (1), the GaN-crystal-substrate manufacturing method being characterized in that in the step of growing the GaN crystal (4), pits (6) that define facet planes (5F) are formed in the crystal-growth surface, and being characterized by having the pit-size increase factor of the pits (6) be 20% or less.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: January 27, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Takuji Okahisa
  • Patent number: 7455729
    Abstract: The invention concerns a method for preparing gallium nitride films by vapour-phase epitaxy with low defect densities. The invention concerns a method for producing a gallium nitride (GaN) film from a substrate by vapour-phase epitaxy deposition of gallium nitride. The invention is characterized in that the gallium nitride deposition comprises at least one step of vapour-phase epitaxial lateral overgrowth, in that at least one of said epitaxial lateral overgrowth steps is preceded by etching openings either in a dielectric mask previously deposited, or directly into the substrate, and in that it consists in introducing a dissymmetry in the environment of dislocations during one of the epitaxial lateral overgrowth steps so as to produce a maximum number of curves in the dislocations, the curved dislocations not emerging at the surface of the resulting gallium nitride layer. The invention also concerns the optoelectronic and electronic components produced from said gallium nitride films.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: November 25, 2008
    Assignee: Lumilog
    Inventors: Bernard Beaumont, Pierre Gibart, Jean-Pierre Faurie
  • Patent number: 7438761
    Abstract: A hydrogen chloride gas and an ammonia gas are introduced with a carrier gas into a reactor in which a substrate and at least an aluminum metallic material through conduits. Then, the hydrogen gas and the ammonia gas are heated by heaters, and thus, a III-V nitride film including at least Al element is epitaxially grown on the substrate by using a Hydride Vapor Phase Epitaxy method. The whole of the reactor is made of an aluminum nitride material which does not suffer from the corrosion of an aluminum chloride gas generated by the reaction of an aluminum metallic material with a hydrogen chloride gas.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: October 21, 2008
    Assignee: NGK Insulators, Ltd.
    Inventors: Tomohiko Shibata, Keiichiro Asai, Mitsuhiro Tanaka
  • Patent number: 7402206
    Abstract: A method of synthesizing or growing a compound having the general formula Mn+1AXn(16) where M is a transition metal, n is 1, 2, 3 or higher, A is an A-group element and X is carbon, nitrogen or both, which comprises the step of exposing a substrate to gaseous components and/or components vaporized from at least one solid source (13, 14, 15) whereby said components react with each other to produce the Mn+1AXn (16) compound.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: July 22, 2008
    Assignee: ABB AB
    Inventors: Peter Isberg, Jens-Petter Palmquist, Ulf Jansson, Lars Hultman, Jens Birch, Timo Seppänen
  • Patent number: 7399357
    Abstract: A method for the controlled growth of thin films by atomic layer deposition by making use of multilayers and using energetic radicals to facilitate the process is described in this invention. In this method, a first reactant is admitted into the reaction chamber volume, where there is a substrate to be coated. This first reactant then adsorbs, in a self-limiting process, onto the substrate to be coated. After removing this first reactant from the reaction chamber volume, leaving a layer coating the substrate, a second reactant is then admitted into the reaction chamber volume, which adsorbs onto this initial layer in a self-limiting process. The second reactant is then also removed from the reaction chamber volume. Following this procedure a self-limited multilayer of unreacted species remains adsorbed on the substrate to be coated. If additional chemical species are desirable, these exposures and removals could be continued. Next this multilayer is exposed to a flux of radicals.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: July 15, 2008
    Inventor: Arthur Sherman
  • Patent number: 7381267
    Abstract: A method for forming, by epitaxy, a heteroatomic single-crystal semiconductor layer on a single-crystal semiconductor wafer, the crystal lattices of the layer and of the wafer being different, including forming, before the epitaxy, in the wafer surface, at least one ring of discontinuities around a useful region.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: June 3, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Daniel Bensahel, Olivier Kermarrec, Yves Morand, Yves Campidelli, Vincent Cosnier
  • Patent number: 7371281
    Abstract: A growth crucible (2) for depositing on a seed crystal substrate (5) a silicon carbide single crystal (6) using a sublimate gas of a silicon carbide raw material (11) is disposed inside of an outer crucible (1). During the course of silicon carbide single crystal, a silicon raw material (22) is continuously fed from outside into a space between the growth crucible and the outer crucible for the purpose of vaporizing the silicon raw material. An atmosphere gas surrounding the growth crucible is constituted of a silicon gas. The pressure of the atmosphere silicon gas is controlled to suppress a variation in the composition of the sublimate gas within the growth crucible to thereby grow a large-sized silicon carbide single crystal with few crystal defects on the seed crystal substrate reliably at a high growth rate.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: May 13, 2008
    Assignee: Showa Denko K.K.
    Inventors: Yasuyuki Sakaguchi, Atsushi Takagi, Naoki Oyanagi