By Pulling {c30b 29/06} Patents (Class 117/932)
  • Patent number: 11753741
    Abstract: Nitrogen-doped CZ silicon crystal ingots and wafers sliced therefrom are disclosed that provide for post epitaxial thermally treated wafers having oxygen precipitate density and size that are substantially uniformly distributed radially and exhibit the lack of a significant edge effect. Methods for producing such CZ silicon crystal ingots are also provided by controlling the pull rate from molten silicon, the temperature gradient and the nitrogen concentration. Methods for simulating the radial bulk micro defect size distribution, radial bulk micro defect density distribution and oxygen precipitation density distribution of post epitaxial thermally treated wafers sliced from nitrogen-doped CZ silicon crystals are also provided.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: September 12, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Zheng Lu, Gaurab Samanta, Tse-Wei Lu, Feng-Chien Tsai
  • Patent number: 8926749
    Abstract: A method for recharging a crucible with polycrystalline silicon comprises adding flowable chips to a crucible used in a Czochralski-type process. Flowable chips are polycrystalline silicon particles made from polycrystalline silicon prepared by a chemical vapor deposition process, and flowable chips have a controlled particle size distribution, generally nonspherical morphology, low levels of bulk impurities, and low levels of surface impurities. Flowable chips can be added to the crucible using conventional feeder equipment, such as vibration feeder systems and canister feeder systems.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: January 6, 2015
    Assignee: Hemlock Semi Conductor
    Inventors: Arvid Neil Arvidson, Terence Lee Horstman, Michael John Molnar, Chris Tim Schmidt, Roger Dale Spencer, Jr.
  • Patent number: 8906157
    Abstract: Single crystal composed of silicon with a section having a diameter that remains constant, are pulled by a method wherein the single crystal is pulled with a predefined pulling rate vp having the units [mm/min]; and the diameter of the single crystal in the section having a diameter that remains constant is regulated to the predefined diameter by regulating the heating power of a first heating source which supplies heat to the single crystal and to a region of the melt that adjoins the single crystal and is arranged above the melt, such that diameter fluctuations are corrected with a period duration T that is not longer than (2·18 mm)/vp.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: December 9, 2014
    Assignee: Siltronic AG
    Inventors: Thomas Schroeck, Wilfried von Ammon, Claus Kropshofer
  • Patent number: 8758506
    Abstract: The invention relates to a method for pulling a silicon single crystal from a melt which is contained in a crucible, comprising immersion of a seed crystal into the melt; crystallization of the single crystal on the seed crystal by raising the seed crystal from the melt with a crystal pull speed; widening the diameter of the single crystal to a setpoint diameter in a conical section, comprising control of the crystal pull speed in such a way as to induce a curvature inversion of a growth front of the single crystal in the conical section.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: June 24, 2014
    Assignee: Siltronic AG
    Inventor: Markus Baer
  • Patent number: 8758505
    Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: June 24, 2014
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Toshiaki Ono, Wataru Sugimura, Masataka Hourai
  • Patent number: 8741059
    Abstract: According to the present invention, there is provided a single-crystal manufacturing apparatus based on Czochralski method, comprising at least: a main chamber configured to accommodate hot zone components including a crucible; and a pull chamber configured to accommodate and take out a single crystal pulled from a raw material melt contained in the crucible, wherein the apparatus further comprises: a cooling pipe which is arranged above the crucible and in which a cooling medium is circulated; and a moving mechanism that moves up and down the cooling pipe, and the hot zone components are cooled down by utilizing the moving mechanism to move down the cooling pipe toward the crucible after growth of the single crystal, and a method for manufacturing a single crystal is also provided.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: June 3, 2014
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Takao Abe
  • Patent number: 8721787
    Abstract: A method for manufacturing a silicon single crystal is provided including producing a silicon melt in a chamber by melting a silicon raw material loaded into a silica glass crucible under a reduced pressure and high temperature, removing gas bubbles from within the silicon melt by rapidly changing at least the pressure or temperature within the chamber, and pulling up the silicon single crystal from the silicon melt after the gas bubbles are removed. When the pressure is rapidly changed, the pressure within the chamber is rapidly changed at a predetermined change ratio. In addition, when the temperature is rapidly changed, the temperature within the chamber is rapidly changed at a predetermined change ratio. In this way, Ar gas attached to an inner surface of the crucible and h is the cause of the generation of SiO gas is removed.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: May 13, 2014
    Assignee: Japan Super Quartz Corporation
    Inventors: Yukinaga Azuma, Masaki Morikawa
  • Patent number: 8691008
    Abstract: Pulling systems are disclosed for measuring the weight of an object coupled to a first end of a cable. The cable is routed over a pulley suspended from a load cell. The force exerted by the cable on the pulley is used to calculate the weight of the object. The second end of the cable is coupled to a drum which when rotated pulls the object by wrapping the cable around the drum. An arm is coupled to the pulley at one end and to a frame at another end. A path travelled by the cable between the pulley and the drum is substantially parallel to a longitudinal axis of the arm. Horizontal force components are transmitted by the arm to the frame and do not affect a force component measured by the load cell, thus increasing the accuracy of the calculated weight of the object.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: April 8, 2014
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Harold Korb, Richard J. Phillips
  • Patent number: 8655471
    Abstract: This impurity amount control system for manufacturing a single crystal has a resistivity profile memory which stores a resistivity profile for a portion of a single crystal that is rendered into wafers; a simulator which determines a resistivity profile formula for indicating a resistivity profile within a reusable ingot that is the reusable material in the single crystal from an impurity concentration estimating formula including one or more variables selected from among resistivities at both ends of the reusable ingot in the crystal growth axis direction, the impurity concentration when crystal pulling begins, a segregation coefficient, a solidification ratio and a correction coefficient, and from the resistivity profile; and an impurity amount calculator which calculates, based on the resistivity profile formula, the amount of impurity within the reusable ingot.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: February 18, 2014
    Assignee: Sumco Corporation
    Inventor: Kenji Kawahara
  • Patent number: 8617311
    Abstract: In this silicon single crystal wafer for IGBT, COP defects and dislocation clusters are eliminated from the entire region in the radial direction of the crystal, the interstitial oxygen concentration is 8.5×1017 atoms/cm3 or less, and variation in resistivity within the wafer surface is 5% or less. This method for manufacturing a silicon single crystal wafer for IGBT includes introducing a hydrogen atom-containing substance into an atmospheric gas at a hydrogen gas equivalent partial pressure of 40 to 400 Pa, and growing a single crystal having an interstitial oxygen concentration of 8.5×1017 atoms/cm3 or less at a silicon single crystal pulling speed enabling pulling of a silicon single crystal free of grown-in defects. The pulled silicon single crystal is irradiated with neutrons so as to dope with phosphorous; or an n-type dopant is added to the silicon melt; or phosphorous is added to the silicon melt so that the phosphorous concentration in the silicon single crystal is 2.9×1013 to 2.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: December 31, 2013
    Assignee: Sumco Corporation
    Inventors: Toshiaki Ono, Shigeru Umeno, Wataru Sugimura, Masataka Hourai
  • Patent number: 8535439
    Abstract: To provide a manufacturing method for a silicon single crystal that can reduce introduction of dislocation thereinto even if a required amount of dopant is added to a melt while growing a straight body portion of a silicon ingot. In a manufacturing method for a silicon single crystal according to the present invention that includes a dopant addition step of adding a dopant to a melt while a straight body portion of a silicon single crystal is growing in a growth step of growing the silicon single crystal by dipping a seed crystal into a silicon melt and then pulling the seed crystal therefrom, in the dopant addition step, a remaining mass of the melt is calculated at the beginning thereof, and the dopant is added to the melt at a rate of 0.01 to 0.035 g/min·kg per minute per 1 kg of the calculated remaining mass of the melt.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: September 17, 2013
    Assignee: Sumco Techxiv Corporation
    Inventors: Yasuhito Narushima, Toshimichi Kubota, Shinichi Kawazoe, Fukuo Ogawa, Tomohiro Fukuda
  • Patent number: 8529695
    Abstract: Silicon wafer manufacturing method including cleaning polycrystalline silicon with dissolved ozone aqueous solution, cleaning the polycrystalline silicon with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the polycrystalline silicon with ultra pure water, melting the rinsed polycrystalline silicon and pulling a single crystal silicon ingot from the molten silicon liquid at a solidification ratio of 0.9 or less, making the pulled single crystal silicon ingot into block-shaped or grain-shaped single crystal silicon, cleaning with dissolved ozone aqueous solution, cleaning with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the single crystal silicon with ultra pure water, remelting and pulling a single crystal silicon ingot at a solidification of 0.9 or less, and forming a silicon wafer out of the single crystal silicon ingot.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: September 10, 2013
    Assignee: Sumco Corporation
    Inventors: Kazuhiro Harada, Hisashi Furuya
  • Patent number: 8328932
    Abstract: A ribbon crystal pulling furnace has an interior for enclosing at least a portion of one or more ribbon crystals, and an afterheater positioned within the interior. The afterheater has at least one wall with one or more openings that facilitate control of the temperature profile within the furnace.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: December 11, 2012
    Assignee: Evergreen Solar, Inc
    Inventors: Weidong Huang, David Harvey, Scott Reitsma
  • Patent number: 8231725
    Abstract: Semiconductor wafers of silicon are produced by pulling a single crystal growing on a phase boundary from a melt contained in a crucible and cutting of semiconductor wafers therefrom, wherein during pulling of the single crystal, heat is delivered to a center of the phase boundary and a radial profile of a ratio V/G from the center to an edge of the phase boundary is controlled, G being the temperature gradient perpendicular to the phase boundary and V being the pull rate. The radial profile of the ratio V/G is controlled so that the effect of thermomechanical stress in the single crystal adjoining the phase boundary, is compensated with respect to creation of intrinsic point defects. The invention also relates to defect-free semiconductor wafers of silicon, which can be produced economically by this method.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: July 31, 2012
    Assignee: Siltronic AG
    Inventors: Andreas Sattler, Wilfried von Ammon, Martin Weber, Walter Haeckl, Herbert Schmidt
  • Patent number: 8187378
    Abstract: An object of the present invention is to provide a silicon single crystal pulling method of accurately controlling the diameter of a silicon single crystal, thereby obtaining a high-quality silicon single crystal with little crystal defect. According to an aspect of the present invention, the pulling step includes: capturing an image of the silicon single crystal using an imaging device; measuring the brightness distribution of a fusing ring generated in the vicinity of a solid-liquid interface between the silicon melt and the silicon single crystal for each image scan line in the image captured by the imaging device; detecting the liquid level of the silicon melt and the position of the solid-liquid interface; and controlling the diameter of the silicon single crystal on the basis of a meniscus height, which is a difference between the liquid level and the position of the solid-liquid interface.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: May 29, 2012
    Assignee: Sumco Corporation
    Inventor: Keiichi Takanashi
  • Patent number: 8114216
    Abstract: The present invention relates to a semiconductor single crystal growth method, which uses a Czochralski process for growing a semiconductor single crystal through a solid-liquid interface by dipping a seed into a semiconductor melt received in a quartz crucible and pulling up the seed while rotating the quartz crucible and applying a strong horizontal magnetic field, wherein the seed is pulled up while the quartz crucible is rotated with a rate between 0.6 rpm and 1.5 rpm.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: February 14, 2012
    Assignee: Siltron, Inc.
    Inventors: Hyon-Jong Cho, Seung-Ho Shin, Ji-Hun Moon, Hong-Woo Lee, Young-Ho Hong
  • Patent number: 8110042
    Abstract: Using a pulling-up apparatus, an oxygen concentration of the monocrystal at a predetermined position in a pulling-up direction is controlled based on a relationship in which the oxygen concentration of the monocrystal is decreased as a flow rate of the inactive gas at a position directly above a free surface of the dopant-added melt is increased when the monocrystal is manufactured with a gas flow volume in the chamber being in the range of 40 L/min to 400 L/min and an inner pressure in the chamber being in the range of 5332 Pa to 79980 Pa. Based on the relationship, oxygen concentration is elevated to manufacture the monocrystal having a desirable oxygen concentration. Because the oxygen concentration is controlled under a condition corresponding to a condition where the gas flow rate is rather slow, the difference between a desirable oxygen concentration profile of the monocrystal and an actual oxygen concentration profile is reduced.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: February 7, 2012
    Assignee: Sumco Techxiv Corporation
    Inventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Tsuneaki Tomonaga, Yasuyuki Ohta, Toshimichi Kubota, Shinsuke Nishihara
  • Patent number: 8105436
    Abstract: A single crystal silicon wafer for use in the production of insulated gate bipolar transistors is made of single crystal silicon grown by the Czochralski method and has a gate oxide with a film thickness of from 50 to 150 nm. The wafer has an interstitial oxygen concentration of at most 7.0×1017 atoms/cm3, a resistivity variation within the plane of the wafer of at most 5% and, letting tox (cm) be the gate oxide film thickness and S (cm2) be the electrode surface area when determining the TZDB pass ratio, a density d (cm?3) of crystal originated particles (COP) having a size at least twice the gate oxide film thickness which satisfies the formula d??ln(0.9)/(S·tox/2). The wafers have an increased production yield and a small resistivity variation.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: January 31, 2012
    Assignee: Sumco Corporation
    Inventor: Shigeru Umeno
  • Patent number: 8043427
    Abstract: Semiconductor wafers of silicon are produced by pulling a single crystal growing on a phase boundary from a melt contained in a crucible and cutting of semiconductor wafers therefrom, wherein during pulling of the single crystal, heat is delivered to a center of the phase boundary and a radial profile of a ratio V/G from the center to an edge of the phase boundary is controlled, G being the temperature gradient perpendicular to the phase boundary and V being the pull rate. The radial profile of the ratio V/G is controlled so that the effect of thermomechanical stress in the single crystal adjoining the phase boundary, is compensated with respect to creation of intrinsic point defects. The invention also relates to defect-free semiconductor wafers of silicon, which can be produced economically by this method.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: October 25, 2011
    Assignee: Siltronic AG
    Inventors: Andreas Sattler, Wilfried von Ammon, Martin Weber, Walter Haeckl, Herbert Schmidt
  • Patent number: 8012255
    Abstract: An improvement to a method and an apparatus for growing a monocrystalline silicon ingot from silicon melt according to the CZ process. The improvement performs defining an error between a target taper of a meniscus and a measured taper, and translating the taper error into a feedback adjustment to a pull-speed of the silicon ingot. The conventional control model for controlling the CZ process relies on linear control (PID) controlling a non-linear system of quadratic relationship defined in the time domain between the diameter and the pull-speed. The present invention transforms the quadratic relationship in the time domain between the diameter and the pull-speed into a simile, linear relationship in the length domain between a meniscus taper of the ingot and the pull-speed.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: September 6, 2011
    Assignees: Sumco Phoenix Corporation, Sumco Corporation
    Inventors: Benno Orschel, Joel Kearns, Keiichi Takanashi, Volker Todt
  • Patent number: 7909930
    Abstract: A method for producing a silicon single crystal by the Czochralski method with carbon-doping comprising: charging a polycrystalline silicon material and any one of a carbon dopant selected from the group consisting of an organic compound, an organic compound and a silicon wafer, carbon powder and a silicon wafer, an organic compound and carbon powder, and an organic compound and carbon powder and a silicon wafer into a crucible and melting the polycrystalline silicon material and the carbon dopant; and then growing a silicon single crystal from the melt of the polycrystalline silicon material and the carbon dopant. And a carbon-doped silicon single crystal produced by the method. Thereby, there is provided a method for producing a silicon single crystal with carbon-doping in which the crystal can be doped with carbon easily at low cost, and carbon concentration in the crystal can be controlled precisely.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: March 22, 2011
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Naoki Nagai, Izumi Fusegawa
  • Patent number: 7875117
    Abstract: An epitaxial wafer and a high-temperature heat treatment wafer having an excellent gettering capability are obtained by performing epitaxial growth or a high-temperature heat treatment. A relational equation relating the density to the radius of an oxygen precipitate introduced in a silicon crystal doped with nitrogen at the time of crystal growth can be derived from the nitrogen concentration and the cooling rate around 1100° C. during crystal growth, and the oxygen precipitate density to be obtained after a heat treatment can be predicted from the derived relational equation relating the oxygen precipitate density to the radius, the oxygen concentration, and the wafer heat treatment process. Also, an epitaxially grown wafer and a high-temperature annealed wafer whose oxygen precipitate density has been controlled to an appropriate density are obtained, using conditions predicted by the method.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: January 25, 2011
    Assignee: Sumco Techxiv Corporation
    Inventors: Kouzo Nakamura, Susumu Maeda, Kouichirou Hayashida, Takahisa Sugiman, Katsuhiko Sugisawa
  • Patent number: 7819972
    Abstract: In a method for growing a silicon single crystal, a silicon single crystal is grown by the Czochralski method to have an oxygen concentration of 12×1017 to 18×1017 atoms/cm3 on ASTM-F121 1979. A mixed gas of an inert gas and a gaseous substance containing hydrogen atoms is used as an atmospheric gas for growing the single crystal. A temperature of the silicon single crystal is controlled during the growth of the crystal such that the ratio Gc/Ge of an axial thermal gradient Gc at the central portion of the crystal between its melting point and its temperature of 1350° C. to an axial thermal gradient Ge at the periphery of the crystal between its melting point and its temperature of 1350° C. is 1.1 to 1.4. The axial thermal gradient Gc at the central portion of the crystal is 3.0 to 3.5° C./mm.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: October 26, 2010
    Assignee: Sumco Corporation
    Inventors: Shuichi Inami, Nobumitsu Takase, Yasuhiro Kogure, Ken Hamada, Tsuyoshi Nakamura
  • Patent number: 7767020
    Abstract: A method for manufacturing a single crystal semiconductor, in which, in a process of pulling up the single crystal semiconductor from melt for growing it, an impurity is incorporated more uniformly into the single crystal semiconductor so that a variation in impurity concentration across the semiconductor wafer surface can be reduced, and thus, the planarity of the wafer can be improved. In the process of pulling-up the single crystal semiconductor (6), fluctuation in a pulling-up speed is controlled, whereby the variation in concentration of the impurity in the single crystal semiconductor (6) is reduced. Especially, a width of speed fluctuation (?V) in 10 seconds is adjusted to less than 0.025 mm/min. Furthermore, in carrying out the control for adjusting the pulling-up speed such that a diameter of the single crystal semiconductor (6) becomes a desired diameter, a magnetic field having strength of 1,500 gauss or more is applied to the melt (5).
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: August 3, 2010
    Assignee: Sumco Techxiv Corporation
    Inventors: Hiroshi Inagaki, Masanori Honma, Shigeki Kawashima, Masahiro Shibata
  • Patent number: 7754009
    Abstract: Unpolished semiconductor wafers are produced by: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the semiconductor wafer with an etchant, and (g) cleaning the semiconductor wafer. The unpolished semiconductor wafers have, on at least the front side, a reflectivity of 95% or more, a surface roughness of 3 nm or less, have a thickness of 80-2500 ?m, an overall planarity value GBIR of 5 ?m or less with an edge exclusion of 3 mm and a photolithographic resolution of at least 0.8 ?m, and which furthermore contain a native oxide layer with a thickness of 0.5-3 nm on both sides.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: July 13, 2010
    Assignee: Siltronic AG
    Inventors: Wolfgang Hensel, Rudolf Lehner, Helmut Schwenk
  • Patent number: 7704318
    Abstract: When growing a silicon single crystal free of grown-in defects based on the CZ method, the crystal is pulled out at a critical pulling rate at which a ring-shaped OSF occurrence region vanishes in a center portion of the crystal by using a hot zone structure in which a temperature gradient Gc in a center portion of the crystal is equal to or greater than a temperature gradient Ge in a peripheral portion of the crystal, while supplying an inert gas including hydrogen to an interior of a pulling furnace. The critical pulling rate at which the ring-shaped OSF occurrence region vanishes in the center portion of the crystal is increased, and single crystals free of grown-in defects in which dislocation clusters and COPs can be grown by pulling at a pulling rate higher than that of the prior art.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: April 27, 2010
    Assignee: Sumco Corporation
    Inventors: Masataka Hourai, Wataru Sugimura, Toshiaki Ono, Tadami Tanaka
  • Patent number: 7686887
    Abstract: An object of the invention is to provide a quartz glass crucible reduced in the generation of vibration occurring on the surface of a silicon melt and free from the generation of rough surface and cristobalite spots, yet capable of pulling up single crystal silicon stably and at high yield even in long-term operations; it is also an object to provide a method for producing the same. In a quartz glass crucible for pulling up single crystal silicon comprising a crucible base body having a bottom part and a straight shell part with an inner layer provided to the inner surface thereof, the quartz glass crucible is characterized by that said inner layer comprises a synthetic quartz glass layer from the lowest end to at least a height of 0.25 H; a naturally occurring quartz glass layer or a mixed layer of naturally occurring quartz glass and synthetic quartz glass extended in a range of from at least 0.5 H to 0.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: March 30, 2010
    Assignees: Heraeus Quarzglas GmbH & Co. KG, Shin-Etsu Quartz Products Co., Ltd.
    Inventors: Yasuo Ohama, Takayuki Togawa
  • Patent number: 7670429
    Abstract: High throughput screening of crystallization of a target material is accomplished by simultaneously introducing a solution of the target material into a plurality of chambers of a microfabricated fluidic device. The microfabricated fluidic device is then manipulated to vary the solution condition in the chambers, thereby simultaneously providing a large number of crystallization environments. Control over changed solution conditions may result from a variety of techniques, including but not limited to metering volumes of crystallizing agent into the chamber by volume exclusion, by entrapment of volumes of crystallizing agent determined by the dimensions of the microfabricated structure, or by cross-channel injection of sample and crystallizing agent into an array of junctions defined by intersecting orthogonal flow channels.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: March 2, 2010
    Assignee: The California Institute of Technology
    Inventors: Stephen R. Quake, Carl L. Hansen, James M. Berger
  • Patent number: 7629054
    Abstract: A single crystal silicon wafer for use in the production of insulated gate bipolar transistors is made of single crystal silicon grown by the Czochralski method and has a gate oxide with a film thickness of from 50 to 150 nm. The wafer has an interstitial oxygen concentration of at most 7.0×1017 atoms/cm3, a resistivity variation within the plane of the wafer of at most 5% and, letting tox (cm) be the gate oxide film thickness and S (cm2) be the electrode surface area when determining the TZDB pass ratio, a density d (cm?3) of crystal originated particles (COP) having a size at least twice the gate oxide film thickness which satisfies the formula d??ln(0.9)/(S·tox/2). The wafers have an increased production yield and a small resistivity variation.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: December 8, 2009
    Assignee: Sumco Corporation
    Inventor: Shigeru Umeno
  • Patent number: 7621996
    Abstract: A method for producing a silicon wafer that has a carbon concentration of 5×1015 to 5×1017 atoms/cm3, interstitial oxygen concentration of 6.5×1017 to 13.5×1017 atoms/cm3, and a resistivity of 100 ?cm or more.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: November 24, 2009
    Assignee: Sumco Corporation
    Inventor: Kazunari Kurita
  • Patent number: 7594966
    Abstract: A method for producing a single crystal by pulling a single crystal from a raw material melt in a chamber according to the Czochralski method, including pulling a single crystal having a defect-free region, which is outside an OSF region, to occur in a ring shape in the radial direction, and in which interstitial-type and vacancy-type defects do not exist. The pulling of the single crystal is controlled so that an average cooling rate in passing through a temperature region of the melting point of the single crystal to 950° C. is in the range of 0.96° C./min or more, an average cooling rate in passing through a temperature region of 1150° C. to 1080° C. is in the range of 0.88° C./min or more, and an average cooling rate in passing through a temperature region of 1050° C. to 950° C. is in the range of 0.71° C./min or more.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: September 29, 2009
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Susumu Sonokawa
  • Patent number: 7582160
    Abstract: In silicon single crystal growth by the Czochralski method using a quartz crucible, a silicon single crystals with a uniform distribution of oxygen concentration can be produced in high yield without being affected by changes of crystal diameter and initial amount of melt feedstock. The oxygen concentration is adjusted by estimating oxygen concentration during growth on the basis of a relationship among three parameters: crucible rotation rate (?), crucible temperature (T), and the ratio (?) of contact area of molten silicon with the inner wall of the crucible and with atmospheric gas, and by associating the temperature (T) with the ratio (?) by the function 1/?×Exp(?E/T) where E is the dissolution energy (E) of quartz into molten silicon to control at least one of the rotation rate (?) and temperature (T) to conform the estimated oxygen concentration to a target concentration.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: September 1, 2009
    Assignee: Siltronic AG
    Inventors: Yutaka Kishida, Seiki Takebayashi, Teruyuki Tamaki
  • Patent number: 7473314
    Abstract: A silicon single crystal is grown using the Czochralski method. During the crystal growth, a thermal stress is applied to at least a portion of the silicon single crystal. A gaseous substance containing hydrogen atoms is used as an atmospheric gas for growing the crystal.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: January 6, 2009
    Assignee: Sumco Corporation
    Inventors: Shuichi Inami, Nobumitsu Takase, Yasuhiro Kogure, Ken Hamada, Tsuyoshi Nakamura
  • Patent number: 7442251
    Abstract: This method for producing silicon single crystals includes: growing a silicon single crystal by the Czochralski method while cooling at least part of the silicon single crystal under growth with a cooling member which circumferentially surrounds the silicon single crystal and has an inner contour that is coaxial with a pull axis, wherein an ambient gas in which the silicon single crystal is grown includes a hydrogen-atom-containing substance in gaseous form. This silicon single crystal is produced by the above method.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: October 28, 2008
    Assignee: Sumco Corporation
    Inventors: Shuichi Inami, Hiroki Murakami, Nobumitsu Takase, Ken Hamada, Tsuyoshi Nakamura
  • Patent number: 7431764
    Abstract: The axial temperature gradient G at the vicinity of the solid-liquid interface 24 in an ingot is calculated in consideration of the heating value of a heater 18, the dimensions and physical property values of furnace inside components and the convection of the melt 12 before pulling up the single crystal ingot 15 by a puller 10 by use of a numerical simulation of synthetic heater transfers and a numerical simulation of melt convection. Then, the pulling velocity V of the single crystal ingot is determined from an value experienced of the ratio C=V/G of the pulling velocity V and the axial temperature gradient G of the single crystal ingot at which the single crystal ingot becomes defect-free, obtained when the single crystal ingot was pulled up by a same type puller as the puller in the past, and the axial temperature gradient G calculated by use of the simulations.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: October 7, 2008
    Assignee: Sumco Corporation
    Inventors: Senlin Fu, Naoki Ono
  • Patent number: 7399356
    Abstract: A film structure of a ferroelectric single crystal which can be beneficially used in the fabrication of high-performance electric and electronic parts and devices is prepared by forming an electrode layer having a perovskite crystal structure on a substrate made of a silicon or ferroelectric single crystal optionally polished to have a off-axis crystal structure, and epitaxially growing a layer of a ferroelectric single crystal thereon by pulsed laser deposition (PLD) or metallorganic chemical vapor deposition (MOCVD).
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: July 15, 2008
    Assignee: Ibule Photonics, Inc.
    Inventors: Jaehwan Eun, Sang-Goo Lee, Hyeongjoon Kim, Minchan Kim
  • Patent number: 7387676
    Abstract: In a process for producing silicon semiconductor wafers, a silicon single crystal is pulled using the Czochralski method and is processed to form semiconductor wafers, a ratio V/G of pulling rate V and axial temperature gradient G at a growth front during the pulling of the single crystal being controlled in such a manner that agglomerated vacancy defects above a critical size are formed in the single crystal, the agglomerated vacancy defects, in a region of the semiconductor wafer that is of relevance to electronic components, shrinking during production of the components such that the size in this region no longer exceeds the critical size. Silicon semiconductor wafers with agglomerated vacancy defects in the relevant device region preferably contain agglomerated vacancy defects having an inner surface which is at least partially free of an oxide layer and a size of less than 50 nm.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: June 17, 2008
    Assignee: Siltronic AG
    Inventors: Wilfried von Ammon, Walter Haeckl, Andreas Huber, Ulrich Lambert
  • Patent number: 7374741
    Abstract: In this method for growing a silicon single crystal, an ambient gas where a single crystal is grown contains a gas hydrogen-containing substance, and a silicon single crystal is grown at a pull rate to form a dislocation cluster defect occurrence region at least in a portion of a radial cross section of said silicon single crystal and at a pull rate which is slower than that to form an laser scattering tomography defect occurrence region, according to the Czochralski method. This silicon wafer is sampled from a straight body of the silicon single crystal grown using said method for growing a silicon single crystal, and the LPD density of LPD of 0.09 ?m or greater in the surface after 10 times of repetitions of the SC-1 cleaning is 0.1/cm2 or less.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: May 20, 2008
    Assignee: Sumco Corporation
    Inventors: Toshiaki Ono, Wataru Sugimura, Masataka Hourai
  • Patent number: 7364617
    Abstract: A silicon carbide seeded sublimation method is disclosed. The method includes the steps of nucleating growth on a seed crystal growth face that is between about 1° and 10° off-axis from the (0001) plane of the seed crystal while establishing a thermal gradient between the seed crystal and a source composition that is substantially perpendicular to the basal plane of the off-axis crystal.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: April 29, 2008
    Assignee: Cree, Inc.
    Inventors: Stephan Mueller, Adrian Powell, Valeri F. Tsvetkov
  • Patent number: 7344596
    Abstract: To reduce the heat input to the bottom of the crucible and to control heat extraction independently of heat input, a shield can be raised between a heating element and a crucible at a controlled speed as the crystal grows. Other steps could include moving the crucible, but this process can avoid having to move the crucible. A temperature gradient is produced by shielding only a portion of the heating element; for example, the bottom portion of a cylindrical element can be shielded to cause heat transfer to be less in the bottom of the crucible than at the top, thereby causing a stabilizing temperature gradient in the crucible.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: March 18, 2008
    Assignee: Crystal Systems, Inc.
    Inventors: Frederick Schmid, Chandra P. Khattak, David B. Joyce
  • Patent number: 7282094
    Abstract: To precisely predict the distribution of densities and sizes of void defects comprising voids and inner wall oxide membranes in a single crystal. The computer-based simulation determines, at steps 1 to 7, the distribution of temperatures within a single crystal 14 growing from a melt 12 from the time of its pulling-up to the time of its completing cooling with due consideration paid to convection currents in the melt 12. The computer-based simulation, at steps 8 to 15, determines the density of voids considering the cooling process of the single crystal separated from the melt, that is, the pulling-up speed of the single crystal after the separation from the melt, and reflecting the effect of slow and rapid cooling of the single crystal in the result, and relates the radius of voids with the thickness of inner wall oxide membrane developed around the voids.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: October 16, 2007
    Assignee: Sumco Corporation
    Inventors: Kounosuke Kitamura, Jun Furukawa, Naoki Ono
  • Patent number: 7244306
    Abstract: A single crystal ingot is cut to an axial direction so as to including the central axis, a sample for measurement including regions [V], [Pv], [Pi] and [I] is prepared, and a first sample and second sample are prepared by dividing the sample into two so as to be symmetrical against the central axis. A first transition metal is metal-stained on the surface of the first sample and a second transition metal different from the first transition metal is metal-stained on the surface of the second sample. The first and second samples stained with the metals are thermally treated and the first and second transition metals are diffused into the inside of the samples. Recombination lifetimes in the whole of the first and second samples are respectively measured, and the vertical measurement of the first sample is overlapped on the vertical measurement of the second sample.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: July 17, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Kazunari Kurita, Jun Furukawa
  • Patent number: 7229693
    Abstract: The present invention is directed to a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: June 12, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 7214267
    Abstract: A silicon single crystal and a method for growing a silicon single crystal are provided. A p-type silicon single crystal is grown with a uniform resistivity value in a pulling direction. Pulling is conducted by the Czochralski method from molten silicon obtained by adding phosphorus to an initial melt in an amount equivalent to 25˜35% of an absolute concentration (atoms/cc) of boron contained in the melt.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: May 8, 2007
    Assignee: Sumitomo Mitsubishi Silicon
    Inventor: Koji Kato
  • Patent number: 7204881
    Abstract: There are disclosed a silicon wafer for epitaxial growth wherein the wafer is produced by slicing a silicon single crystal grown with doping nitrogen according to the Czochralski method (CZ method) in the region where at least the center of the wafer becomes V region in which the void type defects are generated, and wherein the number of defects having an opening size of 20 nm or less among the void type defects appearing on the surface of the wafer is 0.02/cm2 or less, and an epitalial wafer wherein an epitaxial layer is formed on the silicon wafer for epitaxial growth. Thereby, there can be produced an epitaxial wafer having a high gettering capability wherein very few SF exist in the epitaxial layer easily at high productivity and at low cost.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: April 17, 2007
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Susumu Sonokawa
  • Patent number: 7160387
    Abstract: This invention provides a high purity silica crucible having low impurity concentration in its inner portion, and its production method. The crucible, in which at least each content of Na and Li being contained in the depth of 1 mm from the inside surface is less than 0.05 ppm, is given by a production method of a high purity silica glass crucible, wherein a purity of the melted silica powder layer is increased by applying a voltage between a mold and an arc electrode to move impurity metals being contained in the melted silica glass layer to the outside, when the silica crucible is produced by arc plasma heating a raw material powder of silica in an inside surface of a hollow rotary mold. The method comprises, keeping an arc electrode potential of within ±500 V during an arc melting, applying a voltage of from ?1000 V to ?20000 V to a mold being insulated to the ground, and applying a high voltage to the un-melted silica powder layer of the outside.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: January 9, 2007
    Assignee: Japan Super Quartz Corporation
    Inventors: Hiroshi Kishi, Masanori Fukui, Yoshiyuki Tsuji
  • Patent number: 7135069
    Abstract: An inexpensive method of coating silicon shot with boron atoms comprises (1) immersing silicon shot in an aqueous solution comprising a boric acid and polyvinyl alcohol, and (2) heating the solution so as to evaporate water and form a polymerized polyvinyl alcohol coating containing boron on the shot. A precise amount of this coated shot may then be mixed with a measured quantity of intrinsic silicon pellets and the resulting mixture may then be melted to provide a boron-doped silicon melt for use in growing p-type silicon bodies that can be converted to substrates for photovoltaic solar cells.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: November 14, 2006
    Assignee: Schott Solar, Inc.
    Inventor: Bernhard P. Piwczyk
  • Patent number: 7132091
    Abstract: A single crystal silicon ingot having a constant diameter portion that contains arsenic dopant atoms at a concentration which results in the silicon having a resistivity that is less than about 0.003 ?·cm.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: November 7, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Milind Kulkarni, Mohsen Banan, Christopher V. Luers
  • Patent number: 7122082
    Abstract: A silicon wafer wherein stacking fault (SF) nuclei are distributed throughout the entire in-plane direction, and the density of the stacking fault nuclei is set to a range of between 0.5×108 cm?3 and 1×1011 cm?3.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: October 17, 2006
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Takaaki Shiota, Yoshinobu Nakada
  • Patent number: 7118789
    Abstract: A silica glass crucible is manufactured by introducing into a rotating crucible mold bulk silica grain to form a bulky wall including a bottom wall and a side wall. After heating the interior of the mold to begin to fuse the bulk silica grains, an inner silica grain, doped with aluminum, is introduced. The heat at least partially melts the inner silica grain, allowing it to fuse to the wall to form an inner layer. The crucible is cooled, the fused silica grains forming nuclei of crystalline silica within the inner layer.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: October 10, 2006
    Assignee: Heraeus Shin-Etsu America
    Inventors: Katsuhiko Kemmochi, Robert O. Mosier, Paul G. Spencer