Abstract: There is provided a laminated substrate having a piezoelectric film, including: a substrate; and a piezoelectric film provided on the substrate interposing a base film, wherein the piezoelectric film has an alkali niobium oxide based perovskite structure represented by a composition formula of (K1-xNax)NbO3 (0<x<1) and preferentially oriented in (001) plane direction, and a sound speed of the piezoelectric film is 5100 m/s or more.

Abstract: The superior electronic and mechanical properties of 2D-layered transition metal dichalcogenides and other 2D layered materials could be exploited to make a broad range of devices with attractive functionalities. However, the nanofabrication of such layered-material-based devices still needs resist-based lithography and plasma etching processes for patterning layered materials into functional device features. Such patterning processes lead to unavoidable contaminations, to which the transport characteristics of atomically-thin layered materials are very sensitive. More seriously, such lithography-introduced contaminants cannot be safely eliminated by conventional material wafer cleaning approaches. This disclosure introduces a rubbing-induced site-selective growth method capable of directly generating few-layer molybdenum disulfide device patterns without the need of any additional patterning processes.

Abstract: A method of fabricating a glassy carbon film is described. The method includes forming a soluble layer on a substrate, forming a lift-off stack that includes a lift-off mask layer and a hard-mask layer, and forming a pattern in the lift-off stack to expose a portion of the soluble layer. The exposed portions of the soluble layer are removed to expose a portion of the substrate. A carbon material is over the exposed portion of the substrate. The soluble layer is dissolved in a solvent, and the lift-off stack is lifted-off.

Abstract: In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.

Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.

Abstract: The invention relates to methods for the production of high quality graphene. In particular, the invention relates to single-step thermal methods which can be carried out in an ambient-air or vacuum environment using renewable biomass as a carbon source. Specifically, the invention comprises heating a metal substrate and carbon source in a sealed ambient environment to a temperature which produces carbon vapour from the carbon source such that the vapour comes into contact with the metal substrate, maintaining the temperature for a time sufficient to form a graphene lattice and then cooling the substrate at a controlled rate to form a deposited graphene.

Abstract: A method of forming an aluminum nitride film includes: preparing a substrate that comprises, in a surface thereof, a plurality of concave portions that are separated from each other; forming an aluminum nitride film on said surface of the substrate and on an inner surface of each of the concave portions such that open holes are formed in a portion of the aluminum nitride film corresponding to each of the concave portions, each of the holes being smaller than each of openings of the concave portions; and applying heat treatment to the substrate with the aluminum nitride film formed thereon in a nitrogen gas containing a carbon monoxide gas to close the holes formed in the aluminum nitride film.

Abstract: An epitaxial substrate includes a single-crystal substrate of silicon carbide, and an epitaxial layer of silicon carbide disposed on the single-crystal substrate. The epitaxial layer includes a first epitaxial layer disposed on the single-crystal substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer. The first epitaxial layer has a basal-plane-dislocation conversion rate of less than 95%. The second epitaxial layer has a basal-plane-dislocation conversion rate of more than 98%.

Abstract: A 3C—SiC buffer layer on Si(001) comprising a porous buffer layer of 3C—SiC on a Si(001) substrate, wherein the porous buffer layer is produced through a solid state reaction, and wherein an amorphous carbon layer on the Si(001) substrate is deposited by magnetron sputtering of a C target at room temperature at a rate of 0.8 nm/min.

Abstract: Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are also described.

Abstract: A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening.

Abstract: The invention relates to a method for producing a nitride semiconductor component (100), comprising the steps of: —providing a growth substrate (1) having a growth surface (10) formed from a planar area (11) with a plurality of three-dimensionally shaped surface structures (12) on said planar area (11), —growing a nitride-based semiconductor layer sequence (30) on the growth surface (10), growth beginning selectively on a growth area (13) of said growth substrate, and the growth area (13) being less than 45% of the growth surface (10). The invention also relates to a nitride semiconductor component (100) which can be produced according to said method.

Abstract: A method for removing existing basal plane dislocations (BPDs) from silicon carbide epilayers by using a pulsed rapid thermal annealing process where the BPDs in the epilayers were eliminated while preserving the epitaxial surface. This high temperature, high pressure method uses silicon carbide epitaxial layers with a carbon cap to protect the surface. These capped epilayers are subjected to a plurality of rapid heating and cooling cycles.

Abstract: A method for procuring a nitride compound semiconductor device is disclosed. In an embodiment the method includes growing a first nitride compound semiconductor layer onto a growth substrate, depositing a masking layer, growing a second nitride compound semiconductor layer onto the masking layer, growing a third nitride compound semiconductor layer onto the second nitride compound semiconductor layer such that the third nitride compound semiconductor layer has non-planar structures and growing a fourth nitride compound semiconductor layer onto the non-planar structures such that the fourth nitride compound semiconductor layer has an essentially planar surface. The method further includes growing a functional layer sequence of the nitride compound semiconductor device, connecting a side of the functional layer sequence located opposite to the growth substrate to a carrier and removing the growth substrate.

Abstract: First, second and third series of samples are successively made so as to determine the influence of the deposition parameters on the crystallographic quality of a layer of semiconductor material of III-V type. The parameters studied are successively the deposition pressure, the deposition temperature and the deposited thickness of a sub-layer of semiconductor material of III-V type so as to respectively determine a first deposition pressure, a first deposition temperature at the first deposition pressure, and a first deposited thickness at the first deposition temperature and at the first deposition pressure. The sub-layer of semiconductor material of III-V type is thickened by ways of a second layer of semiconductor material of III-V type deposited under different conditions.

Abstract: A subject of present invention is to enable reducing, even in growth at a high C/Si ratio, contamination by different polytypes with respect to a silicon carbide epitaxial wafer having a low off-angle, and to provide the silicon carbide epitaxial wafer which enables forming a reliable high voltage silicon carbide semiconductor element. The silicon carbide epitaxial wafer of the present invention is a silicon carbide epitaxial wafer comprising an epitaxially grown layer disposed on a silicon carbide substrate having an ?-type crystal structure and an off-angle tilted at an angle of more than 0° and less than 4° from a (0001) Si plane or a (000-1) C plane, wherein a region of a step bunching including five to ten bunched steps of 1 nm in height occupies 90% or more of the surface of the silicon carbide substrate.

Abstract: III-N semiconductor heterostructures including a raised III-N semiconductor structures with inclined sidewall facets are described. In embodiments, lateral epitaxial overgrowth favoring semi-polar inclined sidewall facets is employed to bend crystal defects from vertical propagation to horizontal propagation. In embodiments, arbitrarily large merged III-N semiconductor structures having low defect density surfaces may be overgrown from trenches exposing a (100) surface of a silicon substrate. III-N devices, such as III-N transistors, may be further formed on the raised III-N semiconductor structures while silicon-based transistors may be formed in other regions of the silicon substrate.

Abstract: The present invention relates to the production of III-N templates and also the production of III-N single crystals, III signifying at least one element of the third main group of the periodic table, selected from the group of Al, Ga and In. By adjusting specific parameters during crystal growth, III-N templates can be obtained that bestow properties on the crystal layer that has grown on the foreign substrate which enable flawless III-N single crystals to be obtained in the form of templates or even with large III-N layer thickness.

Abstract: Disclosed are methods and kits for isolating nucleic acids having a size above a desired cut-off size from a nucleic acid containing sample. The method comprises combining the sample with a binding buffer, alcohol and silicon carbide to provide a binding mixture. Nucleic acids having a size above the desired cut-off size are selectively bound to the silicon carbide. The cut-off size for selective binding to the silicon carbide is determined by the alcohol concentration of the binding mixture. The bound nucleic acids are separated from the remaining sample. The bound nucleic acids are optionally washed and then eluted from the silicon carbide. The kit comprises a buffer binding to be diluted with alcohol to provide an alcohol concentration of about 1 to about 50% (v/v), a wash solution, an elution solution, silicon carbide and instructions for adjusting the alcohol concentration to selectively bind nucleic acids having a size above the desired cut-off size.

Abstract: Systems and methods for growing semiconductor materials on substrates by using patterned sol-gel materials are provided. According to a first aspect of the invention, a method includes forming a pattern of a sol-gel material on a first region of substrate, and depositing a semiconductor material on a second region of the substrate by selective area growth. The second region is adjacent to the first region.

Abstract: A method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber, involves removing native oxide from a surface of the wafer; and then depositing an epitaxial layer with a thickness of at least 40 ?m on the surface of the wafer by introducing a silicon containing gas and a carrier gas into the process chamber, wherein the flow rate of the silicon containing gas is lower than 10 standard liters per minute and the flow rate of the carrier gas is at least 40 standard liters per minute.

Abstract: Present disclosure provides a method for manufacturing a semiconductor wafer with an epitaxial layer at a front surface of the semiconductor wafer, including providing the semiconductor wafer with a first dopant concentration of a dopant having a first conductivity type, forming a polysilicon layer over the front surface, removing the polysilicon layer from the front surface, and depositing the epitaxial layer at the front surface with a second dopant concentration of the dopant having the first conductivity type under a predetermined temperature. A transition width of the dopant having the first conductivity type across the semiconductor wafer and the epitaxial layer is controlled by the predetermined temperature to be at least about 0.75 micrometer. A semiconductor device and a semiconductor wafer with an epitaxial layer at a front surface of the semiconductor wafer are also disclosed.

Abstract: A silicon substrate with a GaN-based device and a Si-based device on the silicon substrate is provided. The silicon substrate includes the GaN-based device on a SiC crystalline region. The SiC crystalline region is formed in the silicon substrate. The silicon substrate also includes the Si-based device on a silicon region, and the silicon region is next to the SiC crystalline region on the silicon substrate.

Abstract: A sintered compact sputtering target in which a composition ratio based on atomicity is represented by a formula of (Fe100-x—Ptx)100-A—CA (provided A is a number which satisfies 20?A?50 and X is a number which satisfies 35?X?55), wherein C grains are finely dispersed in an alloy, and the relative density is 90% or higher. The production of a magnetic thin film with granular structure is provided without using an expensive simultaneous sputtering device, and a high-density sputtering target capable of reducing the amount of particles generated during sputtering is provided.

Abstract: A silicon carbide substrate includes a Si substrate (silicon substrate), a SiC base film (silicon carbide base film) which is stacked on the Si substrate and contains silicon carbide, a defective part (through-hole) which passes through the SiC base film, a hole which is located between the Si substrate and the SiC base film corresponding to the defective part, and an oxide film which is provided on the surface of the Si substrate in the hole and contains silicon oxide. Further, on the SiC base film, a SiC grown layer (silicon carbide grown layer) may be formed.

Abstract: A method of forming a TMDC monolayer comprises providing a multi-layer transition metal dichalcogenide (TMDC) film. The multi-layer TMDC film comprises a plurality of layers of the TMDC. The multi-layer TMDC film is positioned on a conducting substrate. The conducting substrate is contacted with an electrolyte solution. A predetermined electrode potential is applied on the conducting substrate and the TMDC monolayer for a predetermined time. A portion of the plurality of layers of the TMDC included in the multi-layer TMDC film is removed by application of the predetermined electrode potential, thereby leaving a TMDC monolayer film positioned on the conducting substrate.

Abstract: Graphene is used as an interfacial layer to grow Si and other semiconductors or crystalline materials including two-dimensional Si and other structures on any foreign substrate that can withstand the growth temperature without the limitation matching condition typically required for epitaxial growth.

Abstract: Methods of producing arrays of thin crystal grains of layered semiconductors, including the creation of stable atomic-layer-thick to micron-thick membranes of crystalline semiconductors by chemical vapor deposition.

Abstract: A light emitting element includes a semiconductor stack including an n-side semiconductor layer, and a p-side semiconductor layer disposed in a portion of an area above the n-side semiconductor layer, the semiconductor stack having a plurality of first lateral surfaces and a plurality of second lateral surfaces; an n-pad electrode disposed in an area different from an area where the p-side semiconductor layer is disposed above the n-side semiconductor layer, the n-pad electrode being electrically connected to the n-side semiconductor layer, and the n-pad electrode having a plurality of lateral surfaces that oppose the first lateral surfaces of the semiconductor stack; a first light transmissive film disposed in contact with the first lateral surfaces of the semiconductor stack; and a second light transmissive film disposed in contact with the second lateral surfaces of the semiconductor stack.

Abstract: A hetero-substrate, a nitride-based semiconductor light emitting device, and a method of manufacturing the same are provided. The hetero-substrate may include a substrate including a silicon semiconductor, a buffer layer disposed on the substrate, a first semiconductor layer disposed on the buffer layer and including a nitride semiconductor, a second semiconductor layer disposed on the first semiconductor layer and including a first conductive type nitride semiconductor having a first doping concentration, and a stress control structure disposed between the first semiconductor layer and the second semiconductor layer and including at least one stress compensation layer and at least one third semiconductor layer including a first conductive type nitride semiconductor having a second doping concentration that is the same or lower than the first doping concentration.

Abstract: A method of making a SiC buffer layer on a Si substrate comprising depositing an amorphous carbon layer on a Si(001) substrate, controlling the thickness of the amorphous carbon layer by controlling the time of the step of depositing the amorphous carbon layer, and forming a deposited film. A 3C—SiC buffer layer on Si(001) comprising a porous buffer layer of 3C—SiC on a Si substrate wherein the porous buffer layer is produced through a solid state reaction.

Abstract: Semiconductor wafers composed of silicon with an epitaxially deposited layer, are prepared by: placing a dummy wafer on a susceptor of an epitaxy reactor; conducting an etching gas through the epitaxy reactor in order to remove residues on surfaces in the epitaxy reactor through the action of the etching gas; conducting a first deposition gas through the epitaxy reactor in order to deposit silicon on surfaces in the epitaxy reactor; replacing the dummy wafer by a substrate wafer composed of silicon; and conducting a second deposition gas through the epitaxy reactor in order to deposit an epitaxial layer on the substrate wafer.

Abstract: In one embodiment, the semiconductor die includes a selective epitaxial layer including device regions, and a masking structure disposed around sidewalls of the epitaxial layer. The masking structure is part of an exposed surface of the semiconductor die.

Abstract: This invention relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a chlorosilane gas, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C. but less than 2000° C.; with the proviso that the pressure within the reaction chamber is maintained in the range of 0.1 to 760 torr. This invention also relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a non-chlorinated silicon-containing gas, hydrogen chloride, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C.

Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.

Abstract: A method for releasing a semiconductor layer with a reduced active area from a base substrate is provided. A patterned release layer is first formed between a semiconductor layer comprised of an III-V compound semiconductor material and formed by a lateral epitaxial overgrowth technique and a base substrate. The patterned release layer is in contact with a Group III nitride surface. The patterned release layer is composed of a material having a lower fracture toughness than that of the III-V compound semiconductor material and that of the base substrate so that a crack will initiate in the pattern release layer during the controlled spalling process. The semiconductor layer is released from the underlying base substrate along a spalling plane located at a portion of the semiconductor layer enclosing the patterned release layer and the base substrate.

Abstract: The non-polar or semi-polar group III nitride layer disclosed in a specific example of the present invention can be used for substrates for various electronic devices, wherein problems of conventional polar group III nitride substrates are mitigated or solved by using the nitride substrate of the invention, and further the nitride substrate can be manufactured by a chemical lift-off process.

Abstract: A dislocation-free high quality template with relaxed lattice constant, fabricated by spatially restricting misfit dislocation(s) around heterointerfaces. This can be used as a template layer for high In composition devices. Specifically, the present invention prepares high quality InGaN templates (In composition is around 5-10%), and can grow much higher In-composition InGaN quantum wells (QWs) (or multi quantum wells (MQWs)) on these templates than would otherwise be possible.

Abstract: A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening.

Abstract: A semiconductor device includes: a substrate with an off-angle; an SiC layer provided on a principal surface of the substrate, including an n type drift region, and having a trench whose bottom is located in the drift region; and a gate electrode provided in the trench in the SiC layer. In the trench in the SiC layer, a first angle formed by at least part of a first sidewall on an off-direction side and the principal surface of the substrate is an obtuse angle, and a second angle formed by at least part of a second sidewall opposite to the first sidewall and the principal surface of the substrate is an acute angle, in a cross section parallel to a direction of a normal line to the principal surface of the substrate and a direction of a c-axis of the substrate.

Abstract: Non-destructive pretreatment methods are generally provided for a surface of a SiC substrate with substantially no degradation of surface morphology thereon. In one particular embodiment, a molten suspension mixture (e.g., including KOH (or KOH eutectic) and a buffering agent) is applied directly onto the surface of the SiC substrate to form a treated surface thereon. An epitaxial film (e.g., SiC) can then be grown on the treated surface to achieve very high (e.g., up to and including 100%) BPD to TED conversion rate close to the epilayer/substrate interface.

Abstract: Non-destructive pretreatment methods are generally provided for a surface of a SiC substrate with substantially no degradation of surface morphology thereon. In one particular embodiment, a molten mixture (e.g., including KOH and a buffering agent) is applied directly onto the surface of the SiC substrate to form a treated surface thereon. An epitaxial film (e.g., SiC) can then be grown on the treated surface to achieve very high (e.g., up to and including 100%) BPD to TED conversion rate close to the epilayer/substrate interface.

Abstract: Single crystal diamond material produced using chemical vapour deposition (CVD), and particularly diamond material having properties suitable for use in optical applications such as lasers, is disclosed. In particular, a CVD single crystal diamond material having preferred characteristics of longest linear internal dimension, birefringence and absorption coefficient, when measured at room temperature, is disclosed. Uses of the diamond material, including in a Raman laser, and methods of producing the diamond are also disclosed.

Abstract: A 3C-SiC epitaxial layer is produced by a production method including: epitaxially growing a first 3C-SiC layer on a Si substrate; oxidizing the first 3C-SiC layer; removing an oxide film on a surface of the 3C-SiC layer; and epitaxially growing a second 3C-SiC layer on the 3C-SiC layer after the oxide film is removed.

Abstract: The present invention is to provide a method for growing a group III nitride crystal that has a large size and has a small number of pits formed in the main surface of the crystal by using a plurality of tile substrates. A method for growing a group III nitride crystal includes a step of preparing a plurality of tile substrates 10 including main surfaces 10m having a shape of a triangle or a convex quadrangle that allows two-dimensional close packing of the plurality of tile substrates; a step of arranging the plurality of tile substrates 10 so as to be two-dimensionally closely packed such that, at any point across which vertexes of the plurality of tile substrates 10 oppose one another, 3 or less of the vertexes oppose one another; and a step of growing a group III nitride crystal 20 on the main surfaces 10m of the plurality of tile substrates arranged.

Abstract: A method of forming an epitaxial semiconductor material that includes forming a graphene layer on a semiconductor and carbon containing substrate and depositing a metal containing monolayer on the graphene layer. An epitaxial layer of a gallium containing material is formed on the metal containing monolayer. A layered stack of the metal containing monolayer and the epitaxial layer of gallium containing material is cleaved from the graphene layer that is present on the semiconductor and carbon containing substrate.

Abstract: A semiconductor substrate includes: single crystal silicon; a mask material formed on a surface of the single crystal silicon and having an opening; a silicon carbide film formed on a portion exposed in the opening of the single crystal silicon; and a single crystal silicon carbide film formed so as to cover the silicon carbide film and the mask material. The mask material has a viscosity of 105 Pa·S or more and 1014.5 Pa·S or less in a temperature range of 950 to 1400° C.

Abstract: A GaN nanorod and formation method. Formation includes providing a substrate having a GaN film, depositing SiNx on the GaN film, etching a growth opening through the SiNx and into the GaN film, growing a GaN nanorod through the growth opening, the nanorod having a nanopore running substantially through its centerline. Focused ion beam etching can be used. The growing can be done using organometallic vapor phase epitaxy. The nanopore diameter can be controlled using the growth opening diameter or the growing step duration. The GaN nanorods can be removed from the substrate. The SiNx layer can be removed after the growing step. A SiOx template can be formed on the GaN film and the GaN can be grown to cover the SiOx template before depositing SiNx on the GaN film. The SiOx template can be removed after growing the nanorods.

Abstract: In a method of manufacturing a silicon carbide single crystal, a silicon carbide substrate having a surface of one of a (11-2n) plane and a (1-10n) plane, where n is any integer number greater than or equal to 0, is prepared. An epitaxial layer having a predetermined impurity concentration is grown on the one of the (11-2n) plane and the (1-10n) plane of the silicon carbide substrate by a chemical vapor deposition method so that a threading dislocation is discharged from a side surface of the epitaxial layer. A silicon carbide single crystal is grown into a bulk shape by a sublimation method on the one of the (11-2n) plane and the (1-10n) plane of the epitaxial layer from which the threading dislocation is discharged.

Abstract: Synthetic monocrystalline diamond compositions having one or more monocrystalline diamond layers formed by chemical vapor deposition, the layers including one or more layers having an increased concentration of one or more impurities (such as boron and/or isotopes of carbon), as compared to other layers or comparable layers without such impurities. Such compositions provide an improved combination of properties, including color, strength, velocity of sound, electrical conductivity, and control of defects. A related method for preparing such a composition is also described., as well as a system for use in performing such a method, and articles incorporating such a composition.