Polycrystalline Passivation Patents (Class 148/DIG125)
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Patent number: 5510272Abstract: In a method of producing a solar cell, a photovoltaic thin semiconductor crystalline film is formed on an underlying substrate and hydrogen passivated throughout the film thickness direction of the photovoltaic film whereby a high efficiency solar cell is obtained. In addition, since the passivation process is performed before forming a rear surface electrode on the thin semiconductor crystalline film, the passivation process is not limited by the rear surface electrode. Thereby, a solar cell having a higher energy conversion efficiency is obtained. The passivation process is performed by exposing the thin semiconductor crystalline film to a hydrogen ion ambient having a low acceleration energy, below 2 KeV, or to a plasma ambient. Therefore, the uniformity of the passivation process at a wafer surface is improved and a large area wafer can be efficient processed.Type: GrantFiled: December 1, 1994Date of Patent: April 23, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiroaki Morikawa, Hisao Kumabe
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Patent number: 5304509Abstract: A two-step back-side hydrogenation process includes the steps of first bombarding the back side of the silicon substrate with hydrogen ions with intensities and for a time sufficient to implant enough hydrogen atoms into the silicon substrate to potentially passivate substantially all of the defects and impurities in the silicon substrate, and then illuminating the silicon substrate with electromagnetic radiation to activate the implanted hydrogen, so that it can passivate the defects and impurities in the substrate. The illumination step also annihilates the hydrogen-induced defects. The illumination step is carried out according to a two-stage illumination schedule, the first or low-power stage of which subjects the substrate to electromagnetic radiation that has sufficient intensity to activate the implanted hydrogen, yet not drive the hydrogen from the substrate.Type: GrantFiled: August 24, 1992Date of Patent: April 19, 1994Assignee: Midwest Research InstituteInventor: Bhushan L. Sopori
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Patent number: 5110404Abstract: In a method for heat process of silicon, a single crystal silicon produced by the Czochralski process is thermally processed at a low temperature ranging from 400.degree. C. to 550.degree. C. Outside this temperature range, the oxygen precipitate is not adequate. The result is that a predetermined oxygen precipitate can be obtained uniformly in the crystal growth direction without any reduction especially at the crystal bottom part. The resulting silicon is particularly suitable for manufacture of LSI.Type: GrantFiled: March 21, 1990Date of Patent: May 5, 1992Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Izumi Fusegawa, Hirotoshi Yamagishi, Takao Abe
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Patent number: 5024956Abstract: A method of manufacturing a semiconductor device having a monocrystalline silicon region (3) comprising a first zone (9) and an adjacent second zone (10) and laterally enclosed by a sunken oxide layer (4) and by an overlying highly doped polycrystalline silicon layer (5). The silicon layer (5) is laterally separated by an oxide layer (6) from the silicon region (3) and adjoins the first zone (9) on a narrow edge portion of the upper surface of the region (3), this zone being of the same conductivity type as the silicon layer (5). The second zone (10) is provided with an electrode layer (11). According to the invention, the silicon layer (5) is separated from the electrode layer (11) by an oxide strip (12A) formed in a self-aligned manner and at least one doped connection zone (13) having a width determined by said oxide strip (12A) is situated between said first and said second zones and located below said oxide strip (12A).Type: GrantFiled: June 7, 1990Date of Patent: June 18, 1991Assignee: U.S. Philips CorporationInventors: Johannes W. A. Van Der Velden, Henricus G. R. Maas, Marguerite M. C. Van Iersel-Schiffmacher
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Patent number: 4985370Abstract: The invention relates a method of manufacturing a semiconductor laser device having a coating on surfaces of a semiconductor body intended for emanation of a laser beam.Type: GrantFiled: December 13, 1989Date of Patent: January 15, 1991Assignee: U.S. Philips CorporationInventors: Johannes J. Ponjee, Rudolf P. Tijburg
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Patent number: 4876224Abstract: A silicon wafer for a semiconductor substrate comprises a flat wafer body, with a polycrystalline silicon layer formed only on the rear surface of said wafer body.The silicon wafer is manufactured by the steps of forming a polycrystalline silicon layer on the entire surface of the silicon wafer body, etching and removing the portion of the polycrystalline silicon layer which is formed on the side surface of silicon wafer body, and polishing and removing the polycrystalline silicon layer on the front surface of the silicon wafer body.Type: GrantFiled: June 30, 1988Date of Patent: October 24, 1989Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Kenji Kusakabe
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Patent number: 4761386Abstract: A monolithic silicon integrated circuit chip is provided with a conductive passivating coating over the metal bonding pads. The coating is composed of doped polysilicon or metal silicide. Such materials provide a self-passivating, non-corrodable surface capable of forming a conventional eutectic bond to a connecting wire. A moat is etched through this layer outside the confines of the bonding pad so that they can be electrically isolated. Eutectic wire bonds are then made to the coating where they would ordinarily be made to the pad metal. Since the passivating coating fully covers the bonding pad a substantial increase in passivation occurs. If desired the passivating coating can be overcoated with a thin metal layer to facilitate probing of the circuits in wafer form.Type: GrantFiled: July 21, 1986Date of Patent: August 2, 1988Assignee: National Semiconductor CorporationInventor: Matthew S. Buynoski
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Patent number: 4629514Abstract: A method of producing II-V compound semiconductors with greatly reduced intrinsic defect levels comprises the step of causing atoms or ions of at least one member selected from the group consisting of hydrogen and the halogens to be injected into and diffused through II-V compound semiconductors during or after the production thereof.Type: GrantFiled: March 5, 1985Date of Patent: December 16, 1986Assignee: Shinanokenshi Co., Ltd.Inventor: Toshikazu Suda
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Patent number: 4605447Abstract: A plasma and heating treatment is carried out to reduce the density of charge carrier traps adjacent the interface of an insulating layer of a thermally grown silicon dioxide and a semiconductor body. During this plasma and heating treatment, the device is covered with an additional layer of silicon containing hydrogen, such as silane, for example, and this additional layer protects the insulating layer from direct bombardment of the plasma. During and/or after the plasma treatment, heating of the structure is at about 400.degree. C. or less. After the plasma and heating treatment, the additional layer is removed from at least most parts of the semiconductor device structure.Type: GrantFiled: April 26, 1984Date of Patent: August 12, 1986Assignee: U.S. Philips CorporationInventors: Stanley D. Brotherton, Audrey Gill, Michael J. King
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Patent number: 4583282Abstract: A process is described for producing isolated semiconductor devices in a common substrate which have self-aligned and pre-located isolation walls, buried layers, and channel-stops. The isolation walls are formed from a stacked arrangement of a dielectric region and a polycrystalline semiconductor region, above a doped channel-stop region which acts as a field guard. A single mask layer determines the location and spacing of the buried portions of the isolation walls, the channel-stops, and the buried layers.Type: GrantFiled: September 14, 1984Date of Patent: April 22, 1986Assignee: Motorola, Inc.Inventors: Terry S. Hulseweh, Carroll Casteel
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Patent number: H1249Abstract: A process for minimizing or avoiding the corrosion of thermal ink jet heater components by the coating thereof with polycrystalline diamond.Type: GrantFiled: July 1, 1991Date of Patent: November 2, 1993Inventors: Mary A. Machonkin, Frank Jansen, Michael P. O'Horo