Abstract: A method of fabricating polycrystalline silicon resistors having nearly zero or positive temperature coefficient includes the steps of depositing a layer of polycrystalline silicon, implanting the layer with silicon to make the layer substantially amorphous, introducing an impurity to dope the layer, and annealing the layer.

Abstract: An improved resistor for use in MOS integrated circuits. An opening is formed in an insulative layer which separates two conductive regions. A plasma enhanced chemical vapor deposition of passivation material such as silicon-rich silcon nitride is deposited in the window, contacting both conductive regions and providing resistance in a vertical direction between these regions.A subsequent annealing process involving controlled temperatures and cycle times provides for determining desired resistive values from an equivalent deposition process. Further, a barrier metal layer may be formed between the vertical resistor and the second conductive region.

Abstract: An improved process for fabricating a static RAM cell having a polysilicon load resistance is provided. Following formation of source, gate and drain regions, a planarized dielectric structure is formed over the junction regions, and via openings which expose portions of the source and drain regions are created. The via openings are filled with polysilicon interconnects, appropriately doped for low resistance contacts. Where the contact includes a resistor load, the polysilicon is not doped. Thus, the prior art approach of providing doped and undoped regions along the same polysilicon interconnect is not employed. Rather, the doped and undoped regions are physically separated. Consequently, the minimum length of the poly load is limited only by the ability to form via openings of small dimensions.

Abstract: A process of providing semi-insulating thin film resistors with closer tolerance values by furnance-annealing the film to increase is resistance to less than the final intended value, and then focused heat source-annealing the film to within a close tolerance of the final intended value.

Abstract: This invention relates to a semiconductor device having a resistor element of polycrystalline silicon and method of manufacturing the device. The resistor element comprises a first conductive layer made of a first polycrystalline silicon layer and island-like second conductive members made of a second polycrystalline silicon layer and provided on end sections of the first conductive layer respectively. The resistance value of the resistor element is determined by a center section between the end sections of the first conductive layer. Therefore, high resistance value can be obtained by decreasing the thickness of the first conductive layer, or the center section thereof without sacrificing the degree of integration. On the other hand, the contact portions with wiring layers become a large thickness because they are composed of the end sections of the first conductive layer and the island-like second conductive member.

Abstract: A method of simultaneously manufacturing semiconductor regions having different doping concentrations, for example, for obtaining semiconductor resistors having differences values. Due to difference in the rate of oxidation, oxide edges of different widths can be formed by oxidation of n-type silicon regions thus obtained. According to the invention, ion implantation or deposition takes place through doping windows for each of which the ratio between the window surface area and the surface area to be doped is different. Subsequently, homogeneous doping concentrations are obtained by diffusion.

Abstract: Low noise polycrystalline silicon resistors are fabricated in the following sequence:(1) deposit an appropriate thickness of polysilicon (e.g. 400 nm) on top of an oxidized wafer(2) resistor doping by ion implantation (e.g. phosphorous)(3) heavy doping of the end-contact regions of the polysilicon resistor by high-dose ion implantation(4) patterning the polysilicon resistor(5) oxidation/annealing the polysilicon resistor(6) open contacts to the polysilicon resistor(7) aluminum metallization to form ohmic contacts(8) a long (e.g. 3 hours) low temperature (e.g. at 375.degree.) pure hydrogen annealing to passivate the interface states in the polysilicon resistor. Polyresistors processed this way have a noise figure that is about a factor of three lower than samples processed otherwise. The low temperature post metallization annealing in pure hydrogen passivates the interfaces of polyresistors, reducing the l/f noise normally generated therein.