Abstract: A process for the isolation of a semiconductor layer on an insulator. A process for isolating a semiconductor layer on an insulator is disclosed that includes the steps of: forming a first insulating layer on a semiconductor substrate, and opening a window by etching the first insulating layer which becomes an epitaxial growth seed; depositing a semiconductor layer and growing an epitaxial layer which has the same crystal structure as the semiconductor substrate under the window; forming an active area of the epitaxial layer by a photolithographic process; forming a second insulating layer on and at the side of the active area and on the first insulating layer; and isolating an active area from the semiconductor layer by forming a third insulator layer in the window by an oxidation process.

Abstract: Method of fabricating TFTs starts with forming a nickel film selectively on a bottom layer which is formed on a substrate. An amorphous silicon film is formed on the nickel film and heated to crystallize it. The crystallized film is irradiated with infrared light to anneal it. Thus, a crystalline silicon film having excellent crystailinity is obtained. TFTs are built, using this crystalline silicon film.

Abstract: A contact for a semiconductor device is provided by depositing a layer of palladium on a silicon substrate, causing the palladium to react with the substrate for forming palladium silicide, removing unreacted palladium from the substrate, forming doped silicon on the palladium silicide and substrate, causing the silicon to be transported through the palladium silicide for recrystallizing on the substrate for forming epitaxially recrystallized silicon regions on the substrate and lifting the palladium silicide above the epitaxially recrystallized silicon regions for forming a silicided contact therefor, and removing the doped silicon from the substrate.

Abstract: A method for forming a semiconductor thin film comprises crystallizing an amorphous silicon thin film by a first thermal treatment at 700.degree. C. or lower for ten hours or longer and carrying out a second thermal treatment at 1200.degree. C. or higher in which a lamp light is radiated to the crystallized thin film.

Abstract: A method for producing polycrystalline layers having granular crystalline structure is provided. Pursuant to the method, a thin intermediate layer of amorphous is deposited before the deposition of the polycrystalline layer in order to avoid crystal structure influence proceeding from the substrate. The layer is then recrystallized applying a pattern of crystallization points or the amorphous layer. A detrimental effect of the fine-crystalline structure of the substrate is prevented by the amorphous intermediate layer. Pursuant to the present invention, the thin-film technology can also be utilized for polycrystalline silicon layers, this being especially desirable in the manufacture of solar cells.

Abstract: A resistive heating element is formed by depositing an amorphous silicon film on selected portions of a substrate and heating the deposited amorphous silicon film so that it undergoes solid phase epitaxy to form a (111) textured polycrystalline silicon film. The method is particularly useful for forming electro-thermal transducers for thermal ink jet printheads.

Abstract: Amorphous Co:Si (1:2 ratio) films (12) are electron gun-evaporated on clean Si(111) substrates (10), such as in a molecular beam epitaxy system. These layers are then crystallized selectively with a focused electron beam (14) to form very small crystalline CoSi.sub.2 regions (12') in an amorphous matrix. Finally, the amorphous regions are etched away selectively using plasma or chemical techniques.

Abstract: Wetting of encapsulated silicon-on-insulator (SOI) films during a zone-melting recrystallization (ZMR) process is enhanced by a high temperature anneal of the SOI structure in a reactive nitrogen-containing ambient to introduce nitrogen atoms to the polysilicon/silicon dioxide cap interface. The technique is not only more effective in present in cap fracture and enhancing crystal quality but is also susceptible to batch processing with noncritical parameters in a highly efficient, uniform manner. Preferably, the cap is exposed to 100% ammonia at 1100.degree. C. for one to three hours followed by a pure oxygen purge for twenty minutes. The ammonia atmosphere is reintroduced at the same temperature for another one to three hour period before ZMR. The process is believed to result in less than a half monolayer of nitrogen at the interior cap interface thereby significantly lowering the contact angle and improving the wetting character of the SOI structure.

Abstract: A method of producing so-called SOI structures according to this invention includes the step of forming an opening for seeding after an insulating layer of predetermined thickness has been formed on a first monocrystal silicon layer. Further, a non-monocrystal layer, e.g., a polycrystal silicon layer is formed on the surface of the insulating layer. The surface of the polycrystal silicon layer is smoothed as by grinding. A reflection-preventive film is formed on the smoothed surface of the polycrystal silicon layer. The reflection-preventive film has a thin film region whose reflectance is substantially zero and a thick film region having a predetermined reflectance. During laser annealing, the reflection-preventive film produces a predetermined temperature distribution in the polycrystal silicon layer.

Abstract: The invention relates to a method of manufacturing a semiconductor device in which a polycrystalline or amorphous silicon oxide layer 3, which is provided on a silicon oxide layer 2 on a monocrystalline silicon substrate 1 and which is in contact with the silicon substrate 1 via an opening 4 in the silicon layer 2, is recrystallized by means of a heat treatment in the presence of means for concentrating the heat at the opening 4. In a simple and inexpensive manner, these means consist of a second silicon oxide layer 5 and a second polycrystalline silicon layer 6, the second silicon oxide layer 5 having a thickness at the openings 4 which is smaller than that of the rest of the layer 5.

Abstract: A method of making a tandem type semiconductor photoelectric conversion device, comprising steps of: forming laminate member on a substrate by laminating first and second PIN structure of non-single crystal semiconductor in that order (or in the reverse order); forming an electrode on the laminate member; and crystallization an I-type layer of the second PIN structure by light irradiation (a) through the electrode (in this case, the electrode is transparent), or (b) from the side opposite from the substrate before formation of the electrode (or (a) from the side opposite from the substrate before formation of the first PIN structure, or (b) through the substrate (in this case, the substrate is transparent)).

Abstract: A method of forming a bipolar transistor is provided, comprising the steps of: providing a semiconductor substrate including a first region of a first conductivity type; forming a layer of insulative material over a surface of the first region; forming a layer of conductive material over the layer of insulative material; patterning the first and second layers to form a generally vertical sidewall bounding an exposed portion of the first region surface; and epitaxially depositing a base region of a second conductivity type over the exposed portion of the first region surface and the sidewall such that the base region is in electrical contact with the second region.

Abstract: A heteroepitaxial growth method wherein a III-V group compound semiconductor is formed on a silicon substrate. A first amorphous III-V group compound semiconductor layer is formed on the silicon substrate before forming a III-V group compound semiconductor crystal layer on the amorphous III-V group compound semiconductor layer. A second amorphous III-V group semiconductor layer having a thickness greater than the crystal layer is formed on the III-V group compound semiconductor crystal layer and subjected to a solid phase epitaxial growth whereby the second amorphous III-V group compound semiconductor layer is made a single crystalline layer.

Abstract: An improved technique for forming silicon-on insulator films for use in integrated circuits. The technique provides an improved encapsulation layer to enable in a reproducible way the zone melt recrystallization of such films. The encapsulation layer consists of a first layer of a doped SiO.sub.2 (silicate glass) on which a further layer of Si.sub.3 N.sub.4 is deposited. The doped SiO.sub.2 forms a fusible glassy material which is rendered semi-liquid and flows at the temperatures used in recrystallization. The softening of the encapsulation material accommodates volume expansion and eliminates the biaxial stresses in the layered structure. The Si.sub.3 N.sub.4 layer adds mechanical strength to the SiO.sub.2 layer and improves the wetting angle.

Abstract: Epitaxial Si-Ge heterostructures are formed by depositing a layer of amorphous Si-Ge on a silicon wafer. The amorphous Si-Ge on the silicon wafer is then subjected to a wet oxidation in order to form an epitaxial Si-Ge heterostructure. Any size wafer may be used and no special precaustions need be taken to ensure a clean amorphous Si-Ge/Si interface.

Abstract: A new III-IV buffer material is described which is produced by low temperature growth of III-V compounds by MBE that has unique and desirable properties, particularly for closely spaced, submicron gate length active III-V semiconductor devices, such as HEMT's, MESFET's and MISFET's. In the case of the III-V material, GaAs, the buffer is grown under arsenic stable growth conditions, at a growth rate of 1 micron/hour, and at a substrate temperature preferably in the range of 150 to about 300.degree. C. The new material is crystalline, highly resistive, optically inactive, and can be overgrown with high quality III-V active layers.

Abstract: Intermediate buffer films having a low plastic deformation threshold are provided for absorbing defects due to lattice mismatch and/or thermal coefficient of expansion mismatch between a substrate or layer support and an overlayer while concurrently providing a good template for subsequent crystalline growth at the overlayer. This is accomplished for diamond cubic structure substrates, such as Si or Ge or Si on sapphire or crystalline Si on glass, upon which are to be deposited lattice mismatch overlayers, such as, GaAs or ZnSe. Also, zinc blend type substrates, such as GaAs or InP may be employed with such intermediate buffer films. A characteristic of these intermediate buffer films is a substantially lower plastic deformation threshold compared to either the substrate support or the overlayer to be grown heteroepitaxially thereon.

Abstract: Preferred embodiments include growth of GaAs on insulator-masked silicon; the GaAs is single crystal over the silicon but polycrystalline over the insulator. A post=growth anneal extends the single crystal region over the insulator for distances of 2-4 .mu.m.

Abstract: The present invention provides products and methods of forming an epitaxial silicon layer on an implanted buried insulator silicon on insulator structure (10). A silicon film (16) is pre-treated to remove residual oxide and surface damage layers, but in such a way as to not damage the silicon film (16) or insulating layer (14) below the silicon film (16). A layer of amorphous silicon (18) is formed on the silicon film (16) in processes to avoid formation of polycrystalline silicon, and also to avoid damage to the silicon film (16). The layer of amorphous silicon (18) is annealed to form an epitaxial layer of single crystalline silicon (20).

Abstract: A method of forming a semiconductor thin layer on a silicon substrate comprising the steps of depositing a first amorphous layer of a compound semiconductor (e.g., GaAs) on the silicon substrate, and growing a first epitaxial layer of the compound semiconductor on the amorphous layer, characterized in that the method comprises the steps of: after the epitaxial growth step, depositing a second amorphous layer of the compound semiconductor on the first epitaxial layer, and growing a second epitaxial layer of the compound semiconductor on the second amorphous layer. The obtained GaAs/Si substrate has a reduced dislocation density.

Abstract: Of an amorphous Si film, a region to be formed into a lowly doped region such as the channel region of an MOS transistor is covered with a mask and an uncovered region is doped with an impurity. After this, the amorphous Si film is annealed and turned to signal crystal through solid phase epitaxial growth, and the mask itself is used as the electrode of a semiconductor device. By this impurity doping, a large-sized single-crystal Si film can be formed, and the impurity doping can be conducted in self-alignment with the electrode formation to produce a highly integrated semiconductor circuit.

Abstract: Improved processing for forming an interconnect in a process where a recrystallized polysilicon layer is formed over an insulative layer and where recrystallization takes place through a plurality of seed windows formed in the insulative layer. A doped region is formed in the substrate prior to deposition of the polysilicon layer. The polysilicon layer is in contact with at least a portion of the doped region through an opening in the insulative layer. Recrystallization takes place through this opening, and, for instance, the doped region is electrically connected to a source or drain region of a semiconductor device formed in the recrystallized layer.

Abstract: A process for growing silicon on insulator in which complete isolation of the grown silicon of the substrate silicon by an intermediate oxide layer is obtained. A first epitaxial lateral overgrowth technique is used to grow a continuous layer of silicon through seed holes in a patterned oxide layer overlying the silicon substrate. Then the silicon layer is etched to expose the seed holes which are then oxidized to make the oxide layer aperture-free. This is followed by a second epitaxial lateral overgrowth step to replace the silicon etched in the silicon layer to make the layer substantially planar.

Abstract: Solid phase epitaxial growth of single crystal layers on single crystal semiconductor substrates at temperatures low enough to preserve the integrity of other entities on the substrates. Contaminants are removed by low energy ion sputtering at a pressure low enough to delay their reformation before the layer can be deposited on the surface followed by annealing for one hour at 400.degree. C. A method of solid phase epitaxially growing a single crystal layer on a single crystal semiconductor substrate is also disclosed.

Abstract: In a method of electrically altering the characteristics of a semiconductor device, a lateral polysilicon zener diode's zener knee voltage may be shifted either to a higher or lower voltage. An electrical potential may be applied in the forward direction to shift the zener knee to a higher voltage level. An electrical potential may be applied in the reverse bias direction to shift the zener knee to a lower voltage. In the limit, the zener may be changed into a forward diode of reverse polarity with respect to the original zener. The electrical potential used should be of appropriate magnitude to melt the polysilicon without damage to the zener's terminals. This induces migration of the impurities causing a rediffusion of impurities thereby altering the characteristics of the diode. This method may be used to program a PROM by either converting the zener to a diode or not to program each binary bit.