Abstract: Active regions on a semiconductor substrate are isolated, whereby an Oxide/Nitride/Oxide sandwich is disposed on a substrate, and a polysilicon layer and a nitride layer are also disposed thereon. The Oxide/Nitride/Oxide sandwich substantially inhibits "pitting" of the substrate when the polysilicon layer is removed.Method of preventing "pitting" of an underlying substrate through the use of a nitride (or other HF-resistant material) disposed beneath the polysilicon layer of a Poly Buffered LOCOS stack.

Abstract: A method for manufacturing a semiconductor device of the invention comprises the steps of(a) forming a gate insulating film on a surface of a silicon substrate, and a gate electrode on said gate insulating film;(b) forming a source region and a drain region by doping said substrate with an impurity which has a conductivity type opposite to a conductivity type of said silicon substrate;(c) forming a self-aligned insulating layer on the side walls of the gate electrode;(d) forming a self-aligned metal layer on a region on which an insulating film is not formed, the region including the source region and the drain region; and(e) forming electrodes which are connected to the source region, drain region and gate electrode.

Abstract: A method of manufacturing a semiconductor device with a stacked-gate-electrode structure which includes; forming source and drain regions in the surface portion of a semiconductor substrate in a spaced-apart relationship, forming a floating gate such that it overlies the channel region between the source and drain regions with a gate insulating film therebetween, and forming a control gate such that it overlies the floating gate with an insulating film therebetween. An oxidation-resistant film pattern having a predetermined opening is formed over a non-monocrystalline silicon layer. The non-monocrystalline silicon layer within the opening is selectively oxidized with the oxidation-resistant film pattern as a mask to form a separation insulating film. In this way, a floating gate layer is formed with the portion of the non-monocrystalline silicon layer insulatingly separated.

Abstract: A process for producing VLSI (very large scale integrated) circuits employs techniques of self-aligned gates and contacts for FET devices and for both diffused conducting lines in the substrate and polysilicon conducting lines situated on isolating field oxide formed on the substrate. Mask alignment tolerances are increased and rendered non-critical. The use of materials in successive layers having different etch characteristics permits selective oxidation of desired portions only of the structure without need for masking and removal of selected material from desired locations by batch removal processes again without use of masking. There results VLSI circuits having increased density and reliability.