Abstract: A method is described for growing a single crystal having three-dimensional (3-D) doping patterns created within it during growth while maintaining a plane growth surface, creating junction-isolated devices and interconnections, forming a 3-D integrated circuit (IC). The crystal is grown as a large number of lightly-doped layers in a single-pumpdown procedure using sputter epitaxy, which offers growth rates for good-quality silicon of at least 0.1 micrometer per minute. The process experiences a stable environment with temperature remaining around 400 C and pressure near 1 millitorr, and the process is "quasicontinuous" in that once each layer is in place, its surface will experience a short series of further steps that create a 2-D doping pattern extending through the layer. It is the merging of many such successive 2-D patterns that creates the desired 3-D doping pattern within the finished silicon crystal.

Abstract: Thin films of aluminum nitride are deposited at 350 K on silicon, GaAs, fused quartz, and KBr substrates using gas-phase 193 nm excimer laser photolysis of trimethylamine alane and ammonia precursors without a thermally induced or a spontaneous reaction between them, resulting in AlN thin films that are amorphous, smooth and featureless having a band gap of 5.8 eV, a refractive index of 2.0, a breakdown electric field breakdown of 10.sup.8 V/m, a low-frequency dielectric constant of 6.0-6.9, high-frequency dielectric constant of 3.9-4.0, well suited for many thin film applications.

Abstract: A process for filling vias formed in a dielectric layer is disclosed. First, a via is formed in a dielectric layer, exposing an underlying metallization layer having a seed layer thereon. A sputter etch is performed which removes a portion of the seed layer, including an oxidized surface layer. The material thus etched from the seed layer first seals the sidewall of via, preventing outgassing from occurring. The continued redeposition of the seed layer on the sidewall provides a nucleation site for selective deposition of a via fill material. Following the sputter etch, selective deposition of the via fill is performed. Since the deposition occurs from the sidewalls as well as on the bottom of the via, all vias become substantially filled at the same time.

Abstract: A method of manufacturing a semiconductor device, and particularly a method of forming a monocrystalline film on a substrate. The method includes the step of forming a conductor layer having a step portion on the surface of a substrate. The step portion includes a lateral face which surrounds the lower surface of the step portion to form a closed loop. After the conductor layer has been formed on the surface of the substrate, a monocrystalline film is formed directly on the substrate. Specifically, the film is formed on the lower surface of the step portion, while a DC potential is applied to the conductor layer.

Abstract: A method for forming an anti-reflective coating useful in the fabrication of integrated circuits is discussed. Applicants have found that preheating semiconductor wafers prior to the application of amorphous silicon anti-reflective coatings tends to reduce undesirable particulates which may attach to the wafer. The process is illustratively performed in a Varian 3180 machine having four stations. Illustratively, the wafer may be preheated between 70.degree. C. and 175.degree. C. prior to and during the sputter deposition of an amorphous silicon anti-reflective coating.

Abstract: An integrated circuit device having an electronic circuit component connected by wire-bonding is characterized in that a masking member having a lower sputtering rate than that of the material forming the electrodes to be used for the wire-bonding is arranged around the electronic circuit component. A method for manufacturing an integrated circuit device having an electronic circuit component connected by wire-bonding is characterized in that a masking member having a lower sputtering rate than that of the material forming the electrodes to be used for the wire-bonding is arranged around the electronic circuit component.

Abstract: A method for producing a semiconductor device including forming an electrode or an electrode wiring by forming a tantalum thin film by sputtering is provided. In this method, a krypton gas in which nitrogen is mixed as a reactive gas is used as a sputtering gas, and a product of the pressure of the sputtering gas and a target-substrate distance is set in the range of 0.01 m.Pa to 0.08 m.Pa.

Abstract: A process for filling submicron, high aspect ratio gaps, that may have reentrant angles, with a high quality ILD. A first ILD layer is deposited using PECVD to partially fill the gap. Medium-pressure sputter etching is then used to remove the bread-loaf edges and redeposit the etched material in the gaps, thereby allowing small gaps with high aspect ratios and reentrant angles to be completely filled. Finally, a second ILD layer that completely fills the gap is deposited using PECVD.

Abstract: A method of manufacturing a semiconductor device whereby a layer (3) containing aluminium is deposited by means of a sputter deposition process on a surface (1) of a semiconductor body (2) which is placed on a holder (21) in a reaction chamber (20). The semiconductor body (2) is cooled down to a temperature below 150 K. during the deposition process. A smooth, flat layer with a good step coverage is deposited in this way.

Abstract: A method of manufacturing a semiconductor film and a semiconductor device is disclosed. The method comprises the steps of:forming a non-single crystal semiconductor film on a surface by sputtering in an atmosphere comprising hydrogen; andcrystallizing the non-single crystal semiconductor film at a temperature of 450.degree. C. to 750.degree. C.

Abstract: A material for high-vacuum vessels characterized by depositing a mixture film of stainless steel and boron nitride on the surface of a metal or an alloy through the sputtering process, and heating and precipitating hexagonal boron nitride onto the surface thereof.

Abstract: The present invention relates to a method of fabricating a semiconductor device, which comprises a formation of contact holes in an interlayer insulating film formed on a silicon substrate, formation of a titanium film and a titanium nitride film, as a barrier metal, and lamp annealing. The formation of the titanium nitride film is featured by reactive sputtering using a titanium target whose orientation ratio of (001) plane is not more than 70%. The titanium nitride film thus formed does not shrink rapidly during heat treatment and thus degradation of barrier performance thereof is prevented.

Abstract: An ion implantation process for producing a buried insulating layer of silicon dioxide in a silicon substrate which takes advantage of the effects of surface erosion and sputtering inherent to the ion implantation process. The process allows the production of an insulating layer buried within a silicon semiconductor wherein the width of the insulating layer can be contoured by controlling the beam energy during implantation.

Abstract: The method for producing the surface reflectance of the metal layer during semiconductor processing includes the step of roughening the surface of a metal layer prior to forming the photoresist thereon. The roughened surface reduces reflections that can cause metal notching effects. The step of roughening the surface includes depositing a layer (34) of aluminum which is substantially thinner than the thickness of the primary metal layer by a sputtering process.

Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process including the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connecting the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed in greatly reduced.

Abstract: A method of manufacturing a trench filled with an insulation material in a semiconductor substrate which includes the steps of forming a trench in the substrate, subjecting the substrate to an RF bias sputtering to form an oxide layer on the substrate, form a slope at an upper corner of the trench and produce a roundness at a lower corner of the trench, and filling the trench with the insulation material.

Abstract: A method for growing tunnel oxides on a specially treated substrate surface. The method comprises steps for roughening the substrate surface to induce low tunneling voltage in the subsequently grown tunnel oxide layer. The tunnel oxide layer is grown in a low temperature steam cycle to further provide enhanced tunneling. The surface treatment comprises the steps of growing a first oxide layer to seal the surface of the substrate followed by growing a second oxide on the first oxide layer. In the preferred embodiment, a plasma etch utilizing an oxide etcher with high energy ion bombardment and an aluminum electrode is utilized to etch through the first and second oxide layers. The aluminum electrode causes sputtered aluminum on the second oxide layer's surface. The sputtered aluminum blocks the anisotropic etching leaving a grass type oxide residue on the substrate surface. The etching continues, overetching into the substrate surface.

Abstract: According to the present invention, a method of manufacturing a semiconductor apparatus is provided which comprises the steps of (a) depositing a boron layer on a silicon substrate, and (b) thermally diffusing boron from said boron layer into said silicon substrate. The present invention, which is characteristically based on the solid phase diffusion process, enables even a thin layer to be deposited. Further, unlike the ion implantation process, the present invention enables an impurity to be uniformly diffused even into an inclined plane. Unlike the case where boron-containing glass is used as a diffusion source, the invention enables a sufficient amount of boron to be diffused even at a temperature lower than 1000.degree. C.

Abstract: The invention discloses an improved process for forming one or more metal strips on an integrated circuit structure by wet etching of a metal layer which comprises forming an intermediate layer over the integrated circuit structure; forming slots in the intermediate layer; forming a metal layer over the intermediate layer; and wet etching the metal layer sufficiently to remove all metal in the slots while retaining metal on the intermediate layer between the slots to form the desired one or more metal strips. Multiple levels of metal strips may be formed in an integrated circuit structure using the method of the invention.

Abstract: A method and apparatus for forming epitaxial thin film layers on substrates having abrupt transitions between layers of different composition or layers of different or like composition with different degrees of doping included therein. Gaseous reactants containing the desired elements to be included in the first film layer are injected into a CVD reaction chamber containing a substrate. The substrate is heated to a temperature high enough to obtain an epitaxial deposit, but low enough so as not to cause decomposition of the reactants. Once the gaseous reactant flows reach steady-state, an electric discharge or plasma is created in the gases to initiate the decomposition reaction and obtain a deposit. In this way, no transient effects are present. Once the deposit has attained sufficient thickness, the electric discharge is turned off to abruptly terminate deposition.

Abstract: Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Abstract: A method and apparatus for low temperature deposition of epitaxial films using low pressure chemical vapor deposition (CVD) with and without plasma enhancement. More specifically, the process enables CVD of epitaxial silicon at temperatures below 800.degree. C. by use of an in situ argon plasma sputter cleaning treatment of the silicon substrate prior to deposition.

Abstract: Disclosed is a method of making ohmic and/or Schottky barrier contacts to a silicon semiconductor substrate in which before depositing the metal on silicon semiconductor substrates containing integrated circuits which are covered by a mask having contact windows, the metal is initially deposited on freshly cleaned blank silicon semiconductor substrates mounted in the same vacuum chamber. In this manner any traces of oxygen present in the vacuum chamber are chemisorbed by the blank substrate resulting in deposition of a high quality oxide-free metal contacts on the device substrates.